C++, C++17, States machines, VHDL, GHDL, Yosys, Analogue electronics, Spice, PCB (only as backup for protos)
- France
Pinned Loading
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PulsesDigital
PulsesDigital PublicFun project to produce (only) pulses as the MultiSignalGene do, with FPGA or ASIC
VHDL
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PulsesGene
PulsesGene PublicFun project to produce (only) pulses as the MultiSignalGene do, with analogue circuits and FPGA or 74HC logic circuits.
Gerber Image
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