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Add none diagram to table
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12_RISC_CISC.md

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author: Sebastian Zug & André Dietrich & Fabian Bär
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email: sebastian.zug@informatik.tu-freiberg.de & andre.dietrich@informatik.tu-freiberg.de & fabian.baer@student.tu-freiberg.de
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version: 0.0.4
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version: 0.0.5
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language: de
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narrator: Deutsch Female
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![Fließbandverarbeitung](https://upload.wikimedia.org/wikipedia/commons/thumb/9/9e/Pipeline_MIPS.png/800px-Pipeline_MIPS.png "MIPS Pipeline [^MIPS]")
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********************************************************************************
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[^BP] State diagram of 2-bit saturating counter for branch predictor [Link](https://en.wikipedia.org/wiki/Branch_predictor#/media/File:Branch_prediction_2bit_saturating_counter-dia.svg)
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********************************************************************************
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## CISC vs RISC
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+ Nachladen von Operatoren (unterschiedliche Größe)
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+ Lange Ausführungs-Phasen (nicht vorhersagbar)
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<!-- data-type="none" -->
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| Platz | Befehl | Häufigkeit in % | CumSum |
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| ----- | ------------------ | --------------- | ------ |
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| 1 | LOAD | 22 | 22 |

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