@@ -116,7 +116,7 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
116116 RK3066_PLL_RATE ( 71000000 , 3 , 142 , 16 ),//1280*800@@60
117117 RK3066_PLL_RATE ( 74250000 , 8 , 297 , 12 ),//1280*700@60
118118 RK3066_PLL_RATE ( 32000000 , 1 , 16 , 12 ),//1024*600@43
119- RK3066_PLL_RATE ( 78750000 , 4 , 210 , 16 ),//1024*768
119+ RK3066_PLL_RATE ( 78750000 , 4 , 210 , 16 ),//1024*768@75.03
120120 RK3066_PLL_RATE ( 78800000 , 15 , 788 , 16 ),//1280*720@60
121121 RK3066_PLL_RATE ( 75000000 , 2 , 100 , 16 ),//1024*768@70
122122 RK3066_PLL_RATE ( 65000000 , 3 , 130 , 16 ),//1024*768@@60
@@ -131,7 +131,7 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
131131 RK3066_PLL_RATE ( 40000000 , 3 , 80 , 16 ),//800*600@60
132132 RK3066_PLL_RATE ( 36000000 , 1 , 24 , 16 ),//800*600
133133 RK3066_PLL_RATE ( 35500000 , 3 , 71 , 16 ),//?
134- RK3066_PLL_RATE ( 31500000 , 3 , 73 , 16 ),//640*480@75
134+ RK3066_PLL_RATE ( 31500000 , 3 , 146 , 16 ),//640*480@75
135135 RK3066_PLL_RATE ( 30240000 , 25 , 504 , 16 ),//650*480
136136 RK3066_PLL_RATE ( 28320000 , 25 , 472 , 16 ),//720*400@70
137137 { /* sentinel */ },
@@ -155,11 +155,14 @@ static struct rockchip_pll_rate_table rk3288_npll_rates[] = {
155155 RK3066_PLL_RATE_NB (85750000 , 4 , 343 , 12 , 32 ),//1366*768@60 iex
156156 RK3066_PLL_RATE_NB (85500000 , 4 , 171 , 12 , 32 ),
157157 RK3066_PLL_RATE_NB (85500000 , 2 , 171 , 12 , 32 ),//1360*768@60 iex
158+ RK3066_PLL_RATE_NB (84750000 , 2 , 226 , 16 , 32 ),//1360*768@59.8
158159 RK3066_PLL_RATE_NB (78750000 , 4 , 210 , 16 , 32 ),//1024*768@75 iex
160+ RK3066_PLL_RATE_NB (78750000 , 1 , 210 , 16 , 32 ),//1024*768@75
159161 RK3066_PLL_RATE_NB (74250000 , 4 , 198 , 16 , 32 ),
160162 RK3066_PLL_RATE_NB (33900000 , 5 , 226 , 16 , 32 ),//Waveshare DWE2100 800x480@60
161163 RK3066_PLL_RATE_NB (31500000 , 1 , 21 , 16 , 32 ),//640x480@75 @72.81 ASUS VZ229H
162164 RK3066_PLL_RATE_NB (33000000 , 1 , 22 , 16 , 32 ),//800x480@67
165+ RK3066_PLL_RATE_NB (27000000 , 1 , 72 , 16 , 32 ),//720x576@50
163166};
164167
165168#define RK3288_DIV_ACLK_CORE_M0_MASK 0xf
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