camera: rockchip: camsys_drv: disable cru reset of rk3326 isp now

YiChongZh · rkhuangtao · commit 0bef3afae981 · 2018-02-10T16:29:56.000+08:00
Because it will cause CPU hangs on, so disable the reset temporarily.

Change-Id: I612be4b47145fd1ebf8d8e5d44270f26151768fa
Signed-off-by: Zhong Yichong &lt;zyc@rock-chips.com&gt;
diff --git a/drivers/media/video/rk_camsys/camsys_soc_rk3326.c b/drivers/media/video/rk_camsys/camsys_soc_rk3326.c
@@ -194,6 +194,7 @@ int camsys_rk3326_cfg
 	}
 
 	case Isp_SoftRst: {/* ddl@rock-chips.com: v0.d.0 */
+#if 0
 		unsigned long reset;
 
 		reset = (unsigned long)cfg_para;
@@ -206,8 +207,10 @@ int camsys_rk3326_cfg
 			VI_IRCL));
 			camsys_trace(2, "Isp self soft rst: %ld", reset);
 			break;
+#else
+		break;
+#endif
 		}
-
 	default:
 	{
 		camsys_warn("cfg_cmd: 0x%x isn't support", cfg_cmd);

Original file line number	Diff line number	Diff line change
`@@ -194,6 +194,7 @@ int camsys_rk3326_cfg`
`194`	`194`	`}`
`195`	`195`
`196`	`196`	`case Isp_SoftRst: {/* ddl@rock-chips.com: v0.d.0 */`
	`197`	`+#if 0`
`197`	`198`	`unsigned long reset;`
`198`	`199`
`199`	`200`	`reset = (unsigned long)cfg_para;`
`@@ -206,8 +207,10 @@ int camsys_rk3326_cfg`
`206`	`207`	`VI_IRCL));`
`207`	`208`	`camsys_trace(2, "Isp self soft rst: %ld", reset);`
`208`	`209`	`break;`
	`210`	`+#else`
	`211`	`+ break;`
	`212`	`+#endif`
`209`	`213`	`}`
`210`		`-`
`211`	`214`	`default:`
`212`	`215`	`{`
`213`	`216`	`camsys_warn("cfg_cmd: 0x%x isn't support", cfg_cmd);`