arm: dts: rockchip: rk3288-th804: Update display clock frequency for panel

Target pixel clock rate for refresh rate @60 Hz
        = (1600 + 35 + 110 + 15) * (2560 + 8 + 12 + 4) * 60
	= 272870400 Hz ~ 272 MHz

Change-Id: Icc26ff98a2d98bdde5093db3dd211846e812069d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

Author: bivvy

arch/arm/boot/dts/rk3288-th804.dts

@@ -513,8 +513,9 @@
 };
 
 &dsi0 {
-	status = "okay";
 	rockchip,dual-channel = <&dsi1>;
+	rockchip,lane-rate = <1000>;
+	status = "okay";
 
 	panel: panel@0 {
 		compatible = "simple-panel-dsi";
@@ -523,7 +524,7 @@
 		reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
 		power-supply = <&vcc_lcd>;
 		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-				MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+			      MIPI_DSI_MODE_EOT_PACKET)>;
 		dsi,format = <MIPI_DSI_FMT_RGB888>;
 		dsi,lanes = <8>;
 
@@ -551,7 +552,7 @@
 			native-mode = <&timing0>;
 
 			timing0: timing0 {
-				clock-frequency = <240000000>;
+				clock-frequency = <272000000>;
 				hactive = <1600>;
 				vactive = <2560>;
 				hback-porch = <35>;