Hdmi: adjust npll nb parameter for 800x480@67HZ to reduce pll jitter

Change-Id: I5296a5b96e97cf9cb7b9e60f059baf29d88e0b77

Author: gary_gen

drivers/clk/rockchip/clk-rk3288.c

@@ -153,6 +153,7 @@ static struct rockchip_pll_rate_table rk3288_npll_rates[] = {
 	RK3066_PLL_RATE_NB(78750000, 4, 210, 16, 32),//1024*768@75 iex
 	RK3066_PLL_RATE_NB(74250000, 4, 198, 16, 32),
 	RK3066_PLL_RATE_NB(31500000, 1, 21, 16, 32),//640x480@75 @72.81 ASUS VZ229H
+	RK3066_PLL_RATE_NB(33000000, 1, 22, 16, 32),//800x480@67
 };
 
 #define RK3288_DIV_ACLK_CORE_M0_MASK	0xf