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Commit 47e4722

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author
Liang Chen
committed
arm: dts: adjust opp-table by leakage for rk322x SoCs
Change-Id: Id24f82d037866502596a74f16ee5e414bc64256a Signed-off-by: Liang Chen <cl@rock-chips.com>
1 parent e959f14 commit 47e4722

2 files changed

Lines changed: 6 additions & 6 deletions

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arch/arm/boot/dts/rk3229-cpu-opp.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,8 @@
5050
clocks = <&cru PLL_APLL>;
5151
rockchip,max-volt = <1350000>;
5252
rockchip,leakage-voltage-sel = <
53-
1 4 0
54-
5 254 1
53+
1 8 0
54+
9 254 1
5555
>;
5656
nvmem-cells = <&cpu_leakage>;
5757
nvmem-cell-names = "cpu_leakage";
@@ -96,8 +96,8 @@
9696
};
9797
opp-1392000000 {
9898
opp-hz = /bits/ 64 <1392000000>;
99-
opp-microvolt = <1375000 1375000 1400000>;
100-
opp-microvolt-L0 = <1375000 1375000 1400000>;
99+
opp-microvolt = <1350000 1350000 1400000>;
100+
opp-microvolt-L0 = <1350000 1350000 1400000>;
101101
opp-microvolt-L1 = <1325000 1325000 1400000>;
102102
};
103103
opp-1464000000 {

arch/arm/boot/dts/rk322x.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -109,8 +109,8 @@
109109
clocks = <&cru PLL_APLL>;
110110
rockchip,max-volt = <1350000>;
111111
rockchip,leakage-voltage-sel = <
112-
1 4 0
113-
5 254 1
112+
1 8 0
113+
9 254 1
114114
>;
115115
nvmem-cells = <&cpu_leakage>;
116116
nvmem-cell-names = "cpu_leakage";

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