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Liang Chenrkhuangtao
Liang Chen
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rkhuangtao
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arm: dts: adjust opp-table for rk3288
Change-Id: Ic5efeaf47883255072182aa8d1fdc1f1266c7dc8 Signed-off-by: Liang Chen <cl@rock-chips.com> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
1 parent 37c0570 commit 4d5707c

3 files changed

Lines changed: 118 additions & 63 deletions

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‎arch/arm/boot/dts/rk3288-android.dtsi‎

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -395,15 +395,6 @@
395395

396396
&cpu0_opp_table {
397397
rockchip,avs-enable = <1>;
398-
clocks = <&cru PLL_APLL>;
399-
leakage-scaling-sel = <0 254 25>;
400-
401-
opp-1800000000 {
402-
opp-hz = /bits/ 64 <1800000000>;
403-
opp-microvolt = <1350000 1350000 1350000>;
404-
clock-latency-ns = <40000>;
405-
status = "disabled";
406-
};
407398
};
408399

409400
&cpu1 {

‎arch/arm/boot/dts/rk3288.dtsi‎

Lines changed: 86 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -131,112 +131,132 @@
131131
compatible = "operating-points-v2";
132132
opp-shared;
133133

134+
clocks = <&cru PLL_APLL>;
134135
rockchip,avs-scale = <17>;
135-
nvmem-cells = <&cpu_leakage>;
136-
nvmem-cell-names = "cpu_leakage";
137-
136+
rockchip,max-volt = <1350000>;
137+
nvmem-cells = <&cpu_leakage>, <&special_function>,
138+
<&performance>, <&process_version>;
139+
nvmem-cell-names = "leakage", "special",
140+
"performance", "process";
141+
rockchip,bin-scaling-sel = <
142+
0 17
143+
1 25
144+
2 31
145+
>;
138146
rockchip,pvtm-voltage-sel = <
139-
0 15000 0
140-
15001 16000 1
141-
16001 99999 2
147+
0 14300 0
148+
14301 15000 1
149+
15001 16000 2
150+
16001 99999 3
142151
>;
143152
rockchip,pvtm-freq = <408000>;
144153
rockchip,pvtm-volt = <1000000>;
145154
rockchip,pvtm-ch = <0 0>;
146155
rockchip,pvtm-sample-time = <1000>;
147156
rockchip,pvtm-number = <10>;
148157
rockchip,pvtm-error = <1000>;
149-
rockchip,pvtm-ref-temp = <20>;
150-
rockchip,pvtm-temp-prop = <12 12>;
158+
rockchip,pvtm-ref-temp = <35>;
159+
rockchip,pvtm-temp-prop = <(-18) (-18)>;
151160
rockchip,pvtm-thermal-zone = "soc-thermal";
152161

153162
opp-126000000 {
154163
opp-hz = /bits/ 64 <126000000>;
155-
opp-microvolt = <900000 900000 1350000>;
156-
opp-microvolt-L0 = <900000 900000 1350000>;
157-
opp-microvolt-L1 = <900000 900000 1350000>;
158-
opp-microvolt-L2 = <900000 900000 1350000>;
164+
opp-microvolt = <950000 950000 1350000>;
165+
opp-microvolt-L0 = <950000 950000 1350000>;
166+
opp-microvolt-L1 = <950000 950000 1350000>;
167+
opp-microvolt-L2 = <950000 950000 1350000>;
168+
opp-microvolt-L3 = <950000 950000 1350000>;
159169
clock-latency-ns = <40000>;
160170
};
161171
opp-216000000 {
162172
opp-hz = /bits/ 64 <216000000>;
163-
opp-microvolt = <900000 900000 1350000>;
164-
opp-microvolt-L0 = <900000 900000 1350000>;
165-
opp-microvolt-L1 = <900000 900000 1350000>;
166-
opp-microvolt-L2 = <900000 900000 1350000>;
173+
opp-microvolt = <950000 950000 1350000>;
174+
opp-microvolt-L0 = <950000 950000 1350000>;
175+
opp-microvolt-L1 = <950000 950000 1350000>;
176+
opp-microvolt-L2 = <950000 950000 1350000>;
177+
opp-microvolt-L3 = <950000 950000 1350000>;
167178
clock-latency-ns = <40000>;
168179
};
169180
opp-408000000 {
170181
opp-hz = /bits/ 64 <408000000>;
171-
opp-microvolt = <900000 900000 1350000>;
172-
opp-microvolt-L0 = <900000 900000 1350000>;
173-
opp-microvolt-L1 = <900000 900000 1350000>;
174-
opp-microvolt-L2 = <900000 900000 1350000>;
182+
opp-microvolt = <975000 975000 1350000>;
183+
opp-microvolt-L0 = <975000 975000 1350000>;
184+
opp-microvolt-L1 = <950000 950000 1350000>;
185+
opp-microvolt-L2 = <950000 950000 1350000>;
186+
opp-microvolt-L3 = <950000 950000 1350000>;
175187
clock-latency-ns = <40000>;
176188
};
177189
opp-600000000 {
178190
opp-hz = /bits/ 64 <600000000>;
179-
opp-microvolt = <900000 900000 1350000>;
180-
opp-microvolt-L0 = <900000 900000 1350000>;
181-
opp-microvolt-L1 = <900000 900000 1350000>;
182-
opp-microvolt-L2 = <900000 900000 1350000>;
191+
opp-microvolt = <975000 975000 1350000>;
192+
opp-microvolt-L0 = <975000 975000 1350000>;
193+
opp-microvolt-L1 = <950000 950000 1350000>;
194+
opp-microvolt-L2 = <950000 950000 1350000>;
195+
opp-microvolt-L3 = <950000 950000 1350000>;
183196
clock-latency-ns = <40000>;
184197
};
185198
opp-696000000 {
186199
opp-hz = /bits/ 64 <696000000>;
187-
opp-microvolt = <950000 950000 1350000>;
188-
opp-microvolt-L0 = <950000 950000 1350000>;
189-
opp-microvolt-L1 = <900000 900000 1350000>;
190-
opp-microvolt-L2 = <900000 900000 1350000>;
200+
opp-microvolt = <975000 975000 1350000>;
201+
opp-microvolt-L0 = <975000 975000 1350000>;
202+
opp-microvolt-L1 = <950000 950000 1350000>;
203+
opp-microvolt-L2 = <950000 950000 1350000>;
204+
opp-microvolt-L3 = <950000 950000 1350000>;
191205
clock-latency-ns = <40000>;
192206
};
193207
opp-816000000 {
194208
opp-hz = /bits/ 64 <816000000>;
195-
opp-microvolt = <1050000 1050000 1350000>;
196-
opp-microvolt-L0 = <1050000 1050000 1350000>;
197-
opp-microvolt-L1 = <1000000 1000000 1350000>;
198-
opp-microvolt-L2 = <950000 950000 1350000>;
209+
opp-microvolt = <1075000 1075000 1350000>;
210+
opp-microvolt-L0 = <1075000 1075000 1350000>;
211+
opp-microvolt-L1 = <1050000 1050000 1350000>;
212+
opp-microvolt-L2 = <1000000 1000000 1350000>;
213+
opp-microvolt-L3 = <950000 950000 1350000>;
199214
clock-latency-ns = <40000>;
200215
opp-suspend;
201216
};
202217
opp-1008000000 {
203218
opp-hz = /bits/ 64 <1008000000>;
204-
opp-microvolt = <1100000 1100000 1350000>;
205-
opp-microvolt-L0 = <1100000 1100000 1350000>;
206-
opp-microvolt-L1 = <1050000 1050000 1350000>;
207-
opp-microvolt-L2 = <1000000 1000000 1350000>;
208-
clock-latency-ns = <40000>;
209-
};
210-
opp-1200000000 {
211-
opp-hz = /bits/ 64 <1200000000>;
212219
opp-microvolt = <1150000 1150000 1350000>;
213220
opp-microvolt-L0 = <1150000 1150000 1350000>;
214221
opp-microvolt-L1 = <1100000 1100000 1350000>;
215222
opp-microvolt-L2 = <1050000 1050000 1350000>;
223+
opp-microvolt-L3 = <1000000 1000000 1350000>;
224+
clock-latency-ns = <40000>;
225+
};
226+
opp-1200000000 {
227+
opp-hz = /bits/ 64 <1200000000>;
228+
opp-microvolt = <1200000 1200000 1350000>;
229+
opp-microvolt-L0 = <1200000 1200000 1350000>;
230+
opp-microvolt-L1 = <1150000 1150000 1350000>;
231+
opp-microvolt-L2 = <1100000 1100000 1350000>;
232+
opp-microvolt-L3 = <1050000 1050000 1350000>;
216233
clock-latency-ns = <40000>;
217234
};
218235
opp-1416000000 {
219236
opp-hz = /bits/ 64 <1416000000>;
220-
opp-microvolt = <1250000 1250000 1350000>;
221-
opp-microvolt-L0 = <1250000 1250000 1350000>;
222-
opp-microvolt-L1 = <1200000 1200000 1350000>;
223-
opp-microvolt-L2 = <1150000 1150000 1350000>;
237+
opp-microvolt = <1350000 1350000 1350000>;
238+
opp-microvolt-L0 = <1350000 1350000 1350000>;
239+
opp-microvolt-L1 = <1250000 1250000 1350000>;
240+
opp-microvolt-L2 = <1200000 1200000 1350000>;
241+
opp-microvolt-L3 = <1150000 1150000 1350000>;
224242
clock-latency-ns = <40000>;
225243
};
226244
opp-1512000000 {
227245
opp-hz = /bits/ 64 <1512000000>;
228-
opp-microvolt = <1300000 1300000 1350000>;
229-
opp-microvolt-L0 = <1300000 1300000 1350000>;
230-
opp-microvolt-L1 = <1250000 1250000 1350000>;
231-
opp-microvolt-L2 = <1200000 1200000 1350000>;
246+
opp-microvolt = <1350000 1350000 1350000>;
247+
opp-microvolt-L0 = <1350000 1350000 1350000>;
248+
opp-microvolt-L1 = <1300000 1300000 1350000>;
249+
opp-microvolt-L2 = <1250000 1250000 1350000>;
250+
opp-microvolt-L3 = <1200000 1200000 1350000>;
232251
clock-latency-ns = <40000>;
233252
};
234253
opp-1608000000 {
235254
opp-hz = /bits/ 64 <1608000000>;
236255
opp-microvolt = <1350000 1350000 1350000>;
237256
opp-microvolt-L0 = <1350000 1350000 1350000>;
238-
opp-microvolt-L1 = <1300000 1300000 1350000>;
239-
opp-microvolt-L2 = <1250000 1250000 1350000>;
257+
opp-microvolt-L1 = <1350000 1350000 1350000>;
258+
opp-microvolt-L2 = <1300000 1300000 1350000>;
259+
opp-microvolt-L3 = <1250000 1250000 1350000>;
240260
clock-latency-ns = <40000>;
241261
};
242262
};
@@ -1709,9 +1729,9 @@
17091729
opp-hz = /bits/ 64 <400000000>;
17101730
opp-microvolt = <1100000>;
17111731
};
1712-
opp-600000000 {
1713-
opp-hz = /bits/ 64 <600000000>;
1714-
opp-microvolt = <1250000>;
1732+
opp-480000000 {
1733+
opp-hz = /bits/ 64 <480000000>;
1734+
opp-microvolt = <1200000>;
17151735
};
17161736
};
17171737

@@ -1763,12 +1783,24 @@
17631783
clocks = <&cru PCLK_EFUSE256>;
17641784
clock-names = "pclk_efuse";
17651785

1786+
special_function: special-function@5 {
1787+
reg = <0x5 0x1>;
1788+
bits = <4 4>;
1789+
};
1790+
process_version: process-version@6 {
1791+
reg = <0x6 0x1>;
1792+
bits = <0 4>;
1793+
};
17661794
efuse_id: id@7 {
17671795
reg = <0x7 0x10>;
17681796
};
1769-
cpu_leakage: cpu_leakage@17 {
1797+
cpu_leakage: cpu-leakage@17 {
17701798
reg = <0x17 0x1>;
17711799
};
1800+
performance: performance@1d {
1801+
reg = <0x1d 0x1>;
1802+
bits = <4 3>;
1803+
};
17721804
};
17731805

17741806
gic: interrupt-controller@ffc01000 {

‎arch/arm/boot/dts/rk3288cg-opp.dtsi‎

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
4+
*/
5+
6+
&cpu0_opp_table {
7+
opp-1704000000 {
8+
opp-hz = /bits/ 64 <1704000000>;
9+
opp-microvolt = <1350000 1350000 1350000>;
10+
opp-microvolt-L0 = <1350000 1350000 1350000>;
11+
opp-microvolt-L1 = <1350000 1350000 1350000>;
12+
opp-microvolt-L2 = <1350000 1350000 1350000>;
13+
opp-microvolt-L3 = <1300000 1300000 1350000>;
14+
clock-latency-ns = <40000>;
15+
};
16+
opp-1800000000 {
17+
opp-hz = /bits/ 64 <1800000000>;
18+
opp-microvolt = <1350000 1350000 1350000>;
19+
opp-microvolt-L0 = <1350000 1350000 1350000>;
20+
opp-microvolt-L1 = <1350000 1350000 1350000>;
21+
opp-microvolt-L2 = <1350000 1350000 1350000>;
22+
opp-microvolt-L3 = <1350000 1350000 1350000>;
23+
clock-latency-ns = <40000>;
24+
};
25+
};
26+
27+
&gpu_opp_table {
28+
opp-600000000 {
29+
opp-hz = /bits/ 64 <600000000>;
30+
opp-microvolt = <1250000>;
31+
};
32+
};

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