ARM: dts: rockchip: add clocks for iommu in RK3288

As the commit "iommu/rockchip: Add pd/clk operation in iommu"
make iommu could operation clocks and power, this commit
would assign clocks to VPU, HEVC and VOP at rk3288.

Change-Id: I6a8f57e41e7db4f57200481e5a45dd24324c72f2
Signed-off-by: Randy Li <randy.li@rock-chips.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

Author: yueshu

arch/arm/boot/dts/rk3288.dtsi

@@ -1029,6 +1029,8 @@
 		reg = <0xff930300 0x100>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vopb_mmu";
+		clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3288_PD_VIO>;
 		#iommu-cells = <0>;
 		status = "disabled";
@@ -1078,6 +1080,8 @@
 		reg = <0xff940300 0x100>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vopl_mmu";
+		clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3288_PD_VIO>;
 		#iommu-cells = <0>;
 		status = "disabled";
@@ -1290,6 +1294,8 @@
 		reg = <0xff9a0800 0x100>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "hclk";
 		power-domains = <&power RK3288_PD_VIDEO>;
 		#iommu-cells = <0>;
 	};
@@ -1331,6 +1337,11 @@
 		reg = <0xff9c0440 0x40>, <0xff9c0480 0x40>;
 		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "hevc_mmu";
+		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+			<&cru SCLK_HEVC_CORE>,
+			<&cru SCLK_HEVC_CABAC>;
+		clock-names = "aclk", "hclk", "clk_core",
+			"clk_cabac";
 		power-domains = <&power RK3288_PD_HEVC>;
 		#iommu-cells = <0>;
 	};