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Alex Shi
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Merge tag 'v4.4.11' into linux-linaro-lsk-v4.4
 This is the 4.4.11 stable release
2 parents e37ddf2 + 544ec5b commit 510d0a3

108 files changed

Lines changed: 844 additions & 480 deletions

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‎Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
VERSION = 4
22
PATCHLEVEL = 4
3-
SUBLEVEL = 10
3+
SUBLEVEL = 11
44
EXTRAVERSION =
55
NAME = Blurry Fish Butt
66

‎arch/arm/boot/dts/at91sam9x5.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@
106106

107107
pmc: pmc@fffffc00 {
108108
compatible = "atmel,at91sam9x5-pmc", "syscon";
109-
reg = <0xfffffc00 0x100>;
109+
reg = <0xfffffc00 0x200>;
110110
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
111111
interrupt-controller;
112112
#address-cells = <1>;

‎arch/s390/include/asm/mmu.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ typedef struct {
1111
spinlock_t list_lock;
1212
struct list_head pgtable_list;
1313
struct list_head gmap_list;
14-
unsigned long asce_bits;
14+
unsigned long asce;
1515
unsigned long asce_limit;
1616
unsigned long vdso_base;
1717
/* The mmu context allocates 4K page tables. */

‎arch/s390/include/asm/mmu_context.h‎

Lines changed: 22 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -26,12 +26,28 @@ static inline int init_new_context(struct task_struct *tsk,
2626
mm->context.has_pgste = 0;
2727
mm->context.use_skey = 0;
2828
#endif
29-
if (mm->context.asce_limit == 0) {
29+
switch (mm->context.asce_limit) {
30+
case 1UL << 42:
31+
/*
32+
* forked 3-level task, fall through to set new asce with new
33+
* mm->pgd
34+
*/
35+
case 0:
3036
/* context created by exec, set asce limit to 4TB */
31-
mm->context.asce_bits = _ASCE_TABLE_LENGTH |
32-
_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
3337
mm->context.asce_limit = STACK_TOP_MAX;
34-
} else if (mm->context.asce_limit == (1UL << 31)) {
38+
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
39+
_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
40+
break;
41+
case 1UL << 53:
42+
/* forked 4-level task, set new asce with new mm->pgd */
43+
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
44+
_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
45+
break;
46+
case 1UL << 31:
47+
/* forked 2-level compat task, set new asce with new mm->pgd */
48+
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
49+
_ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
50+
/* pgd_alloc() did not increase mm->nr_pmds */
3551
mm_inc_nr_pmds(mm);
3652
}
3753
crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
@@ -42,7 +58,7 @@ static inline int init_new_context(struct task_struct *tsk,
4258

4359
static inline void set_user_asce(struct mm_struct *mm)
4460
{
45-
S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
61+
S390_lowcore.user_asce = mm->context.asce;
4662
if (current->thread.mm_segment.ar4)
4763
__ctl_load(S390_lowcore.user_asce, 7, 7);
4864
set_cpu_flag(CIF_ASCE);
@@ -71,7 +87,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
7187
{
7288
int cpu = smp_processor_id();
7389

74-
S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
90+
S390_lowcore.user_asce = next->context.asce;
7591
if (prev == next)
7692
return;
7793
if (MACHINE_HAS_TLB_LC)

‎arch/s390/include/asm/pgalloc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -56,8 +56,8 @@ static inline unsigned long pgd_entry_type(struct mm_struct *mm)
5656
return _REGION2_ENTRY_EMPTY;
5757
}
5858

59-
int crst_table_upgrade(struct mm_struct *, unsigned long limit);
60-
void crst_table_downgrade(struct mm_struct *, unsigned long limit);
59+
int crst_table_upgrade(struct mm_struct *);
60+
void crst_table_downgrade(struct mm_struct *);
6161

6262
static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address)
6363
{

‎arch/s390/include/asm/processor.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ extern __vector128 init_task_fpu_regs[__NUM_VXRS];
163163
regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
164164
regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
165165
regs->gprs[15] = new_stackp; \
166-
crst_table_downgrade(current->mm, 1UL << 31); \
166+
crst_table_downgrade(current->mm); \
167167
execve_tail(); \
168168
} while (0)
169169

‎arch/s390/include/asm/tlbflush.h‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -110,8 +110,7 @@ static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)
110110
static inline void __tlb_flush_kernel(void)
111111
{
112112
if (MACHINE_HAS_IDTE)
113-
__tlb_flush_idte((unsigned long) init_mm.pgd |
114-
init_mm.context.asce_bits);
113+
__tlb_flush_idte(init_mm.context.asce);
115114
else
116115
__tlb_flush_global();
117116
}
@@ -133,8 +132,7 @@ static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)
133132
static inline void __tlb_flush_kernel(void)
134133
{
135134
if (MACHINE_HAS_TLB_LC)
136-
__tlb_flush_idte_local((unsigned long) init_mm.pgd |
137-
init_mm.context.asce_bits);
135+
__tlb_flush_idte_local(init_mm.context.asce);
138136
else
139137
__tlb_flush_local();
140138
}
@@ -148,8 +146,7 @@ static inline void __tlb_flush_mm(struct mm_struct * mm)
148146
* only ran on the local cpu.
149147
*/
150148
if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
151-
__tlb_flush_asce(mm, (unsigned long) mm->pgd |
152-
mm->context.asce_bits);
149+
__tlb_flush_asce(mm, mm->context.asce);
153150
else
154151
__tlb_flush_full(mm);
155152
}

‎arch/s390/mm/init.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,8 @@ void __init paging_init(void)
8989
asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
9090
pgd_type = _REGION3_ENTRY_EMPTY;
9191
}
92-
S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
92+
init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
93+
S390_lowcore.kernel_asce = init_mm.context.asce;
9394
clear_table((unsigned long *) init_mm.pgd, pgd_type,
9495
sizeof(unsigned long)*2048);
9596
vmem_map_init();

‎arch/s390/mm/mmap.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,7 @@ int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags)
174174
if (!(flags & MAP_FIXED))
175175
addr = 0;
176176
if ((addr + len) >= TASK_SIZE)
177-
return crst_table_upgrade(current->mm, 1UL << 53);
177+
return crst_table_upgrade(current->mm);
178178
return 0;
179179
}
180180

@@ -191,7 +191,7 @@ s390_get_unmapped_area(struct file *filp, unsigned long addr,
191191
return area;
192192
if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < (1UL << 53)) {
193193
/* Upgrade the page table to 4 levels and retry. */
194-
rc = crst_table_upgrade(mm, 1UL << 53);
194+
rc = crst_table_upgrade(mm);
195195
if (rc)
196196
return (unsigned long) rc;
197197
area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
@@ -213,7 +213,7 @@ s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr,
213213
return area;
214214
if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < (1UL << 53)) {
215215
/* Upgrade the page table to 4 levels and retry. */
216-
rc = crst_table_upgrade(mm, 1UL << 53);
216+
rc = crst_table_upgrade(mm);
217217
if (rc)
218218
return (unsigned long) rc;
219219
area = arch_get_unmapped_area_topdown(filp, addr, len,

‎arch/s390/mm/pgtable.c‎

Lines changed: 28 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -49,81 +49,52 @@ static void __crst_table_upgrade(void *arg)
4949
__tlb_flush_local();
5050
}
5151

52-
int crst_table_upgrade(struct mm_struct *mm, unsigned long limit)
52+
int crst_table_upgrade(struct mm_struct *mm)
5353
{
5454
unsigned long *table, *pgd;
55-
unsigned long entry;
56-
int flush;
5755

58-
BUG_ON(limit > (1UL << 53));
59-
flush = 0;
60-
repeat:
56+
/* upgrade should only happen from 3 to 4 levels */
57+
BUG_ON(mm->context.asce_limit != (1UL << 42));
58+
6159
table = crst_table_alloc(mm);
6260
if (!table)
6361
return -ENOMEM;
62+
6463
spin_lock_bh(&mm->page_table_lock);
65-
if (mm->context.asce_limit < limit) {
66-
pgd = (unsigned long *) mm->pgd;
67-
if (mm->context.asce_limit <= (1UL << 31)) {
68-
entry = _REGION3_ENTRY_EMPTY;
69-
mm->context.asce_limit = 1UL << 42;
70-
mm->context.asce_bits = _ASCE_TABLE_LENGTH |
71-
_ASCE_USER_BITS |
72-
_ASCE_TYPE_REGION3;
73-
} else {
74-
entry = _REGION2_ENTRY_EMPTY;
75-
mm->context.asce_limit = 1UL << 53;
76-
mm->context.asce_bits = _ASCE_TABLE_LENGTH |
77-
_ASCE_USER_BITS |
78-
_ASCE_TYPE_REGION2;
79-
}
80-
crst_table_init(table, entry);
81-
pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
82-
mm->pgd = (pgd_t *) table;
83-
mm->task_size = mm->context.asce_limit;
84-
table = NULL;
85-
flush = 1;
86-
}
64+
pgd = (unsigned long *) mm->pgd;
65+
crst_table_init(table, _REGION2_ENTRY_EMPTY);
66+
pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
67+
mm->pgd = (pgd_t *) table;
68+
mm->context.asce_limit = 1UL << 53;
69+
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
70+
_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
71+
mm->task_size = mm->context.asce_limit;
8772
spin_unlock_bh(&mm->page_table_lock);
88-
if (table)
89-
crst_table_free(mm, table);
90-
if (mm->context.asce_limit < limit)
91-
goto repeat;
92-
if (flush)
93-
on_each_cpu(__crst_table_upgrade, mm, 0);
73+
74+
on_each_cpu(__crst_table_upgrade, mm, 0);
9475
return 0;
9576
}
9677

97-
void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)
78+
void crst_table_downgrade(struct mm_struct *mm)
9879
{
9980
pgd_t *pgd;
10081

82+
/* downgrade should only happen from 3 to 2 levels (compat only) */
83+
BUG_ON(mm->context.asce_limit != (1UL << 42));
84+
10185
if (current->active_mm == mm) {
10286
clear_user_asce();
10387
__tlb_flush_mm(mm);
10488
}
105-
while (mm->context.asce_limit > limit) {
106-
pgd = mm->pgd;
107-
switch (pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) {
108-
case _REGION_ENTRY_TYPE_R2:
109-
mm->context.asce_limit = 1UL << 42;
110-
mm->context.asce_bits = _ASCE_TABLE_LENGTH |
111-
_ASCE_USER_BITS |
112-
_ASCE_TYPE_REGION3;
113-
break;
114-
case _REGION_ENTRY_TYPE_R3:
115-
mm->context.asce_limit = 1UL << 31;
116-
mm->context.asce_bits = _ASCE_TABLE_LENGTH |
117-
_ASCE_USER_BITS |
118-
_ASCE_TYPE_SEGMENT;
119-
break;
120-
default:
121-
BUG();
122-
}
123-
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
124-
mm->task_size = mm->context.asce_limit;
125-
crst_table_free(mm, (unsigned long *) pgd);
126-
}
89+
90+
pgd = mm->pgd;
91+
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
92+
mm->context.asce_limit = 1UL << 31;
93+
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
94+
_ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
95+
mm->task_size = mm->context.asce_limit;
96+
crst_table_free(mm, (unsigned long *) pgd);
97+
12798
if (current->active_mm == mm)
12899
set_user_asce(mm);
129100
}

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