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Ard Biesheuvel
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arm64: kernel: replace early 64-bit literal loads with move-immediates
When building a relocatable kernel, we currently rely on the fact that early 64-bit literal loads need to be deferred to after the relocation has been performed only if they involve symbol references, and not if they involve assemble time constants. While this is not an unreasonable assumption to make, it is better to switch to movk/movz sequences, since these are guaranteed to be resolved at link time, simply because there are no dynamic relocation types to describe them. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit b03cc885328e3c0de61843737d42eb0a0f112aab) Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Lines changed: 4 additions & 4 deletions

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arch/arm64/kernel/head.S

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -335,7 +335,7 @@ __create_page_tables:
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cmp x0, x6
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b.lo 1b
337337

338-
ldr x7, =SWAPPER_MM_MMUFLAGS
338+
mov x7, SWAPPER_MM_MMUFLAGS
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/*
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* Create the identity mapping.
@@ -391,7 +391,7 @@ __create_page_tables:
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* Map the kernel image (starting with PHYS_OFFSET).
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*/
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mov x0, x26 // swapper_pg_dir
394-
ldr x5, =KIMAGE_VADDR
394+
mov_q x5, KIMAGE_VADDR
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add x5, x5, x23 // add KASLR displacement
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create_pgd_entry x0, x5, x3, x6
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ldr w6, =kernel_img_size
@@ -604,7 +604,7 @@ ENTRY(secondary_holding_pen)
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bl el2_setup // Drop to EL1, w20=cpu_boot_mode
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bl set_cpu_boot_mode_flag
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mrs x0, mpidr_el1
607-
ldr x1, =MPIDR_HWID_BITMASK
607+
mov_q x1, MPIDR_HWID_BITMASK
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and x0, x0, x1
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adr_l x3, secondary_holding_pen_release
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pen: ldr x4, [x3]
@@ -717,7 +717,7 @@ __primary_switch:
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ldr w9, =__rela_offset // offset to reloc table
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ldr w10, =__rela_size // size of reloc table
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720-
ldr x11, =KIMAGE_VADDR // default virtual offset
720+
mov_q x11, KIMAGE_VADDR // default virtual offset
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add x11, x11, x23 // actual virtual offset
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add x8, x8, x11 // __va(.dynsym)
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add x9, x9, x11 // __va(.rela)

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