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Merge remote-tracking branch 'rockchip/release-4.4' into sbc/tinkerboard/arks/Debian-9.0 branch
Change-Id: Id5e7650e8e621e8f4f1a8e714a3899c38219ac4b
2 parents 7a85065 + b075e3b commit 9693a61

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.gitignore

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@@ -42,6 +42,7 @@ Module.symvers
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#
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# Top-level generic files
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#
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/boot.img
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/kernel.img
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/resource.img
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/tags

.mailmap

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@@ -14,6 +14,7 @@ Adrian Bunk <bunk@stusta.de>
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Alan Cox <alan@lxorguk.ukuu.org.uk>
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Alan Cox <root@hraefn.swansea.linux.org.uk>
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Aleksey Gorelov <aleksey_gorelov@phoenix.com>
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Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com>
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Al Viro <viro@ftp.linux.org.uk>
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Al Viro <viro@zenIV.linux.org.uk>
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Andreas Herrmann <aherrman@de.ibm.com>
@@ -85,6 +86,7 @@ Matthieu CASTET <castet.matthieu@free.fr>
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Mayuresh Janorkar <mayur@ti.com>
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Michael Buesch <m@bues.ch>
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Michel Dänzer <michel@tungstengraphics.com>
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Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
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Mitesh shah <mshah@teja.com>
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Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>
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Morten Welinder <terra@gnome.org>

Documentation/ABI/testing/sysfs-fs-f2fs

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@@ -186,3 +186,9 @@ Date: August 2017
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Contact: "Jaegeuk Kim" <jaegeuk@kernel.org>
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Description:
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Controls sleep time of GC urgent mode
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What: /sys/fs/f2fs/<disk>/readdir_ra
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Date: November 2017
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Contact: "Sheng Yong" <shengyong1@huawei.com>
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Description:
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Controls readahead inode block in readdir.
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#
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# (C) COPYRIGHT 2013-2018 ARM Limited. All rights reserved.
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#
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# This program is free software and is provided to you under the terms of the
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# GNU General Public License version 2 as published by the Free Software
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# Foundation, and any use by you of this program is subject to the terms
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# of such GNU licence.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, you can access it online at
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# http://www.gnu.org/licenses/gpl-2.0.html.
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#
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# SPDX-License-Identifier: GPL-2.0
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#
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#
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* ARM Mali Midgard devices
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Required properties:
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- compatible : Should be mali<chip>, replacing digits with x from the back,
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until malit<Major>xx, ending with arm,mali-midgard, the latter not optional.
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- reg : Physical base address of the device and length of the register area.
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- interrupts : Contains the three IRQ lines required by T-6xx devices
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- interrupt-names : Contains the names of IRQ resources in the order they were
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provided in the interrupts property. Must contain: "JOB, "MMU", "GPU".
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Optional:
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- clocks : Phandle to clock for the Mali T-6xx device.
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- clock-names : Shall be "clk_mali".
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- mali-supply : Phandle to regulator for the Mali device. Refer to
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Documentation/devicetree/bindings/regulator/regulator.txt for details.
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- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt
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for details.
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- jm_config : For T860/T880. Sets job manager configuration. An array containing:
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- 1 to override the TIMESTAMP value, 0 otherwise.
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- 1 to override clock gate, forcing them to be always on, 0 otherwise.
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- 1 to enable job throttle, limiting the number of cores that can be started
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simultaneously, 0 otherwise.
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- Value between 0 and 63 (including). If job throttle is enabled, this is one
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less than the number of cores that can be started simultaneously.
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- power_model : Sets the power model parameters. Three power models are currently
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defined which include "mali-simple-power-model", "mali-g71-power-model" and
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"mali-g72-power-model".
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- mali-simple-power-model: this model derives the GPU power usage based
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on the GPU voltage scaled by the system temperature. Note: it was
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designed for the Juno platform, and may not be suitable for others.
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- compatible: Should be "arm,mali-simple-power-model"
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- dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is
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multiplied by v^2*f to calculate the dynamic power consumption.
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- static-coefficient: Coefficient, in uW/V^3, which is
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multiplied by v^3 to calculate the static power consumption.
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- ts: An array containing coefficients for the temperature
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scaling factor. This is used to scale the static power by a
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factor of tsf/1000000,
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where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0],
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and T = temperature in degrees.
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- thermal-zone: A string identifying the thermal zone used for
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the GPU
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- temp-poll-interval-ms: the interval at which the system
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temperature is polled
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- mali-g71-power-model / mali-g72-power-model: these models derive
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the GPU power usage based on performance counters, so they are more
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accurate.
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- compatible: Should be "arm,mali-g71-power-model" /
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"arm,mali-g72-power-model"
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- scale: the dynamic power calculated by the power model is
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scaled by a factor of "scale"/1000. This value should be
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chosen to match a particular implementation.
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* Note: when IPA is used, two separate power models (simple and counter-based)
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are used at different points so care should be taken to configure
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both power models in the device tree (specifically dynamic-coefficient,
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static-coefficient and scale) to best match the platform.
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- system-coherency : Sets the coherency protocol to be used for coherent
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accesses made from the GPU.
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If not set then no coherency is used.
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- 0 : ACE-Lite
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- 1 : ACE
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- 31 : No coherency
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- ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the
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model is not found in the registered models list. If no model is specified here,
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a gpu-id based model is picked if available, otherwise the default model is used.
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- mali-simple-power-model: Default model used on mali
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- protected-mode-switcher : Phandle to device implemented protected mode switching functionality.
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Refer to Documentation/devicetree/bindings/arm/smc-protected-mode-switcher.txt for one implementation.
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Example for a Mali GPU:
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gpu@0xfc010000 {
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compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
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reg = <0xfc010000 0x4000>;
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interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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interrupt-names = "JOB", "MMU", "GPU";
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clocks = <&pclk_mali>;
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clock-names = "clk_mali";
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mali-supply = <&vdd_mali>;
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operating-points-v2 = <&gpu_opp_table>;
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power_model@0 {
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compatible = "arm,mali-simple-power-model";
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static-coefficient = <2427750>;
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dynamic-coefficient = <4687>;
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ts = <20000 2000 (-20) 2>;
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thermal-zone = "gpu";
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};
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power_model@1 {
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compatible = "arm,mali-g71-power-model";
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scale = <5>;
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};
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};
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gpu_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp@533000000 {
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opp-hz = /bits/ 64 <533000000>;
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opp-microvolt = <1250000>;
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};
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opp@450000000 {
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opp-hz = /bits/ 64 <450000000>;
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opp-microvolt = <1150000>;
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};
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opp@400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1125000>;
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};
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opp@350000000 {
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opp-hz = /bits/ 64 <350000000>;
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opp-microvolt = <1075000>;
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};
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opp@266000000 {
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opp-hz = /bits/ 64 <266000000>;
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opp-microvolt = <1025000>;
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};
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opp@160000000 {
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opp-hz = /bits/ 64 <160000000>;
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opp-microvolt = <925000>;
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};
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opp@100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <912500>;
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};
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};

Documentation/devicetree/bindings/arm/rockchip.txt

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- Rockchip PX30 evb ddr4 board:
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Required root node properties:
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- compatible = "rockchip,px30-evb-ddr4-v10", "rockchip,px30";
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- Rockchip android things full function board:
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Required root node properties:
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- compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229";
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- Rockchip android things full function board:
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Required root node properties:
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- compatible = "rockchip,rk3229-at-3nod-func", "rockchip,rk3229";
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* Rockchip RK3308 Clock and Reset Unit
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The RK3308 clock controller generates and supplies clock to various
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controllers within the SoC and also implements a reset controller for SoC
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peripherals.
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Required Properties:
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- compatible: CRU should be "rockchip,rk3308-cru"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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- #reset-cells: should be 1.
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Optional Properties:
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- rockchip,grf: phandle to the syscon managing the "general register files"
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If missing, pll rates are not changeable, due to the missing pll lock status.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be
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used in device tree sources. Similar macros exist for the reset sources in
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these files.
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External clocks:
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There are several clocks that are generated outside the SoC. It is expected
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that they are defined using standard clock bindings with following
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clock-output-names:
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- "xin24m" - crystal input - required,
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- "xin32k" - rtc clock - optional,
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- "mclk_i2sx_xch_in" - external I2S or SPDIF clock - optional,
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- "mac_clkin" - external MAC clock - optional
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Example: Clock controller node:
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cru: clock-controller@ff500000 {
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compatible = "rockchip,rk3308-cru";
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reg = <0x0 0xff500000 0x0 0x1000>;
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rockchip,grf = <&grf>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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Example: UART controller node that consumes the clock generated by the clock
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controller:
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uart0: serial@ff0a0000 {
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compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
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reg = <0x0 0xff0a0000 0x0 0x100>;
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
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clock-names = "baudclk", "apb_pclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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status = "disabled";
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};

Documentation/devicetree/bindings/devfreq/rockchip_dmc.txt

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- "rockchip,rk3128-dmc" - for RK3128 SoCs.
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- "rockchip,rk3228-dmc" - for RK3228 SoCs.
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- "rockchip,rk3288-dmc" - for RK3288 SoCs.
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- "rockchip,rk3308-dmc" - for RK3308 SoCs.
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- "rockchip,rk3328-dmc" - for RK3328 SoCs.
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- "rockchip,rk3368-dmc" - for RK3368 SoCs.
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- "rockchip,rk3399-dmc" - for RK3399 SoCs.
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Device-Tree bindings for dw hdmi hdcp2
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Required properties:
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- compatible : Should be "rockchip,rk3399-hdmi-hdcp2".
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Example:
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hdmi_hdcp2: hdmi-hdcp2@ff988000 {
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compatible = "rockchip,rk3399-hdmi-hdcp2";
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reg = <0x0 0xff988000 0x0 0x2000>;
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interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru ACLK_HDCP22>, <&cru PCLK_HDCP22>,
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<&cru HCLK_HDCP22>;
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clock-names ="aclk_hdcp2", "pclk_hdcp2", "hdcp2_clk_hdmi";
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status = "disabled";
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};
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Android Goldfish framebuffer
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Android Goldfish framebuffer device used by Android emulator.
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Required properties:
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- compatible : should contain "google,goldfish-fb"
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- reg : <registers mapping>
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- interrupts : <interrupt mapping>
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Example:
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display-controller@1f008000 {
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compatible = "google,goldfish-fb";
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interrupts = <0x10>;
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reg = <0x1f008000 0x100>;
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};

Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt

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- rockchip,grf: phandle to the general register files syscon
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For px30 rgb output:
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- pinctrl-names: must contain a "m0" or "m1" entry.
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- pinctrl-0: pin control group to be used for this controller.
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Required nodes:
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The lvds has two video ports as described by
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};
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};
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For Rockchip PX30:
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RGB Output Pinctrl Example:
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&lvds {
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pinctrl-names = "m0";
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pinctrl-0 = <&lcdc_rgb_dclk_pin &lcdc_rgb_m0_den_pin &lcdc_rgb_m0_hsync_pin &lcdc_rgb_m0_vsync_pin &lcdc_rgb666_m0_data_pins>;
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};
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79-
Or
80-
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&lvds {
82-
pinctrl-names = "m1";
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pinctrl-0 = <&lcdc_rgb_dclk_pin &lcdc_rgb666_m1_data_pins>;
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};
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For Rockchip RK3288:
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lvds: lvds@ff96c000 {

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