@@ -4690,7 +4690,7 @@ static int cif_isp10_stop(
46904690{
46914691 unsigned long flags = 0 ;
46924692 bool stop_all ;
4693- int timeout ;
4693+ unsigned long isp_ctrl ;
46944694
46954695 cif_isp10_pltfrm_pr_dbg (dev -> dev ,
46964696 "SP state = %s, MP state = %s, img_src state = %s, stop_sp = %d, stop_mp = %d\n" ,
@@ -4724,12 +4724,15 @@ static int cif_isp10_stop(
47244724 cif_isp10_stop_sp (dev );
47254725 cif_isp10_stop_dma (dev );
47264726
4727- local_irq_save (flags );
47284727 /* stop and clear MI, MIPI, and ISP interrupts */
47294728 cif_iowrite32 (0 , dev -> config .base_addr + CIF_MIPI_IMSC );
47304729 cif_iowrite32 (~0 , dev -> config .base_addr + CIF_MIPI_ICR );
47314730
4732- cif_iowrite32 (0 , dev -> config .base_addr + CIF_ISP_IMSC );
4731+ spin_lock_irqsave (& dev -> isp_state_lock , flags );
4732+ dev -> isp_state = CIF_ISP10_STATE_STOPPING ;
4733+ spin_unlock_irqrestore (& dev -> isp_state_lock , flags );
4734+ dev -> isp_stop_flags = 0 ;
4735+ cif_iowrite32 (CIF_ISP_OFF , dev -> config .base_addr + CIF_ISP_IMSC );
47334736 cif_iowrite32 (~0 , dev -> config .base_addr + CIF_ISP_ICR );
47344737
47354738 cif_iowrite32_verify (0 ,
@@ -4745,13 +4748,19 @@ static int cif_isp10_stop(
47454748 cif_iowrite32OR (CIF_ISP_CTRL_ISP_CFG_UPD ,
47464749 dev -> config .base_addr + CIF_ISP_CTRL );
47474750
4748- timeout = 100 ;
4749- while ((timeout -- > 0 ) &&
4750- ((cif_ioread32 (dev -> config .base_addr + CIF_ISP_RIS )
4751- & CIF_ISP_OFF ) != CIF_ISP_OFF )) {
4752- msleep (20 );
4753- };
4754- local_irq_restore (flags );
4751+ wait_event_interruptible_timeout (dev -> isp_stop_wait ,
4752+ dev -> isp_stop_flags != 0 ,
4753+ HZ );
4754+
4755+ isp_ctrl = cif_ioread32 (dev -> config .base_addr + CIF_ISP_CTRL );
4756+ if ((isp_ctrl & 0x0001 ) != 0 ) {
4757+ cif_isp10_pltfrm_pr_err (dev -> dev ,
4758+ "Stop ISP Failure(0x%lx)!\n" , isp_ctrl );
4759+ } else {
4760+ spin_lock_irqsave (& dev -> isp_state_lock , flags );
4761+ dev -> isp_state = CIF_ISP10_STATE_IDLE ;
4762+ spin_unlock_irqrestore (& dev -> isp_state_lock , flags );
4763+ }
47554764
47564765 if (!CIF_ISP10_INP_IS_DMA (dev -> config .input_sel )) {
47574766 if (IS_ERR_VALUE (cif_isp10_img_src_set_state (dev ,
@@ -4765,19 +4774,15 @@ static int cif_isp10_stop(
47654774 "unable to put CIF into standby\n" );
47664775 } else if (stop_sp ) {
47674776 if (!dev -> config .mi_config .async_updt ) {
4768- local_irq_save (flags );
47694777 cif_isp10_stop_mi (dev , true, false);
4770- local_irq_restore (flags );
47714778 }
47724779 cif_isp10_stop_sp (dev );
47734780 cif_iowrite32AND_verify (~CIF_MI_SP_FRAME ,
47744781 dev -> config .base_addr + CIF_MI_IMSC , ~0 );
47754782
47764783 } else /* stop_mp */ {
47774784 if (!dev -> config .mi_config .async_updt ) {
4778- local_irq_save (flags );
47794785 cif_isp10_stop_mi (dev , false, true);
4780- local_irq_restore (flags );
47814786 }
47824787 cif_isp10_stop_mp (dev );
47834788 cif_iowrite32AND_verify (~(CIF_MI_MP_FRAME |
@@ -4825,6 +4830,7 @@ static int cif_isp10_start(
48254830{
48264831 unsigned int ret ;
48274832 struct vb2_buffer * vb , * n ;
4833+ unsigned long flags ;
48284834
48294835 cif_isp10_pltfrm_pr_dbg (dev -> dev ,
48304836 "SP state = %s, MP state = %s, DMA state = %s, img_src state = %s, start_sp = %d, start_mp = %d\n" ,
@@ -4865,6 +4871,10 @@ static int cif_isp10_start(
48654871 CIF_ISP_CTRL_ISP_INFORM_ENABLE |
48664872 CIF_ISP_CTRL_ISP_ENABLE ,
48674873 dev -> config .base_addr + CIF_ISP_CTRL );
4874+
4875+ spin_lock_irqsave (& dev -> isp_state_lock , flags );
4876+ dev -> isp_state = CIF_ISP10_STATE_RUNNING ;
4877+ spin_unlock_irqrestore (& dev -> isp_state_lock , flags );
48684878 }
48694879
48704880 if (start_sp &&
@@ -5809,6 +5819,22 @@ void cif_isp10_destroy(
58095819 kfree (dev );
58105820}
58115821
5822+ int cif_isp10_g_input (
5823+ struct cif_isp10_device * dev ,
5824+ unsigned int * input )
5825+ {
5826+ unsigned int i ;
5827+
5828+ for (i = 0 ; i < dev -> img_src_cnt ; i ++ ) {
5829+ if (dev -> img_src != NULL && dev -> img_src == dev -> img_src_array [i ]) {
5830+ * input = i ;
5831+ return 0 ;
5832+ }
5833+ }
5834+
5835+ return - EINVAL ;
5836+ }
5837+
58125838int cif_isp10_s_input (
58135839 struct cif_isp10_device * dev ,
58145840 unsigned int input )
@@ -6502,6 +6528,15 @@ int cif_isp10_isp_isr(unsigned int isp_mis, void *cntxt)
65026528 cif_ioread32 (dev -> config .base_addr + CIF_ISP_RIS ),
65036529 cif_ioread32 (dev -> config .base_addr + CIF_ISP_IMSC ));
65046530
6531+ if (isp_mis & CIF_ISP_OFF ) {
6532+ cif_iowrite32 (CIF_ISP_OFF ,
6533+ dev -> config .base_addr + CIF_ISP_ICR );
6534+ cif_isp10_pltfrm_pr_dbg (dev -> dev , "ISP Stop Interrupt!\n" );
6535+ dev -> isp_stop_flags = 1 ;
6536+ wake_up_interruptible (& dev -> isp_stop_wait );
6537+ return 0 ;
6538+ }
6539+
65056540 if (isp_mis & CIF_ISP_V_START ) {
65066541 struct cif_isp10_isp_vs_work * vs_wk ;
65076542 struct cif_isp10_img_src_exp * exp ;
@@ -6603,14 +6638,18 @@ int cif_isp10_isp_isr(unsigned int isp_mis, void *cntxt)
66036638 CIF_ISP_ICR );
66046639 }
66056640
6606- /* Stop ISP */
6607- cif_iowrite32AND (~CIF_ISP_CTRL_ISP_INFORM_ENABLE &
6608- ~CIF_ISP_CTRL_ISP_ENABLE ,
6609- dev -> config .base_addr + CIF_ISP_CTRL );
6610- /* isp_update */
6611- cif_iowrite32OR (CIF_ISP_CTRL_ISP_CFG_UPD ,
6612- dev -> config .base_addr + CIF_ISP_CTRL );
6613- cif_isp10_hw_restart (dev );
6641+ spin_lock (& dev -> isp_state_lock );
6642+ if (dev -> isp_state == CIF_ISP10_STATE_RUNNING ) {
6643+ /* Stop ISP */
6644+ cif_iowrite32AND (~CIF_ISP_CTRL_ISP_INFORM_ENABLE &
6645+ ~CIF_ISP_CTRL_ISP_ENABLE ,
6646+ dev -> config .base_addr + CIF_ISP_CTRL );
6647+ /* isp_update */
6648+ cif_iowrite32OR (CIF_ISP_CTRL_ISP_CFG_UPD ,
6649+ dev -> config .base_addr + CIF_ISP_CTRL );
6650+ cif_isp10_hw_restart (dev );
6651+ }
6652+ spin_unlock (& dev -> isp_state_lock );
66146653 }
66156654
66166655 if (isp_mis & CIF_ISP_FRAME_IN ) {
0 commit comments