video/rockchip: rga2: Compare and merge rga driver on 4.19.

Compatible for develop-4.19 aa638c0dc6ee27ff8f5db447de4fe63bae020d15.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I4b25613fcdb337b3969e0741154e8ff36181cfdf

Author: Yu Qiaowei

drivers/video/rockchip/rga2/rga2_mmu_info.c

@@ -810,7 +810,7 @@ static int rga2_mmu_info_color_palette_mode(struct rga2_reg *reg, struct rga2_re
         }
 
         /* flush data to DDR */
-	rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
+        rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
         rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
         reg->MMU_len = AllSize;
 
@@ -879,7 +879,7 @@ static int rga2_mmu_info_color_fill_mode(struct rga2_reg *reg, struct rga2_req *
         }
 
         /* flush data to DDR */
-	rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
+        rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
         rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
 	reg->MMU_len = AllSize;
 
@@ -940,7 +940,7 @@ static int rga2_mmu_info_update_palette_table_mode(struct rga2_reg *reg, struct
         }
 
         /* flush data to DDR */
-	rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
+        rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
         rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
         reg->MMU_len = AllSize;
 
@@ -1019,7 +1019,7 @@ static int rga2_mmu_info_update_patten_buff_mode(struct rga2_reg *reg, struct rg
         reg->MMU_base = MMU_Base;
 
         /* flush data to DDR */
-	rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
+        rga2_dma_flush_range(MMU_Base, (MMU_Base + AllSize));
         return 0;
 
     }

drivers/video/rockchip/rga2/rga2_mmu_info.h

@@ -18,4 +18,3 @@ void rga2_dma_flush_range(void *pstart, void *pend);
 
 #endif
 
-

drivers/video/rockchip/rga2/rga2_reg_info.c

@@ -483,12 +483,24 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
 			y_ld_addr = yrgb_addr + (msg->dst.act_h - 1) * (d_stride);
 			y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
 			y_rd_addr = y_ld_addr + (msg->dst.act_w * 2 - 1);
+			u_ld_addr = 0;
+			u_rt_addr = 0;
+			u_rd_addr = 0;
+			v_ld_addr = 0;
+			v_rt_addr = 0;
+			v_rd_addr = 0;
 		} else {
 			y_ld_addr = (RK_U32)msg->dst.yrgb_addr +
 			((msg->dst.y_offset + (msg->dst.act_h -1)) * d_stride) +
 			msg->dst.x_offset;
 			y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
 			y_rd_addr = y_ld_addr + (msg->dst.act_w - 1);
+			u_ld_addr = 0;
+			u_rt_addr = 0;
+			u_rd_addr = 0;
+			v_ld_addr = 0;
+			v_rt_addr = 0;
+			v_rd_addr = 0;
 		}
 	}
     if(rot_90_flag == 0)