ARM64: dts: rockchip: rename mipi to dsi for rk3366

Change-Id: I677f4554bdc0d6df9cfdffa86eebe0fa4e1759dd
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

Author: bivvy

arch/arm64/boot/dts/rockchip/rk3366-android.dtsi

@@ -39,8 +39,6 @@
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
-#include <dt-bindings/display/drm_mipi_dsi.h>
-#include <dt-bindings/display/media-bus-format.h>
 
 / {
 	compatible = "rockchip,android", "rockchip,rk3366";
@@ -63,12 +61,12 @@
 	memory-region = <&drm_logo>;
 
 	route {
-		route_mipi: route-mipi {
+		route_dsi: route-dsi {
 			logo,uboot = "logo.bmp";
 			logo,kernel = "logo_kernel.bmp";
 			logo,mode = "center";
 			charge_logo,mode = "center";
-			connect = <&vopb_out_mipi>;
+			connect = <&vopb_out_dsi>;
 			status = "disabled";
 		};
 

arch/arm64/boot/dts/rockchip/rk3366-sheep.dts

@@ -738,11 +738,11 @@
 	status = "okay";
 };
 
-&route_mipi {
+&route_dsi {
 	status = "okay";
 };
 
-&video_phy {
+&mipi_dphy {
 	status = "okay";
 	rockchip,dsi-panel = <&panel>;
 };

arch/arm64/boot/dts/rockchip/rk3366.dtsi

@@ -939,9 +939,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			vopb_out_mipi: endpoint@0 {
+			vopb_out_dsi: endpoint@0 {
 				reg = <0>;
-				remote-endpoint = <&mipi_in_vopb>;
+				remote-endpoint = <&dsi_in_vopb>;
 			};
 
 			vopb_out_lvds: endpoint@1 {
@@ -959,7 +959,7 @@
 		clock-names = "pclk";
 		resets = <&cru SRST_MIPIDSI0>;
 		reset-names = "apb";
-		phys = <&video_phy>;
+		phys = <&mipi_dphy>;
 		phy-names = "mipi_dphy";
 		//power-domains = <&power RK3366_PD_VIO>;
 		rockchip,grf = <&grf>;
@@ -972,15 +972,15 @@
 				#address-cells = <1>;
 				#size-cells = <0>;
 
-				mipi_in_vopb: endpoint@0 {
+				dsi_in_vopb: endpoint@0 {
 					reg = <0>;
-					remote-endpoint = <&vopb_out_mipi>;
+					remote-endpoint = <&vopb_out_dsi>;
 				};
 			};
 		};
 	};
 
-	video_phy: video-phy@ff968000 {
+	mipi_dphy: mipi-dphy@ff968000 {
 		compatible = "rockchip,rk3366-mipi-dphy";
 		reg = <0x0 0xff968000 0x0 0x4000>;
 		clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX>;