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author
Jon Lin
committed
drivers: rkflash: Support new spiflash
1.spinand: MX35UF1GE4AC, MX35UF2GE4AC, GD5F4GQ6RExxG, GD5F4GQ6UExxG, XT26G01C, XT26G04C, BWJX08K-2Gb, XT26G02C 2.spinor: GD25Q128E, GD25Q256E, GD25Q256B, GD25LQ32E, GD25LQ32E, W25Q32JW, MX25U3232F, MX25U6432F, MX25U12832F, MX25U25645GZ4I,, XT25F32BS, XT25F16BS, P25Q64H, P25Q128H, P25Q16H, FM25Q64A, FM25M64C, FM25M4AA, DS25M4AB Change-Id: If2259456e9cc01281cd4e11a6d3338f2a0402357 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1 parent d3c53c3 commit baf6b34

2 files changed

Lines changed: 112 additions & 18 deletions

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‎drivers/rkflash/sfc_nand.c‎

Lines changed: 69 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ static u32 sfc_nand_get_ecc_status3(void);
1818
static u32 sfc_nand_get_ecc_status4(void);
1919
static u32 sfc_nand_get_ecc_status5(void);
2020
static u32 sfc_nand_get_ecc_status6(void);
21+
static u32 sfc_nand_get_ecc_status7(void);
2122

2223
static struct nand_info spi_nand_tbl[] = {
2324
/* TC58CVG0S0HxAIx */
@@ -38,9 +39,11 @@ static struct nand_info spi_nand_tbl[] = {
3839
/* MX35LF2GE4AD */
3940
{ 0xC2, 0x26, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
4041
/* MX35LF4GE4AD */
41-
{ 0xC2, 0x37, 0x00, 8, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
42-
/* MT29F1G01ZAC */
43-
{ 0x2C, 0x12, 0x00, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
42+
{ 0xC2, 0x37, 0x00, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
43+
/* MX35UF1GE4AC */
44+
{ 0xC2, 0x92, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
45+
/* MX35UF2GE4AC */
46+
{ 0xC2, 0xA2, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
4447

4548
/* GD5F1GQ4UAYIG */
4649
{ 0xC8, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -54,6 +57,10 @@ static struct nand_info spi_nand_tbl[] = {
5457
{ 0xC8, 0x52, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
5558
/* GD5F1GQ4R */
5659
{ 0xC8, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
60+
/* GD5F4GQ6RExxG 1*4096 */
61+
{ 0xC8, 0x45, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
62+
/* GD5F4GQ6UExxG 1*4096 */
63+
{ 0xC8, 0x55, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
5764

5865
/* W25N01GV */
5966
{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -101,17 +108,23 @@ static struct nand_info spi_nand_tbl[] = {
101108
{ 0xD5, 0x03, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
102109

103110
/* XT26G02A */
104-
{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
111+
{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
105112
/* XT26G01A */
106-
{ 0x0B, 0xE1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
113+
{ 0x0B, 0xE1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
107114
/* XT26G04A */
108-
{ 0x0B, 0xE3, 0x00, 4, 0x80, 1, 2048, 0x4C, 20, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
115+
{ 0x0B, 0xE3, 0x00, 4, 0x80, 1, 2048, 0x4C, 20, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
109116
/* XT26G01B */
110-
{ 0x0B, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
117+
{ 0x0B, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
111118
/* XT26G02B */
112-
{ 0x0B, 0xF2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
113-
114-
/* MT29F2G1ABA, XT26G02E, F50L2G41XA */
119+
{ 0x0B, 0xF2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
120+
/* XT26G01C */
121+
{ 0x0B, 0x11, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
122+
/* XT26G02C */
123+
{ 0x0B, 0x12, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
124+
/* XT26G04C */
125+
{ 0x0B, 0x13, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status7 },
126+
127+
/* MT29F2G01ABA, XT26G02E, F50L2G41XA */
115128
{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
116129

117130
/* FM25S01 */
@@ -127,6 +140,8 @@ static struct nand_info spi_nand_tbl[] = {
127140
{ 0xC8, 0x01, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
128141
/* ATO25D1GA */
129142
{ 0x9B, 0x12, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
143+
/* BWJX08K-2Gb */
144+
{ 0xBC, 0xB3, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x04, 0x10, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
130145
};
131146

132147
static struct nand_info *p_nand_info;
@@ -260,7 +275,7 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
260275
* 0b01, Bit errors were detected and corrected.
261276
* 0b10, Multiple bit errors were detected and not corrected.
262277
* 0b11, Bits errors were detected and corrected, bit error count
263-
* exceed the bit flip detection threshold
278+
* reach the bit flip detection threshold
264279
*/
265280
static u32 sfc_nand_get_ecc_status0(void)
266281
{
@@ -566,6 +581,49 @@ static u32 sfc_nand_get_ecc_status6(void)
566581
return ret;
567582
}
568583

584+
/*
585+
* ecc spectial type7:
586+
* ecc bits: 0xC0[4,7]
587+
* [0b0000], No bit errors were detected;
588+
* [0b0001, 0b0111], 1-7 Bit errors were detected and corrected. Not
589+
* reach Flipping Bits;
590+
* [0b1000], 8 Bit errors were detected and corrected. Bit error count
591+
* equals the bit flip detectionthreshold;
592+
* [0b1111], Bit errors greater than ECC capability(8 bits) and not corrected;
593+
* others, Reserved.
594+
*/
595+
static u32 sfc_nand_get_ecc_status7(void)
596+
{
597+
u32 ret;
598+
u32 i;
599+
u8 ecc;
600+
u8 status;
601+
u32 timeout = 1000 * 1000;
602+
603+
for (i = 0; i < timeout; i++) {
604+
ret = sfc_nand_read_feature(0xC0, &status);
605+
606+
if (ret != SFC_OK)
607+
return SFC_NAND_ECC_ERROR;
608+
609+
if (!(status & (1 << 0)))
610+
break;
611+
612+
sfc_delay(1);
613+
}
614+
615+
ecc = (status >> 4) & 0xf;
616+
617+
if (ecc < 7)
618+
ret = SFC_NAND_ECC_OK;
619+
else if (ecc == 7 || ecc == 8)
620+
ret = SFC_NAND_ECC_REFRESH;
621+
else
622+
ret = (u32)SFC_NAND_ECC_ERROR;
623+
624+
return ret;
625+
}
626+
569627
u32 sfc_nand_erase_block(u8 cs, u32 addr)
570628
{
571629
int ret;

‎drivers/rkflash/sfc_nor.c‎

Lines changed: 43 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,21 +14,29 @@ static struct flash_info spi_flash_tbl[] = {
1414
{ 0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
1515
/* GD25Q64B */
1616
{ 0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
17-
/* GD25Q127C and GD25Q128C*/
17+
/* GD25Q127C and GD25Q128C/E */
1818
{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
19-
/* GD25Q256B/C/D */
19+
/* GD25Q256B/C/D/E */
2020
{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
2121
/* GD25Q512MC */
22-
{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
22+
{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0 },
23+
/* GD25LQ64C */
24+
{ 0xc86017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
25+
/* GD25LQ32E */
26+
{ 0xc86016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
2327
/* GD25B512MEYIG */
24-
{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 0, 0 },
28+
{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 17, 0, 0 },
2529

30+
/* W25Q32JV */
31+
{ 0xef4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
2632
/* W25Q64JVSSIQ */
2733
{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
2834
/* W25Q128FV and W25Q128JV*/
2935
{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
3036
/* W25Q256F/J */
3137
{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
38+
/* W25Q32JW */
39+
{ 0xef6016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
3240
/* W25Q256JWEQ*/
3341
{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
3442
/* W25Q64FWSSIG */
@@ -44,12 +52,20 @@ static struct flash_info spi_flash_tbl[] = {
4452
{ 0xc22017, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 14, 6, 0 },
4553
/* MX25L12835E/F MX25L12833FMI-10G */
4654
{ 0xc22018, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 15, 6, 0 },
47-
/* MX25L25635E/F MX25L25645G MX25L25645GMI-08G*/
48-
{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 16, 6, 0 },
55+
/* MX25L25635E/F MX25L25645G MX25L25645GMI-08G */
56+
{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 16, 6, 0 },
4957
/* MX25L51245GMI */
50-
{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 17, 6, 0 },
58+
{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
5159
/* MX25U51245G */
5260
{ 0xc2253a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
61+
/* MX25U3232F */
62+
{ 0xc22536, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 13, 6, 0 },
63+
/* MX25U6432F */
64+
{ 0xc22537, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 14, 6, 0 },
65+
/* MX25U12832F */
66+
{ 0xc22538, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 15, 6, 0 },
67+
/* MX25U25645GZ4I-00 */
68+
{ 0xc22539, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 16, 6, 0 },
5369

5470
/* XM25QH32C */
5571
{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
@@ -70,6 +86,10 @@ static struct flash_info spi_flash_tbl[] = {
7086
{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
7187
/* XT25F256BSFIGU */
7288
{ 0x0b4019, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 16, 9, 0 },
89+
/* XT25F32BS */
90+
{ 0x0b4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
91+
/* XT25F16BS */
92+
{ 0x0b4015, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 12, 9, 0 },
7393

7494
/* EN25QH64A */
7595
{ 0x1c7017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
@@ -84,6 +104,17 @@ static struct flash_info spi_flash_tbl[] = {
84104
/* EN25QH256A */
85105
{ 0x1c7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 0, 0 },
86106

107+
/* P25Q64H */
108+
{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
109+
/* P25Q128H */
110+
{ 0x856018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
111+
/* P25Q16H-SUH-IT */
112+
{ 0x856015, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 12, 9, 0 },
113+
/* FM25Q64A */
114+
{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
115+
/* FM25M64C */
116+
{ 0xf84317, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
117+
87118
/* ZB25VQ64 */
88119
{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
89120
/* ZB25VQ128 */
@@ -95,6 +126,7 @@ static struct flash_info spi_flash_tbl[] = {
95126
{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
96127
/* BH25Q64BS */
97128
{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
129+
98130
/* P25Q64H */
99131
{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
100132
/* P25Q32SH-SSH-IT */
@@ -107,6 +139,10 @@ static struct flash_info spi_flash_tbl[] = {
107139

108140
/* FM25Q64A */
109141
{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
142+
/* FM25M4AA */
143+
{ 0xf84218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
144+
/* DS25M4AB-1AIB4 */
145+
{ 0xe54218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
110146
};
111147

112148
static int snor_write_en(void)

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