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Dingxian Wenrkhuangtao
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ARM: dts: rockchip: add rk3288-evb-rk628-hdmi2csi-avb.dts
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com> Change-Id: I2ed29407a36836d73c54b41a3d83a032224f6c17
1 parent f119851 commit c8fd532

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arch/arm/boot/dts/Makefile

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@@ -547,6 +547,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-evb-android-rk818-lvds.dtb \
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rk3288-evb-android-rk818-mipi.dtb \
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rk3288-evb-android-rk818-mipi-edp.dtb \
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rk3288-evb-rk628-hdmi2csi-avb.dtb \
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rk3288-evb-rk628-hdmi2gvi-avb.dtb \
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rk3288-evb-rk628-rgb2dsi-avb.dtb \
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rk3288-evb-rk628-rgb2gvi-avb.dtb \
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
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/dts-v1/;
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#include "rk3288-evb-rk628.dtsi"
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/ {
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model = "Rockchip RK3288 EVB RK628 Board";
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compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288";
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chosen {
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bootargs = "rootwait earlycon=uart8250,mmio32,0xff690000 vmalloc=496M swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0 androidboot.selinux=permissive";
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};
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};
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&firmware_android {
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compatible = "android,firmware";
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boot_devices = "ff0f0000.dwmmc";
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vbmeta {
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compatible = "android,vbmeta";
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parts = "vbmeta,boot,system,vendor,dtbo";
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};
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fstab {
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compatible = "android,fstab";
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vendor {
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compatible = "android,vendor";
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dev = "/dev/block/by-name/vendor";
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type = "ext4";
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mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
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fsmgr_flags = "wait,avb";
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};
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};
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};
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&sound {
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status = "okay";
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};
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&video_phy {
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status = "okay";
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};
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&hdmi {
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status = "okay";
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};
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&hdmi_in_vopb {
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status = "disabled";
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};
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&hdmi_in_vopl {
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status = "okay";
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};
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&route_hdmi {
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connect = <&vopl_out_hdmi>;
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status = "disabled";
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};
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&rk628 {
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reg = <0x51>;
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interrupt-parent = <&gpio7>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
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enable-gpios = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&rk628_combrxphy {
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status = "okay";
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};
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&rk628_combtxphy {
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status = "okay";
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};
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&rk628_csi {
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status = "okay";
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plugin-det-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
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power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "RK628-CSI";
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rockchip,camera-module-lens-name = "NC";
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port {
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hdmiin_out0: endpoint {
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remote-endpoint = <&mipi_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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&mipi_phy_rx0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&hdmiin_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy_rx_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp_mipi_in>;
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};
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};
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};
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};
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&rkisp1 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy_rx_out>;
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};
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};
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};

arch/arm/boot/dts/rk628.dtsi

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phys = <&rk628_combrxphy>;
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status = "disabled";
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};
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rk628_csi: csi {
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compatible = "rockchip,rk628-csi";
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clocks = <&rk628_cru CGU_PCLK_HDMIRX>,
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<&rk628_cru CGU_CLK_IMODET>,
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<&rk628_cru CGU_CLK_HDMIRX_AUD>,
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<&rk628_cru CGU_CLK_HDMIRX_CEC>,
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<&rk628_cru CGU_SCLK_VOP>,
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<&rk628_cru CGU_CLK_RX_READ>,
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<&rk628_cru CGU_PCLK_TXPHY_CON>,
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<&rk628_cru CGU_CLK_TXESC>,
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<&rk628_cru CGU_PCLK_CSI>;
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clock-names = "hdmirx", "imodet", "hdmirx_aud", "hdmirx_cec",
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"vop", "rx_read", "txphy", "txesc", "csi0";
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resets = <&rk628_cru RGU_HDMIRX>,
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<&rk628_cru RGU_HDMIRX_PON>,
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<&rk628_cru RGU_DECODER>,
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<&rk628_cru RGU_CLK_RX>,
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<&rk628_cru RGU_VOP>,
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<&rk628_cru RGU_TXPHY_CON>,
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<&rk628_cru RGU_TXESC>,
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<&rk628_cru RGU_CSI>;
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reset-names = "hdmirx", "hdmirx_pon", "decoder", "clk_rx",
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"vop", "txphy", "txesc", "csi0";
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phys = <&rk628_combrxphy>, <&rk628_combtxphy>;
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phy-names = "combrxphy", "combtxphy";
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pinctrl-names = "default";
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pinctrl-0 = <&hpdm0_out_pins &ddcm0_rx_pins>;
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status = "disabled";
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};
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};

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