HDMI: add data into rk3288_npll_rates for Waveshare DWE2100 HDMI panel

system auto generate parameters when resolution is 800x480@60, which value as follow:

pixel clock:33900, NR:5, NF:113, NO:16

but the parameters use on some tinkerboard, will flicker and no display in short time,

so, we tune new parameters to fix this issue

Signed-off-by: bross1_kuo <bross1_kuo@asus.com>
Change-Id: I3412a08b87d2778db4da3b2a5dae9712f6a08073

Author: BrossKuo

drivers/clk/rockchip/clk-pll.c

@@ -28,6 +28,7 @@
 #include <linux/gcd.h>
 #include <linux/mfd/syscon.h>
 #include "clk.h"
+#include "../../../include/drm/drm_crtc.h"
 
 #define PLL_MODE_MASK		0x3
 #define PLL_MODE_SLOW		0x0
@@ -343,10 +344,12 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings(
 	bool iex_monitor = false;
 	bool acer_kg221q_monitor = false;
 	bool asus_vz229h_monitor = false;
+	bool dwe2100_panel = false;
 
 	iex_monitor = detect_iex_monitor();
 	acer_kg221q_monitor = detect_acer_kg221q_monitor();
 	asus_vz229h_monitor = detect_asus_vz229h_monitor();
+	dwe2100_panel = detect_dwe2100_panel();
 
 	for (i = 0; i < pll->rate_count; i++) {
 		if( (rate == 85750000) && !iex_monitor)
@@ -361,6 +364,8 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings(
 			continue;
 		if( (rate == 31500000) && (rate_table[i].nr == 1) && !asus_vz229h_monitor)
 			continue;
+		if((rate == 33900000) && !dwe2100_panel)
+			continue;
 		if (rate == rate_table[i].rate) {
 			if (i < pll->sel) {
 				pll->scaling = rate;

drivers/clk/rockchip/clk-rk3288.c

@@ -157,6 +157,7 @@ static struct rockchip_pll_rate_table rk3288_npll_rates[] = {
 	RK3066_PLL_RATE_NB(85500000, 2, 171, 12, 32),//1360*768@60 iex
 	RK3066_PLL_RATE_NB(78750000, 4, 210, 16, 32),//1024*768@75 iex
 	RK3066_PLL_RATE_NB(74250000, 4, 198, 16, 32),
+	RK3066_PLL_RATE_NB(33900000, 5, 226, 16, 32),//Waveshare DWE2100 800x480@60
 	RK3066_PLL_RATE_NB(31500000, 1, 21, 16, 32),//640x480@75 @72.81 ASUS VZ229H
 	RK3066_PLL_RATE_NB(33000000, 1, 22, 16, 32),//800x480@67
 };