fixed that the cpu freq can't reach to 1.8GHz

Change-Id: Iba5cd1aeb842c6ef0ed53c6328ecd53b4078d084
Reviewed-on: https://tp-biosrd-v02/gerrit/84839
Reviewed-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
Tested-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>

Author: jamess-huang

arch/arm/boot/dts/rk3288.dtsi

@@ -135,7 +135,7 @@
 
 		clocks = <&cru PLL_APLL>;
 		rockchip,avs-scale = <17>;
-		rockchip,max-volt = <1350000>;
+		rockchip,max-volt = <1400000>;
 		nvmem-cells = <&cpu_leakage>, <&special_function>,
 			      <&performance>, <&process_version>;
 		nvmem-cell-names = "leakage", "special",

drivers/clk/rockchip/clk-pll.c

@@ -118,6 +118,21 @@ int rockchip_pll_clk_adaptive_scaling(struct clk *clk, int sel)
 	return 0;
 }
 
+/**
+ * The scale and rate is something like this
+ * i    rate_table[i].rate
+ * -----------------------
+ * 0    2208000000
+ * 1    2184000000
+ * 2    2160000000
+ * 3    2136000000
+ * 4    2112000000
+ * ...
+ * 25   1608000000
+ * 26   1560000000
+ * 27   1512000000
+ * ...
+ */
 int rockchip_pll_clk_rate_to_scale(struct clk *clk, unsigned long rate)
 {
 	const struct rockchip_pll_rate_table *rate_table;
@@ -141,6 +156,21 @@ int rockchip_pll_clk_rate_to_scale(struct clk *clk, unsigned long rate)
 	return -EINVAL;
 }
 
+/**
+ * The scale and rate is something like this
+ * i    rate_table[i].rate
+ * -----------------------
+ * 0    2208000000
+ * 1    2184000000
+ * 2    2160000000
+ * 3    2136000000
+ * 4    2112000000
+ * ...
+ * 25   1608000000
+ * 26   1560000000
+ * 27   1512000000
+ * ...
+ */
 int rockchip_pll_clk_scale_to_rate(struct clk *clk, unsigned int scale)
 {
 	const struct rockchip_pll_rate_table *rate_table;

drivers/soc/rockchip/rockchip_opp_select.c

@@ -672,6 +672,21 @@ static int rockchip_adjust_opp_table(struct device *dev,
 	return ret;
 }
 
+/**
+ * The scale and rate is something like this
+ * scale  rate
+ * -----------------------
+ *  0     2208000000
+ *  1     2184000000
+ *  2     2160000000
+ *  3     2136000000
+ *  4     2112000000
+ *  ...
+ *  25    1608000000
+ *  26    1560000000
+ *  27    1512000000
+ * ...
+ */
 int rockchip_adjust_power_scale(struct device *dev, int scale)
 {
 	struct device_node *np;