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Sugar Zhangrkhuangtao
Sugar Zhang
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rkhuangtao
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ASoC: rockchip: add support for vad preprocess
Change-Id: I46d1ac01cb21d7a1f5406859d22864568f3756de Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
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5 files changed

Lines changed: 1016 additions & 0 deletions

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‎sound/soc/rockchip/Makefile‎

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Original file line numberDiff line numberDiff line change
@@ -5,6 +5,12 @@ snd-soc-rockchip-multi-dais-objs := rockchip_multi_dais.o rockchip_multi_dais_pc
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snd-soc-rockchip-pdm-objs := rockchip_pdm.o
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snd-soc-rockchip-spdif-objs := rockchip_spdif.o
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snd-soc-rockchip-vad-objs := rockchip_vad.o
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ifdef CONFIG_THUMB2_KERNEL
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snd-soc-rockchip-vad-$(CONFIG_THUMB2_KERNEL) += vad_preprocess_thumb.o
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else
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snd-soc-rockchip-vad-$(CONFIG_ARM64) += vad_preprocess_arm64.o
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snd-soc-rockchip-vad-$(CONFIG_ARM) += vad_preprocess_arm.o
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endif
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S) += snd-soc-rockchip-i2s.o
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S_TDM) += snd-soc-rockchip-i2s-tdm.o

‎sound/soc/rockchip/vad_preprocess.h‎

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@@ -0,0 +1,29 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip VAD Preprocess
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*
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* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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*/
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#ifndef _ROCKCHIP_VAD_PREPROCESS_H
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#define _ROCKCHIP_VAD_PREPROCESS_H
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struct vad_params {
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int noise_abs;
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int noise_level;
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int sound_thd;
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int vad_con_thd;
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int voice_gain;
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};
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struct vad_uparams {
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int noise_abs;
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};
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void vad_preprocess_init(struct vad_params *params);
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void vad_preprocess_destroy(void);
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void vad_preprocess_update_params(struct vad_uparams *uparams);
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int vad_preprocess(int data);
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#endif

‎sound/soc/rockchip/vad_preprocess_arm.S‎

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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip VAD Preprocess
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*
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* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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*/
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.arch armv7-a
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.fpu softvfp
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.eabi_attribute 20, 1
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.eabi_attribute 21, 1
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.eabi_attribute 23, 3
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.eabi_attribute 24, 1
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.eabi_attribute 25, 1
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.eabi_attribute 26, 2
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.eabi_attribute 30, 4
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.eabi_attribute 34, 1
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.eabi_attribute 18, 4
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.file "vad_preprocess_arm.S"
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.text
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.align 2
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.global vad_preprocess_init
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.type vad_preprocess_init, %function
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vad_preprocess_init:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r2, .L4
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ldr r3, [r0, #8]
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strh r3, [r2] @ movhi
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ldr r3, [r0, #4]
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strh r3, [r2, #2] @ movhi
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ldr r3, [r0, #12]
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strh r3, [r2, #4] @ movhi
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ldr r3, [r0]
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strh r3, [r2, #6] @ movhi
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ldr r3, [r0, #16]
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tst r3, #512
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ubfx r3, r3, #0, #9
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eorne r3, r3, #65280
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eorne r3, r3, #255
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uxtheq r3, r3
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strh r3, [r2, #8] @ movhi
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bx lr
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.L5:
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.align 2
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.L4:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_init, .-vad_preprocess_init
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.align 2
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.global vad_preprocess
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.type vad_preprocess, %function
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vad_preprocess:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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ldr r3, .L27
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stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
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.save {r4, r5, r6, r7, r8, r9, lr}
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movw lr, #15349
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ldrsh r2, [r3, #8]
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ldrh ip, [r3, #10]
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ldr r1, .L27+4
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mul r0, r2, r0
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ldrh r4, [r3, #12]
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smulbb r1, ip, r1
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add r2, r0, #31
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cmp r0, #0
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movlt r0, r2
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ldrh r2, [r3, #14]
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mov r0, r0, asr #5
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mla r1, lr, r0, r1
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smlabb r1, r4, lr, r1
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ldr r4, .L27+8
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ldrsh lr, [r3, #16]
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smulbb r4, r2, r4
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rsb r4, r4, r1
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movw r1, #14379
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mls r4, lr, r1, r4
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cmp r4, #1
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mov r5, r4, asr #31
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sbcs r1, r5, #0
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blt .L7
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adds r4, r4, #8192
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adc r5, r5, #0
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b .L24
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.L7:
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subs r4, r4, #8192
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movw r8, #16383
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sbc r5, r5, #0
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mov r9, #0
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mov r6, r5, asr #31
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mov r7, r6, asr #31
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and r6, r6, r8
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and r7, r7, r9
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adds r4, r4, r6
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adc r5, r5, r7
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.L24:
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strh ip, [r3, #12] @ movhi
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mov r1, r4, lsr #14
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ldrh ip, [r3, #18]
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orr r1, r1, r5, asl #18
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strh r0, [r3, #10] @ movhi
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add ip, ip, #1
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uxth r1, r1
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ldr r0, .L27+12
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uxth ip, ip
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strh r1, [r3, #14] @ movhi
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strh ip, [r3, #18] @ movhi
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sxth r1, r1
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sxth ip, ip
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cmp r1, #0
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and r0, r0, ip
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rsblt r1, r1, #0
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cmp r0, #0
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strh r2, [r3, #16] @ movhi
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sublt r0, r0, #1
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ldr r2, [r3, #20]
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mvnlt r0, r0, asl #24
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add r2, r1, r2
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mvnlt r0, r0, lsr #24
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addlt r0, r0, #1
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cmp r0, #0
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str r2, [r3, #20]
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bne .L9
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ldr r0, [r3, #24]
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ldr ip, .L27
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cmp r0, #99
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bgt .L11
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add r2, r2, #128
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add ip, ip, r0, asl #1
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add lr, r2, #255
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cmp r2, #0
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movlt r2, lr
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mov r2, r2, asr #8
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strh r2, [ip, #28] @ movhi
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b .L12
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.L11:
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add lr, ip, #28
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add ip, ip, #226
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.L13:
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ldrh r4, [lr, #2]
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strh r4, [lr], #2 @ movhi
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cmp lr, ip
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bne .L13
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add r2, r2, #128
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add ip, r2, #255
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cmp r2, #0
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movlt r2, ip
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mov r2, r2, asr #8
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strh r2, [r3, #226] @ movhi
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.L12:
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cmp r0, #99
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ldrh r2, [r3, #28]
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ldrle r4, .L27+16
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movle lr, #1
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bgt .L26
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.L15:
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cmp lr, r0
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bge .L17
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ldrsh ip, [r4], #2
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sxth r2, r2
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add lr, lr, #1
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cmp ip, r2
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movge ip, r2
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uxth r2, ip
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b .L15
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.L26:
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ldr ip, .L27+16
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add r4, ip, #198
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.L18:
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ldrsh lr, [ip], #2
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sxth r2, r2
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cmp r2, lr
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movge r2, lr
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cmp ip, r4
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uxth r2, r2
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bne .L18
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.L17:
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ldrh lr, [r3, #6]
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mov ip, #128
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mov r4, #230
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add r0, r0, #1
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str r0, [r3, #24]
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smlabb ip, lr, r4, ip
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mov lr, #26
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smlabb r2, r2, lr, ip
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add ip, r2, #255
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cmp r2, #0
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movlt r2, ip
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mov r2, r2, asr #8
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strh r2, [r3, #6] @ movhi
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mov r2, #0
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str r2, [r3, #20]
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strh r2, [r3, #18] @ movhi
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.L9:
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ldrh r2, [r3, #6]
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ldrh ip, [r3, #2]
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ldrsh r3, [r3]
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ldr r0, .L27
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smlabb r3, r2, ip, r3
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add r2, r0, #428
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cmp r1, r3
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ble .L19
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ldrh r3, [r2]
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ldrsh r0, [r0, #4]
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add r3, r3, #1
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uxth r3, r3
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strh r3, [r2] @ movhi
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sxth r3, r3
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cmp r0, r3
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movge r0, #0
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movlt r0, #1
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ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
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.L19:
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mov r0, #0
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strh r0, [r2] @ movhi
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ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
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.L28:
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.align 2
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.L27:
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.word .LANCHOR0
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.word -30697
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.word -30632
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.word -2147483393
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.word .LANCHOR0+30
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.fnend
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.size vad_preprocess, .-vad_preprocess
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.align 2
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.global vad_preprocess_destroy
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.type vad_preprocess_destroy, %function
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vad_preprocess_destroy:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r2, .L32
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mov r3, #0
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mov ip, r3
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strh r3, [r2, #10] @ movhi
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strh r3, [r2, #12] @ movhi
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strh r3, [r2, #14] @ movhi
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strh r3, [r2, #16] @ movhi
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strh r3, [r2, #18] @ movhi
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add r2, r2, #428
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strh r3, [r2] @ movhi
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.L30:
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ldr r2, .L32
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mov r1, #0
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add r0, r2, #28
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strh ip, [r3, r0] @ movhi
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add r3, r3, #2
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cmp r3, #200
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bne .L30
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mov r3, #32
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str r1, [r2, #20]
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strh r1, [r2, #6] @ movhi
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strh r3, [r2, #8] @ movhi
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str r1, [r2, #24]
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bx lr
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.L33:
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.align 2
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.L32:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_destroy, .-vad_preprocess_destroy
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.align 2
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.global vad_preprocess_update_params
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.type vad_preprocess_update_params, %function
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vad_preprocess_update_params:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r3, .L35
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ldrsh r3, [r3, #6]
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str r3, [r0]
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bx lr
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.L36:
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.align 2
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.L35:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_update_params, .-vad_preprocess_update_params
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.bss
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.align 2
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.LANCHOR0 = . + 0
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.type g_sound_thd, %object
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.size g_sound_thd, 2
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g_sound_thd:
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.space 2
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.type g_noise_level, %object
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.size g_noise_level, 2
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g_noise_level:
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.space 2
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.type g_vad_con_thd, %object
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.size g_vad_con_thd, 2
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g_vad_con_thd:
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.space 2
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.type g_noise_abs, %object
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.size g_noise_abs, 2
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g_noise_abs:
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.space 2
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.type g_signal_gain, %object
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.size g_signal_gain, 2
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g_signal_gain:
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.space 2
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.type g_xn_1, %object
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.size g_xn_1, 2
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g_xn_1:
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.space 2
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.type g_xn_2, %object
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.size g_xn_2, 2
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g_xn_2:
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.space 2
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.type g_yn_1, %object
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.size g_yn_1, 2
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g_yn_1:
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.space 2
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.type g_yn_2, %object
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.size g_yn_2, 2
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g_yn_2:
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.space 2
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.type g_sample_cnt, %object
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.size g_sample_cnt, 2
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g_sample_cnt:
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.space 2
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.type g_sum_abs_frm, %object
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.size g_sum_abs_frm, 4
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g_sum_abs_frm:
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.space 4
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.type frm_count, %object
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.size frm_count, 4
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frm_count:
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.space 4
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.type g_ave_abs_rec, %object
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.size g_ave_abs_rec, 400
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g_ave_abs_rec:
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.space 400
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.type g_vad_cnt, %object
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.size g_vad_cnt, 2
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g_vad_cnt:
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.space 2
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.ident "GCC: (GNU) 4.9 20150123 (prerelease)"
348+
.section .note.GNU-stack,"",%progbits

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