PM / devfreq: rockchip_dmc: Update cpu dma latency when change frequency

Change-Id: Ia063ce7da2f68ffac4068f4f8136acf178a28918
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>

Author: finley1226

drivers/devfreq/rockchip_dmc.c

@@ -34,6 +34,7 @@
 #include <linux/of_irq.h>
 #include <linux/platform_device.h>
 #include <linux/pm_opp.h>
+#include <linux/pm_qos.h>
 #include <linux/reboot.h>
 #include <linux/regulator/consumer.h>
 #include <linux/rockchip/rockchip_sip.h>
@@ -808,6 +809,8 @@ struct rockchip_dmcfreq {
 	int (*set_auto_self_refresh)(u32 en);
 };
 
+static struct pm_qos_request pm_qos;
+
 /*
  * function: packaging de-skew setting to px30_ddr_dts_config_timing,
  *           px30_ddr_dts_config_timing will pass to trust firmware, and
@@ -1606,8 +1609,18 @@ int rockchip_dmcfreq_wait_complete(void)
 		return 0;
 	}
 	wait_ctrl.wait_flag = -1;
+
+	/*
+	 * CPUs only enter WFI when idle to make sure that
+	 * FIQn can quick response.
+	 */
+	pm_qos_update_request(&pm_qos, 0);
+
 	wait_event_timeout(wait_ctrl.wait_wq, (wait_ctrl.wait_flag == 0),
 			   msecs_to_jiffies(wait_ctrl.wait_time_out_ms));
+
+	pm_qos_update_request(&pm_qos, PM_QOS_DEFAULT_VALUE);
+
 	return 0;
 }
 
@@ -2986,6 +2999,9 @@ static int rockchip_dmcfreq_probe(struct platform_device *pdev)
 	else
 		data->touchboostpulse_duration_val = 500 * USEC_PER_MSEC;
 
+	pm_qos_add_request(&pm_qos, PM_QOS_CPU_DMA_LATENCY,
+			   PM_QOS_DEFAULT_VALUE);
+
 	ret = devfreq_add_governor(&devfreq_dmc_ondemand);
 	if (ret) {
 		dev_err(dev, "Failed to add rockchip governor: %d\n", ret);