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JeffyCNrkhuangtao
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UPSTREAM: pinctrl: rockchip: add irq_enable & irq_disable ops
Currently we are trying to enable/disable the clk of irq's gpio bank when unmask/mask irq. But the kernel's "lazy disable approach" will skip masking irq when the irq chip doesn't support irq_disable ops. So we may hit this case: irq_enable-> enable clk irq_disable-> noop irq_enable-> enable clk again irq_disable-> noop Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> (cherry picked from commit d468289a021c638c84da29e21db7924c66571f25) Change-Id: Ibe2f5c4ef48425300355a46312215984d8f4e1bc
1 parent ff766be commit ea43504

1 file changed

Lines changed: 6 additions & 5 deletions

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drivers/pinctrl/pinctrl-rockchip.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2904,7 +2904,7 @@ static void rockchip_irq_resume(struct irq_data *d)
29042904
clk_disable(bank->clk);
29052905
}
29062906

2907-
static void rockchip_irq_gc_mask_clr_bit(struct irq_data *d)
2907+
static void rockchip_irq_enable(struct irq_data *d)
29082908
{
29092909
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
29102910
struct rockchip_pin_bank *bank = gc->private;
@@ -2913,7 +2913,7 @@ static void rockchip_irq_gc_mask_clr_bit(struct irq_data *d)
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irq_gc_mask_clr_bit(d);
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}
29152915

2916-
void rockchip_irq_gc_mask_set_bit(struct irq_data *d)
2916+
static void rockchip_irq_disable(struct irq_data *d)
29172917
{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct rockchip_pin_bank *bank = gc->private;
@@ -2980,9 +2980,10 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
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gc->chip_types[0].regs.mask = GPIO_INTMASK;
29812981
gc->chip_types[0].regs.ack = GPIO_PORTS_EOI;
29822982
gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
2983-
gc->chip_types[0].chip.irq_mask = rockchip_irq_gc_mask_set_bit;
2984-
gc->chip_types[0].chip.irq_unmask =
2985-
rockchip_irq_gc_mask_clr_bit;
2983+
gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
2984+
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
2985+
gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;
2986+
gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;
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gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
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gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
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gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;

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