Revert "clk: rockchip: fix up the freq overshoot"

This reverts commit c64eb75.
This commit make i2s clk setting error when
integer divider switching integer divider.

Change-Id: I927d6995d7b215fd412e147dff6a64c8fc4e2211
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

Author: Elaine Zhang

drivers/clk/rockchip/clk.c

@@ -122,6 +122,7 @@ struct rockchip_clk_frac {
 	const struct clk_ops			*mux_ops;
 	int					mux_frac_idx;
 
+	bool					rate_change_remuxed;
 	int					rate_change_idx;
 };
 
@@ -142,6 +143,18 @@ static int rockchip_clk_frac_notifier_cb(struct notifier_block *nb,
 		frac->rate_change_idx = frac->mux_ops->get_parent(&frac_mux->hw);
 		if (frac->rate_change_idx != frac->mux_frac_idx) {
 			frac->mux_ops->set_parent(&frac_mux->hw, frac->mux_frac_idx);
+			frac->rate_change_remuxed = 1;
+		}
+	} else if (event == POST_RATE_CHANGE) {
+		/*
+		 * The POST_RATE_CHANGE notifier runs directly after the
+		 * divider clock is set in clk_change_rate, so we'll have
+		 * remuxed back to the original parent before clk_change_rate
+		 * reaches the mux itself.
+		 */
+		if (frac->rate_change_remuxed) {
+			frac->mux_ops->set_parent(&frac_mux->hw, frac->rate_change_idx);
+			frac->rate_change_remuxed = 0;
 		}
 	}