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Merge remote-tracking branch 'asus/rk3288_linux_release_v2.3.0_20201203' into HEAD
Change-Id: Ie6be2b7a471d18221b80c3f1adcc3852163c981e Conflicts: (Fix conflict by Gary_Gen.) drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
2 parents 01ff543 + f6c3b58 commit fc082e2

1,697 files changed

Lines changed: 1032449 additions & 211918 deletions

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‎Documentation/devicetree/bindings/pinctrl/pinctrl-rk628.txt‎

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,76 @@
1+
Pincontrol driver for RK628.
2+
3+
Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
4+
for details of the common pinctrl bindings used by client devices,
5+
including the meaning of the phrase "pin configuration node".
6+
7+
Optional Pinmux properties:
8+
--------------------------
9+
Following properties are required if default setting of pins are required
10+
at boot.
11+
- pinctrl-names: A pinctrl state named per <pinctrl-binding.txt>.
12+
- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
13+
<pinctrl-binding.txt>.
14+
15+
The pin configurations are defined as child of the pinctrl states node. Each
16+
sub-node have following properties:
17+
18+
Optional properties:
19+
-------------------
20+
Following are optional properties defined as pinmux DT binding document
21+
<pinctrl-bindings.txt>. Absence of properties will leave the configuration
22+
on default.
23+
24+
pins - the list of pins that properties in the node
25+
apply to (either this or "group" has to be
26+
specified)
27+
group - the group to apply the properties to, if the driver
28+
supports configuration of whole groups rather than
29+
individual pins (either this or "pins" has to be
30+
specified)
31+
bias-high-impedance - high impedance mode ("third-state", "floating")
32+
bias-pull-up - pull up the pin
33+
bias-pull-down - pull down the pin
34+
drive-strength - sink or source at most X mA
35+
input-schmitt-enable - enable schmitt-trigger mode
36+
input-schmitt-disable - disable schmitt-trigger mode
37+
low-power-enable - enable low power mode
38+
low-power-disable - disable low power mode
39+
output-low - set the pin to output mode with low level
40+
output-high - set the pin to output mode with high level
41+
42+
Example:
43+
--------
44+
&rk628_pinctrl: pinctrl {
45+
compatible = "rockchip,rk628-pinctrl";
46+
status = "okay";
47+
48+
//for function mode
49+
hpd_in_pins: hpd-in {
50+
pins = "gpio0b0";
51+
function = "hpd_in";
52+
}
53+
54+
//for gpio mode
55+
gvi_hpd_gpio: gvi-hpd-gpio {
56+
pins = "gpio3b1";
57+
function = "gpio";
58+
drive-strength = <1>;
59+
bias-pull-up;
60+
slew-rate = <1>;
61+
low-power-enable;
62+
input-schmitt-enable;
63+
output-high;
64+
};
65+
}
66+
67+
backlight: backlight {
68+
...
69+
interrupt-parent = <&rk628_gpio0>;
70+
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
71+
72+
pinctrl-names = "default";
73+
pinctrl-0 = <&hpd_in_pins>,<&gvi_hpd_gpio>;
74+
75+
vbus-5v-gpios = <&rk628_gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
76+
}

‎Documentation/devicetree/bindings/pwm/rockchip-pwm.txt‎

Lines changed: 0 additions & 31 deletions
This file was deleted.

‎arch/arm/boot/dts/Makefile‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -547,6 +547,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
547547
rk3288-evb-android-rk818-lvds.dtb \
548548
rk3288-evb-android-rk818-mipi.dtb \
549549
rk3288-evb-android-rk818-mipi-edp.dtb \
550+
rk3288-evb-rk628-hdmi2gvi-avb.dtb \
551+
rk3288-evb-rk628-rgb2dsi-avb.dtb \
552+
rk3288-evb-rk628-rgb2gvi-avb.dtb \
553+
rk3288-evb-rk628-rgb2hdmi-avb.dtb \
554+
rk3288-evb-rk628-rgb2lvds-avb.dtb \
555+
rk3288-evb-rk628-rgb2lvds-dual-avb.dtb \
550556
rk3288-evb-rk1608.dtb \
551557
rk3288-evb-rk808.dtb \
552558
rk3288-evb-rk808-linux.dtb \

‎arch/arm/boot/dts/rk3128-fireprime.dts‎

Lines changed: 42 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -52,17 +52,6 @@
5252
bootargs = "earlycon=uart8250,mmio32,0x20068000 earlyprintk console=ttyFIQ0 rw root=PARTUUID=614e0000-0000 rootwait";
5353
};
5454

55-
codec_hdmi_sound: codec-hdmi-sound {
56-
status = "okay";
57-
compatible = "rockchip,multicodecs-card";
58-
rockchip,card-name = "rockchip,codec-hdmi";
59-
rockchip,format = "i2s";
60-
rockchip,codec-hp-det;
61-
rockchip,mclk-fs = <256>;
62-
rockchip,cpu = <&i2s_8ch>;
63-
rockchip,codec = <&codec>, <&hdmi>;
64-
};
65-
6655
cpuinfo {
6756
compatible = "rockchip,cpuinfo";
6857
nvmem-cells = <&efuse_id>;
@@ -126,6 +115,40 @@
126115
reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
127116
};
128117

118+
sound: sound {
119+
compatible = "simple-audio-card";
120+
simple-audio-card,format = "i2s";
121+
simple-audio-card,name = "rockchip,rk312x-codec";
122+
simple-audio-card,mclk-fs = <256>;
123+
simple-audio-card,widgets =
124+
"Headphone", "Headphone Jack";
125+
simple-audio-card,routing =
126+
"Headphone Jack", "HPOL",
127+
"Headphone Jack", "HPOR";
128+
129+
simple-audio-card,dai-link@0 {
130+
format = "i2s";
131+
cpu {
132+
sound-dai = <&i2s_8ch 0>;
133+
};
134+
135+
codec {
136+
sound-dai = <&hdmi>;
137+
};
138+
};
139+
140+
simple-audio-card,dai-link@1 {
141+
format = "i2s";
142+
cpu {
143+
sound-dai = <&i2s_8ch 1>;
144+
};
145+
146+
codec {
147+
sound-dai = <&codec>;
148+
};
149+
};
150+
};
151+
129152
spdif_out: spdif-out {
130153
status = "okay";
131154
compatible = "linux,spdif-dit";
@@ -147,6 +170,8 @@
147170
wireless-wlan {
148171
compatible = "wlan-platdata";
149172
wifi_chip_type = "ap6212";
173+
clocks = <&rk818 1>;
174+
clock-names = "ext_clock";
150175
sdio_vref = <3300>;
151176
rockchip,grf = <&grf>;
152177
WIFI,host_wake_irq = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
@@ -155,15 +180,11 @@
155180

156181
wireless-bluetooth {
157182
compatible = "bluetooth-platdata";
158-
//wifi-bt-power-toggle;
159183
uart_rts_gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
160184
pinctrl-names = "default","rts_gpio";
161185
pinctrl-0 = <&uart0_rts>;
162186
pinctrl-1 = <&uart0_rts_gpio>;
163-
//BT,power_gpio = <&gpio1 GPIO_B3 GPIO_ACTIVE_HIGH>;
164-
BT,reset_gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
165-
BT,wake_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
166-
BT,wake_host_irq = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
187+
BT,power_gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
167188
status = "okay";
168189
};
169190

@@ -596,6 +617,10 @@
596617
};
597618
};
598619

620+
&rga {
621+
status = "okay";
622+
};
623+
599624
&saradc
600625
{
601626
status = "okay";
@@ -615,8 +640,7 @@
615640
};
616641

617642
&sdio {
618-
clock-frequency = <50000000>;
619-
clock-freq-min-max = <200000 50000000>;
643+
max-frequency = <50000000>;
620644
supports-sdio;
621645
disable-wp;
622646
cap-sd-highspeed;

‎arch/arm/boot/dts/rk3128.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -93,6 +93,74 @@
9393
clocks = <&cru PCLK_ACODEC>, <&cru SCLK_I2S0>;
9494
};
9595

96+
&cpu0_opp_table {
97+
rockchip,leakage-scaling-sel = <
98+
1 254 0
99+
>;
100+
rockchip,leakage-voltage-sel = <
101+
1 14 0
102+
15 35 1
103+
36 254 2
104+
>;
105+
106+
opp-216000000 {
107+
opp-hz = /bits/ 64 <216000000>;
108+
opp-microvolt = <950000 950000 1425000>;
109+
opp-microvolt-L0 = <950000 950000 1425000>;
110+
opp-microvolt-L1 = <950000 950000 1425000>;
111+
opp-microvolt-L2 = <950000 950000 1425000>;
112+
clock-latency-ns = <40000>;
113+
};
114+
opp-408000000 {
115+
opp-hz = /bits/ 64 <408000000>;
116+
opp-microvolt = <950000 950000 1425000>;
117+
opp-microvolt-L0 = <950000 950000 1425000>;
118+
opp-microvolt-L1 = <950000 950000 1425000>;
119+
opp-microvolt-L2 = <950000 950000 1425000>;
120+
clock-latency-ns = <40000>;
121+
};
122+
opp-600000000 {
123+
opp-hz = /bits/ 64 <600000000>;
124+
opp-microvolt-L0 = <950000 950000 1425000>;
125+
opp-microvolt-L1 = <950000 950000 1425000>;
126+
opp-microvolt-L2 = <950000 950000 1425000>;
127+
clock-latency-ns = <40000>;
128+
};
129+
opp-696000000 {
130+
opp-hz = /bits/ 64 <696000000>;
131+
opp-microvolt = <1150000 1150000 1425000>;
132+
opp-microvolt-L0 = <975000 975000 1425000>;
133+
opp-microvolt-L1 = <975000 975000 1425000>;
134+
opp-microvolt-L2 = <975000 975000 1425000>;
135+
clock-latency-ns = <40000>;
136+
};
137+
opp-816000000 {
138+
opp-hz = /bits/ 64 <816000000>;
139+
opp-microvolt = <1075000 1075000 1425000>;
140+
opp-microvolt-L0 = <1075000 1075000 1425000>;
141+
opp-microvolt-L1 = <1050000 1050000 1425000>;
142+
opp-microvolt-L2 = <1000000 1000000 1425000>;
143+
clock-latency-ns = <40000>;
144+
opp-suspend;
145+
};
146+
opp-1008000000 {
147+
opp-hz = /bits/ 64 <1008000000>;
148+
opp-microvolt = <1200000 1200000 1425000>;
149+
opp-microvolt-L0 = <1200000 1200000 1425000>;
150+
opp-microvolt-L1 = <1175000 1175000 1425000>;
151+
opp-microvolt-L2 = <1125000 1125000 1425000>;
152+
clock-latency-ns = <40000>;
153+
};
154+
opp-1200000000 {
155+
opp-hz = /bits/ 64 <1200000000>;
156+
opp-microvolt = <1325000 1325000 1425000>;
157+
opp-microvolt-L0 = <1325000 1325000 1425000>;
158+
opp-microvolt-L1 = <1300000 1300000 1425000>;
159+
opp-microvolt-L2 = <1250000 1250000 1425000>;
160+
clock-latency-ns = <40000>;
161+
};
162+
};
163+
96164
&pd_vio {
97165
pm_qos = <&qos_rga>,
98166
<&qos_ebc>,

‎arch/arm/boot/dts/rk312x.dtsi‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -117,26 +117,26 @@
117117

118118
opp-216000000 {
119119
opp-hz = /bits/ 64 <216000000>;
120-
opp-microvolt = <950000 950000 1425000>;
121-
opp-microvolt-L0 = <950000 950000 1425000>;
120+
opp-microvolt = <1000000 1000000 1425000>;
121+
opp-microvolt-L0 = <1000000 1000000 1425000>;
122122
opp-microvolt-L1 = <950000 950000 1425000>;
123123
opp-microvolt-L2 = <950000 950000 1425000>;
124124
clock-latency-ns = <40000>;
125125
};
126126
opp-408000000 {
127127
opp-hz = /bits/ 64 <408000000>;
128-
opp-microvolt = <950000 950000 1425000>;
129-
opp-microvolt-L0 = <950000 950000 1425000>;
128+
opp-microvolt = <1000000 1000000 1425000>;
129+
opp-microvolt-L0 = <1000000 1000000 1425000>;
130130
opp-microvolt-L1 = <950000 950000 1425000>;
131131
opp-microvolt-L2 = <950000 950000 1425000>;
132132
clock-latency-ns = <40000>;
133133
};
134134
opp-600000000 {
135135
opp-hz = /bits/ 64 <600000000>;
136-
opp-microvolt = <1075000 1075000 1425000>;
137-
opp-microvolt-L0 = <1075000 1075000 1425000>;
138-
opp-microvolt-L1 = <1025000 1025000 1425000>;
139-
opp-microvolt-L2 = <975000 975000 1425000>;
136+
opp-microvolt = <1150000 1150000 1425000>;
137+
opp-microvolt-L0 = <11500000 1150000 1425000>;
138+
opp-microvolt-L1 = <1100000 1100000 1425000>;
139+
opp-microvolt-L2 = <1050000 1050000 1425000>;
140140
clock-latency-ns = <40000>;
141141
};
142142
opp-696000000 {
@@ -158,8 +158,8 @@
158158
};
159159
opp-1008000000 {
160160
opp-hz = /bits/ 64 <1008000000>;
161-
opp-microvolt = <1325000 1325000 1425000>;
162-
opp-microvolt-L0 = <1325000 1325000 1425000>;
161+
opp-microvolt = <1350000 1350000 1425000>;
162+
opp-microvolt-L0 = <1350000 1350000 1425000>;
163163
opp-microvolt-L1 = <1275000 1275000 1425000>;
164164
opp-microvolt-L2 = <1225000 1225000 1425000>;
165165
clock-latency-ns = <40000>;
@@ -242,11 +242,11 @@
242242

243243
opp-200000000 {
244244
opp-hz = /bits/ 64 <200000000>;
245-
opp-microvolt = <950000>;
245+
opp-microvolt = <1025000>;
246246
};
247247
opp-300000000 {
248248
opp-hz = /bits/ 64 <300000000>;
249-
opp-microvolt = <950000>;
249+
opp-microvolt = <10250000>;
250250
};
251251
opp-396000000 {
252252
opp-hz = /bits/ 64 <396000000>;

‎arch/arm/boot/dts/rk322x.dtsi‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -999,7 +999,6 @@
999999
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
10001000
clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
10011001
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
1002-
dma-coherent;
10031002
status = "disabled";
10041003
};
10051004

‎arch/arm/boot/dts/rk3288-android.dtsi‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -412,7 +412,6 @@
412412
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
413413
assigned-clocks = <&cru ACLK_RGA>, <&cru SCLK_RGA>;
414414
assigned-clock-rates = <300000000>, <300000000>;
415-
dma-coherent;
416415
};
417416

418417
&uart2 {
@@ -435,6 +434,16 @@
435434
status = "okay";
436435
};
437436

437+
&vopb {
438+
assigned-clocks = <&cru DCLK_VOP0>;
439+
assigned-clock-parents = <&cru PLL_GPLL>;
440+
};
441+
442+
&vopl {
443+
assigned-clocks = <&cru DCLK_VOP1>;
444+
assigned-clock-parents = <&cru PLL_CPLL>;
445+
};
446+
438447
&pinctrl {
439448

440449
backlight {

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