- (build): Added tinyUSB src/inc, DMA & RTC from MSDK.

- (build): added hex & bin targets for executable.
- (build): temporarily modified .ld due to issue exiting MAX32 ROM code
- (flash): added flash target for jlink & msdk, along with helper files under tools/
- Reorganized mpconfigport.mk for clarity
- Moved flash driver & LED/PB definitions to board files (mpconfigboard._)

Author: Brandon-Hurst

ports/analog/Makefile

@@ -76,9 +76,11 @@ INC += \
 	-I$(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER) \
 	-I$(PERIPH_SRC)/SYS \
 	-I$(PERIPH_SRC)/CTB \
+	-I$(PERIPH_SRC)/DMA \
 	-I$(PERIPH_SRC)/FLC \
 	-I$(PERIPH_SRC)/GPIO \
 	-I$(PERIPH_SRC)/ICC \
+	-I$(PERIPH_SRC)/TMR \
 	-I$(PERIPH_SRC)/RTC \
 	-I$(PERIPH_SRC)/UART \
 
@@ -96,6 +98,9 @@ SRC_MAX32 += \
 	$(PERIPH_SRC)/CTB/ctb_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/CTB/ctb_reva.c \
 	$(PERIPH_SRC)/CTB/ctb_common.c \
+	$(PERIPH_SRC)/DMA/dma_reva.c \
+	$(PERIPH_SRC)/DMA/dma_revb.c \
+	$(PERIPH_SRC)/DMA/dma_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/FLC/flc_common.c \
 	$(PERIPH_SRC)/FLC/flc_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/FLC/flc_reva.c \
@@ -106,6 +111,9 @@ SRC_MAX32 += \
 	$(PERIPH_SRC)/ICC/icc_reva.c \
 	$(PERIPH_SRC)/RTC/rtc_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/RTC/rtc_reva.c \
+	$(PERIPH_SRC)/TMR/tmr_common.c \
+	$(PERIPH_SRC)/TMR/tmr_revb.c \
+	$(PERIPH_SRC)/TMR/tmr_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/UART/uart_common.c \
 	$(PERIPH_SRC)/UART/uart_$(DIE_TYPE).c \
 	$(PERIPH_SRC)/UART/uart_revb.c \
@@ -126,7 +134,7 @@ STARTUPFILE = $(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC/startup
 
 # CircuitPython custom linkerfile (necessary for build steps & filesystems)
 LINKERFILE = linking/$(MCU_VARIANT_LOWER)_cktpy.ld
-LDFLAGS += -nostartfiles -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -nostartfiles -specs=nano.specs
 endif
 
 SRC_S += supervisor/cpu.s \
@@ -137,13 +145,14 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \
 			-DTARGET_REV=0x4131 \
 			-DTARGET=$(MCU_VARIANT_UPPER) \
 			-DIAR_PRAGMAS=0 \
+			-DRISCV_LOAD=0 \
 			# -DFLASH_ORIGIN=0x10000000 \
 			# -DFLASH_SIZE=0x340000 \
 			# -DSRAM_ORIGIN=0x20000000 \
 			# -DSRAM_SIZE=0x100000 \
 
 CPU_CORE=cortex-m4
-CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=hard -mfpu=fpv4-sp-d16
+CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=softfp -mfpu=fpv4-sp-d16
 
 # NOTE: Start with DEBUG ONLY settings for now
 ifeq ($(DEBUG),)
@@ -154,7 +163,7 @@ ifeq ($(DEBUG),1)
 CFLAGS += -ggdb3
 COPT = -Og
 else
-COPT += -O2
+COPT += -O0 #opt completely off to start
 endif
 
 
@@ -165,9 +174,9 @@ CFLAGS += \
 
 # TODO: Add for TinyUSB once our PR goes through for MAX32 devices
 # Add TinyUSB
-# INC += -I../../lib/tinyusb/src
-# INC += -I../../supervisor/shared/usb
-# SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c
+INC += -I../../lib/tinyusb/src
+INC += -I../../supervisor/shared/usb
+SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c
 
 SRC_C += \
 	boards/$(BOARD)/board.c \
@@ -182,13 +191,14 @@ CFLAGS += -Wno-error=unused-parameter \
 			-Wno-error=sign-compare \
 			-Wno-error=strict-prototypes \
 			-Wno-error=cast-qual \
-			-Wno-unused-variable \
-			-Wno-lto-type-mismatch \
-			-Wno-cast-align \
-			-Wno-nested-externs \
-			-Wno-sign-compare
+			-Wno-error=unused-variable \
+			-Wno-error=lto-type-mismatch \
+			-Wno-error=cast-align \
+			-Wno-error=nested-externs \
+			-Wno-error=sign-compare \
 
-LDFLAGS += $(CFLAGS) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
+ENTRY = Reset_Handler
+LDFLAGS += $(CFLAGS) --entry $(ENTRY) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
 LIBS := -lgcc -lc
 
 # If not using CKTPY mathlib, use toolchain mathlib
@@ -234,7 +244,7 @@ SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_CIRCUITPY_COMMON) \
 SRC_QSTR_PREPROCESSOR +=
 
 # Default build target
-all: $(BUILD)/firmware.elf
+all: $(BUILD)/firmware.elf $(BUILD)/firmware.hex $(BUILD)/firmware.bin
 
 clean-max32:
 	rm -rf build-*
@@ -247,18 +257,32 @@ MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
 flash-msdk:
 	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
 		-f interface/cmsis-dap.cfg -f target/$(MCU_VARIANT_LOWER).cfg \
-		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
+		-c "program $(BUILD)/firmware.elf verify; init; reset; exit"
 
 # flash target using JLink
 JLINK_DEVICE = $(MCU_VARIANT_LOWER)
-flash: flash-jlink
 
-$(BUILD)/firmware.elf: $(OBJ) $(LINKERFILE)
+JLINKEXE 		?= JLink.exe
+JLINKEXE     	+= -if SWD -device ${JLINK_DEVICE} -speed 10000
+COMMAND_FILE 	:= tools/flash_max32.jlink
+
+flash-jlink: $(BUILD)/firmware.bin
+	@$(JLINKEXE) -device $(MCU_VARIANT_UPPER) -NoGui 1 -CommandFile ${COMMAND_FILE}
+
+$(BUILD)/firmware.elf: $(OBJ)
 	$(STEPECHO) "LINK $@"
-	$(Q)echo $(OBJ) > $(BUILD)/firmware.objs
+	$(Q)echo $^ > $(BUILD)/firmware.objs
 	$(Q)$(CC) -o $@ $(LDFLAGS) @$(BUILD)/firmware.objs -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group
 	$(Q)$(SIZE) $@ | $(PYTHON) $(TOP)/tools/build_memory_info.py $(LINKERFILE) $(BUILD)
 
+$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
+	$(STEPECHO) "Create $@"
+	$(Q)$(OBJCOPY) -O ihex $^ $@
+
+$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
+	$(STEPECHO) "Create $@"
+	$(Q)$(OBJCOPY) -O binary $^ $@
+
 # *******************************************************************************
 ### CKTPY BUILD RULES ###
 include $(TOP)/py/mkrules.mk

ports/analog/README.md

@@ -45,8 +45,6 @@ This requires the following:
 - The PICO board is connected to the target board via a 10-pin SWD ribbon cable.
   - If SWD connectors are not keyed, the P1 indicator (red line) on the SWD ribbon cable should match the P1 indicator on the board silkscreen near the 10-pin SWD connector.
 
-[**Section in Progress.**]
-
 ### Using the REPL
 
-[**Section in Progress. Review & Testing are needed.**]
+[**Section in Progress. USB support needs implementation & test.**]

ports/analog/background.c

@@ -9,17 +9,17 @@
 #include "supervisor/usb.h"
 #include "supervisor/shared/stack.h"
 
-#include "supervisor/max32_port.h"
+#include "max32_port.h"
+
+// From boards/$(BOARD)/board.c
+extern const mxc_gpio_cfg_t pb_pin[];
+extern const int num_pbs;
+extern const mxc_gpio_cfg_t led_pin[];
+extern const int num_leds;
 
 /** NOTE: ALL "ticks" refer to a 1/1024 s period */
 static int status_led_ticks=0;
 
-extern mxc_gpio_cfg_t led_pin[];
-extern const unsigned int num_leds;
-
-extern mxc_gpio_cfg_t pb_pin[];
-extern const unsigned int num_pbs;
-
 // This function is where port-specific background
 // tasks should be performed
 // Execute port specific actions during background tick. Only if ticks are enabled.
@@ -29,7 +29,7 @@ void port_background_tick(void) {
     // Set an LED approx. 1/s
     if (status_led_ticks > 1024)
     {
-        MXC_GPIO_OutToggle(led_pin[0].port, led_pin[0].mask);
+        MXC_GPIO_OutToggle(led_pin[2].port, led_pin[2].mask);
         status_led_ticks = 0;
     }
 }

ports/analog/boards/APARD/mpconfigboard.h

@@ -22,10 +22,16 @@
 
 #define BOARD_HAS_CRYSTAL 1
 
-// todo: figure out a way to smartly set this up based on storage considerations
+#define NUM_GPIO_PORTS 4
+
 #if INTERNAL_FLASH_FILESYSTEM
-#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x10032000) // for MAX32690
+#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x102FC000) // for MAX32690
 #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64 * 1024)        // 64K
+
+#define MAX32_FLASH_SIZE  0x300000 // 3 MiB
+#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64KiB
+#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x102FC000 // Load into the last MiB of code/data storage
+
 #else
 #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0)
 #endif

ports/analog/linking/max32690_cktpy.ld

@@ -1,38 +1,51 @@
 MEMORY {
     ROM             (rx) : ORIGIN = 0x00000000,    LENGTH = 128K
     FLASH           (rx) : ORIGIN = 0x10000000,    LENGTH = 3M
-    FLASH_ISR       (rx) : ORIGIN = 0x10000000,    LENGTH = 16K
-    FLASH_FS        (rw) : ORIGIN = 0x10004000,    LENGTH = 64K
-    FLASH_FIRMWARE  (rx) : ORIGIN = 0x10014000,    LENGTH = 0x10030000 - 80K
-    RAM            (rwx): ORIGIN = 0x20000000,    LENGTH = 1M
+    FLASH_FIRMWARE  (rx) : ORIGIN = 0x10000000,    LENGTH = 2992K
+    FLASH_ISR       (rx) : ORIGIN = 0x102EC000,    LENGTH = 16K
+    FLASH_FS        (rx) : ORIGIN = 0x102FC000,    LENGTH = 64K
+    RAM            (rwx) : ORIGIN = 0x20000000,    LENGTH = 1M
 }
-/* FLASH FIRMWARE: 0x10300000 (end) - 0x10042000 = 0x002BE000 */
-
-ENTRY(Reset_Handler)
+/* Minimum flash page is 16K */
+/* FLASH FIRMWARE: 3072K [3MB] - 16K - 64K = 2992K */
 
 SECTIONS {
     .rom :
     {
-        KEEP(*(.rom_vector))
-        *(.rom_handlers*)
+        KEEP(*(.rom_vector*))
+        KEEP(*(.rom_handlers*))
     } > ROM
 
+
+    /** FIXME:   can't place this in its own section for some reason
+    *           system doesn't exit ROM code unless *(.isr_vector)
+    *           is placed in the beginning of .text,
+    *           even if .text is moved upward and *(.isr_vector) is
+    *           placed at 0x10000000.
+    **/
+
     /* Place ISR vector in a separate flash section */
-    .isr_vector :
-    {
-        . = ALIGN(4);
-        /* Startup code */
-        KEEP(*(.isr_vector*))
-    } >FLASH_ISR
+    /* .isr_vector : */
+    /* { */
+        /* ISR Vector beginning of .text */
+        /* KEEP(*(.isr_vector)) */
+        /* KEEP(*(.isr_vector*)) */
+    /* } > FLASH_ISR */
 
     .text :
     {
         . = ALIGN(4);
         _text = .;
 
-        /* program code, exclude RISCV code */
-        EXCLUDE_FILE (*riscv.o) *(.text*)
+        /* ISR Vector beginning of .text */
+        /** fixme:  may want to move this to FLASH_ISR long-term */
+        KEEP(*(.isr_vector))
+        KEEP(*(.isr_vector*))
+
+        . = ALIGN(4);
 
+        /* program code; exclude RISCV code */
+        EXCLUDE_FILE (*riscv.o) *(.text*)
         *(.rodata*)  /* read-only data: "const" */
 
         KEEP(*(.init))
@@ -146,21 +159,21 @@ SECTIONS {
      * size of stack_dummy section */
     __StackTop = ORIGIN(RAM) + LENGTH(RAM);
     __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    _stack = __StackTop;
     _estack = __StackLimit; /* Provide _estack for CktPython */
 
     .heap (COPY):
     {
         . = ALIGN(4);
-        __heap = .;
+        _heap = .;
         PROVIDE ( end = . );
         PROVIDE ( _end = . );
         *(.heap*)
         __HeapLimit = ABSOLUTE(__StackLimit);
     } > RAM
 
-    __eheap = __HeapLimit;
-
-    PROVIDE(__stack = __StackTop);
+    _eheap = __HeapLimit;
 
     /* Check if data + heap + stack exceeds RAM limit */
     ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")

ports/analog/mpconfigport.h

@@ -12,11 +12,8 @@
 #define MICROPY_PY_FUNCTION_ATTRS                (1)
 #define MICROPY_PY_REVERSE_SPECIAL_METHODS       (1)
 
-
-// 24kiB stack
+// 24KiB stack
 #define CIRCUITPY_DEFAULT_STACK_SIZE            0x6000
-// uint8_t _ld_default_stack_size;
-// #define CIRCUITPY_DEFAULT_STACK_SIZE            ((uint32_t)&_ld_default_stack_size)
 
 // Also includes mpconfigboard.h
 #include "py/circuitpy_mpconfig.h"