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[ports/espressif] support for esp32c61
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19 files changed

+381
-7
lines changed

19 files changed

+381
-7
lines changed

‎ports/espressif/Makefile‎

Lines changed: 26 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,8 @@ include ../../py/circuitpy_mkenv.mk
88

99
ifeq ($(IDF_TARGET),esp32s3)
1010
BT_IDF_TARGET = esp32c3
11+
else ifeq ($(IDF_TARGET),esp32c61)
12+
BT_IDF_TARGET = esp32c6
1113
else
1214
BT_IDF_TARGET = $(IDF_TARGET)
1315
endif
@@ -296,6 +298,23 @@ LDFLAGS += \
296298
-Tesp32c6.rom.wdt.ld
297299

298300

301+
CHIP_COMPONENTS = \
302+
esp_driver_tsens
303+
304+
else ifeq ($(IDF_TARGET),esp32c61)
305+
LDFLAGS += \
306+
-Tesp32c61.rom.phy.ld \
307+
-Tesp32c61.rom.pp.ld \
308+
-Tesp32c61.rom.net80211.ld \
309+
-Tesp32c61.rom.libc.ld \
310+
-Tesp32c61.rom.newlib.ld \
311+
-Tesp32c61.rom.version.ld \
312+
-Tesp32c61.rom.coexist.ld \
313+
-Tesp32c61.rom.heap.ld \
314+
-Tesp32c61.rom.systimer.ld \
315+
-Tesp32c61.rom.wdt.ld
316+
317+
299318
CHIP_COMPONENTS = \
300319
esp_driver_tsens
301320

@@ -360,6 +379,8 @@ else ifeq ($(IDF_TARGET),esp32c3)
360379
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C3
361380
else ifeq ($(IDF_TARGET),esp32c6)
362381
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C6
382+
else ifeq ($(IDF_TARGET),esp32c61)
383+
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C61
363384
else ifeq ($(IDF_TARGET),esp32p4)
364385
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32P4
365386
else ifeq ($(IDF_TARGET),esp32h2)
@@ -698,6 +719,7 @@ ifneq ($(CIRCUITPY_BLEIO_NATIVE),0)
698719
BLE_IMPL_esp32c2 := libble
699720
BLE_IMPL_esp32c3 := esp32c3
700721
BLE_IMPL_esp32c6 := libble
722+
BLE_IMPL_esp32c61 := libble
701723
BLE_IMPL_esp32h2 := libble
702724
BLE_IMPL = $(BLE_IMPL_$(IDF_TARGET))
703725

@@ -716,8 +738,8 @@ ifneq ($(CIRCUITPY_BLEIO_NATIVE),0)
716738

717739
ifeq ($(BLE_IMPL),libble)
718740
BINARY_BLOBS += esp-idf/components/esp_phy/lib/$(IDF_TARGET)/libbtbb.a
719-
ifeq ($(IDF_TARGET),esp32c6)
720-
BINARY_BLOBS += esp-idf/components/bt/controller/lib_$(IDF_TARGET)/$(IDF_TARGET)-bt-lib/$(IDF_TARGET)/libble_app.a
741+
ifeq ($(BT_IDF_TARGET),esp32c6)
742+
BINARY_BLOBS += esp-idf/components/bt/controller/lib_$(BT_IDF_TARGET)/$(BT_IDF_TARGET)-bt-lib/$(IDF_TARGET)/libble_app.a
721743
else
722744
BINARY_BLOBS += esp-idf/components/bt/controller/lib_$(IDF_TARGET)/$(IDF_TARGET)-bt-lib/libble_app.a
723745
endif
@@ -785,6 +807,8 @@ else ifeq ($(IDF_TARGET),esp32c3)
785807
BOOTLOADER_OFFSET = 0x0
786808
else ifeq ($(IDF_TARGET),esp32c6)
787809
BOOTLOADER_OFFSET = 0x0
810+
else ifeq ($(IDF_TARGET),esp32c61)
811+
BOOTLOADER_OFFSET = 0x0
788812
else ifeq ($(IDF_TARGET),esp32p4)
789813
BOOTLOADER_OFFSET = 0x2000
790814
else ifeq ($(IDF_TARGET),esp32s3)

‎ports/espressif/boards/espressif_esp32c61_devkitc_1_n8r2/board.c‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#include "supervisor/board.h"
8+
9+
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/espressif/boards/espressif_esp32c61_devkitc_1_n8r2/mpconfigboard.h‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#pragma once
8+
9+
// Micropython setup
10+
11+
#define MICROPY_HW_BOARD_NAME "ESP32-C61-DevKitC-1-N8R2"
12+
#define MICROPY_HW_MCU_NAME "ESP32C61"
13+
14+
#define DEFAULT_UART_BUS_RX (&pin_GPIO10)
15+
#define DEFAULT_UART_BUS_TX (&pin_GPIO11)

‎ports/espressif/boards/espressif_esp32c61_devkitc_1_n8r2/mpconfigboard.mk‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
CIRCUITPY_CREATOR_ID = 0x000C303A
2+
CIRCUITPY_CREATION_ID = 0x00C61001
3+
4+
IDF_TARGET = esp32c61
5+
IDF_TARGET_ARCH = riscv
6+
7+
CIRCUITPY_ESP_FLASH_MODE = qio
8+
CIRCUITPY_ESP_FLASH_FREQ = 80m
9+
CIRCUITPY_ESP_FLASH_SIZE = 8MB
10+
11+
CIRCUITPY_ESP_PSRAM_SIZE = 2MB
12+
CIRCUITPY_ESP_PSRAM_MODE = qio
13+
CIRCUITPY_ESP_PSRAM_FREQ = 80m

‎ports/espressif/boards/espressif_esp32c61_devkitc_1_n8r2/pins.c‎

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#include "shared-bindings/board/__init__.h"
8+
9+
static const mp_rom_map_elem_t board_module_globals_table[] = {
10+
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
11+
12+
{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
13+
{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
14+
{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
15+
{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
16+
{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
17+
{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
18+
{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
19+
{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
20+
{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
21+
{ MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
22+
{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
23+
{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
24+
{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
25+
{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
26+
{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
27+
{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
28+
{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
29+
{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
30+
{ MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
31+
{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
32+
{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
33+
{ MP_ROM_QSTR(MP_QSTR_IO22), MP_ROM_PTR(&pin_GPIO22) },
34+
{ MP_ROM_QSTR(MP_QSTR_IO23), MP_ROM_PTR(&pin_GPIO23) },
35+
{ MP_ROM_QSTR(MP_QSTR_IO24), MP_ROM_PTR(&pin_GPIO24) },
36+
{ MP_ROM_QSTR(MP_QSTR_IO25), MP_ROM_PTR(&pin_GPIO25) },
37+
{ MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
38+
{ MP_ROM_QSTR(MP_QSTR_IO27), MP_ROM_PTR(&pin_GPIO27) },
39+
{ MP_ROM_QSTR(MP_QSTR_IO28), MP_ROM_PTR(&pin_GPIO28) },
40+
{ MP_ROM_QSTR(MP_QSTR_IO29), MP_ROM_PTR(&pin_GPIO29) },
41+
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO8) },
42+
43+
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO11) },
44+
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO10) },
45+
46+
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
47+
};
48+
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

‎ports/espressif/boards/espressif_esp32c61_devkitc_1_n8r2/sdkconfig‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
#
2+
# Espressif IoT Development Framework Configuration
3+
#
4+
#
5+
# Component config
6+
#
7+
#
8+
# LWIP
9+
#
10+
# end of LWIP
11+
12+
# end of Component config
13+
14+
# end of Espressif IoT Development Framework Configuration

‎ports/espressif/common-hal/analogbufio/BufferedIn.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
#elif defined(CONFIG_IDF_TARGET_ESP32S2)
3434
#define ADC_RESULT_BYTE 2
3535
#define ADC_CONV_LIMIT_EN 0
36-
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
36+
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) || defined(CONFIG_IDF_TARGET_ESP32C61)
3737
#define ADC_RESULT_BYTE 4
3838
#define ADC_CONV_LIMIT_EN 0
3939
#elif defined(CONFIG_IDF_TARGET_ESP32S3)

‎ports/espressif/common-hal/analogio/AnalogIn.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,8 @@
3232
#define DATA_WIDTH ADC_BITWIDTH_12
3333
#elif defined(CONFIG_IDF_TARGET_ESP32C6)
3434
#define DATA_WIDTH ADC_BITWIDTH_12
35+
#elif defined(CONFIG_IDF_TARGET_ESP32C61)
36+
#define DATA_WIDTH ADC_BITWIDTH_12
3537
#elif defined(CONFIG_IDF_TARGET_ESP32P4)
3638
#define DATA_WIDTH ADC_BITWIDTH_12
3739
#elif defined(CONFIG_IDF_TARGET_ESP32S2)

‎ports/espressif/common-hal/microcontroller/Pin.c‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -146,6 +146,29 @@ static const uint64_t pin_mask_reset_forbidden =
146146
#endif
147147
#endif // ESP32C6
148148

149+
#if defined(CONFIG_IDF_TARGET_ESP32C61)
150+
// Never ever reset pins used to communicate with SPI flash.
151+
GPIO_SEL_15 | // SPICS0 (flash CS#)
152+
GPIO_SEL_16 | // SPIQ (MISO/SIO1)
153+
GPIO_SEL_17 | // SPIWP (WP#/SIO2)
154+
GPIO_SEL_19 | // SPIHD (HOLD#/SIO3)
155+
GPIO_SEL_20 | // SPICLK (CLK)
156+
GPIO_SEL_21 | // SPID (MOSI/SIO0)
157+
#if CIRCUITPY_ESP_USB_SERIAL_JTAG
158+
// Never ever reset serial/JTAG communication pins.
159+
GPIO_SEL_12 | // USB D-
160+
GPIO_SEL_13 | // USB D+
161+
#endif
162+
#if defined(CONFIG_SPIRAM)
163+
GPIO_SEL_14 | // SPICS1 (PSRAM CS#); keep if PSRAM in use
164+
#endif
165+
#if defined(CONFIG_ESP_CONSOLE_UART_DEFAULT) && CONFIG_ESP_CONSOLE_UART_DEFAULT && CONFIG_ESP_CONSOLE_UART_NUM == 0
166+
// Never reset debug UART/console pins.
167+
GPIO_SEL_10 |
168+
GPIO_SEL_11 |
169+
#endif
170+
#endif // ESP32C6
171+
149172
#if defined(CONFIG_IDF_TARGET_ESP32H2)
150173
// Never ever reset pins used to communicate with the in-package SPI flash.
151174
GPIO_SEL_15 |

‎ports/espressif/common-hal/microcontroller/Processor.c‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ uint32_t common_hal_mcu_processor_get_frequency(void) {
5959
// If the requested frequency is not supported by the hardware, return the next lower supported frequency
6060
static uint32_t get_valid_cpu_frequency(uint32_t requested_freq_mhz) {
6161

62-
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
62+
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)
6363
uint32_t valid_cpu_frequencies[] = {20, 40, 80, 160};
6464
#elif defined(CONFIG_IDF_TARGET_ESP32C2)
6565
uint32_t valid_cpu_frequencies[] = {20, 40, 80, 120};
@@ -126,6 +126,8 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
126126
uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_0_REG);
127127
#elif defined(CONFIG_IDF_TARGET_ESP32C2)
128128
uint32_t mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA0_REG);
129+
#elif defined(CONFIG_IDF_TARGET_ESP32C61)
130+
uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS0_REG);
129131
#else
130132
uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_0_REG);
131133
#endif
@@ -145,6 +147,8 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
145147
mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_1_REG);
146148
#elif defined(CONFIG_IDF_TARGET_ESP32C2)
147149
mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA1_REG);
150+
#elif defined(CONFIG_IDF_TARGET_ESP32C61)
151+
mac_address_part = REG_READ(EFUSE_RD_MAC_SYS1_REG);
148152
#else
149153
mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_1_REG);
150154
#endif

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