@@ -206,20 +206,22 @@ void ospi_setup_write_ext(ospi_flash_cfg_t *ospi_cfg, bool rxds, uint32_t inst_l
206206 spi_enable (ospi_cfg );
207207}
208208
209+ static inline uint32_t ospi_xip_ctrlr0 (uint32_t data_len ) {
210+ return CTRLR0_IS_MST
211+ | (OCTAL << CTRLR0_SPI_FRF_OFFSET )
212+ | (0 << CTRLR0_SCPOL_OFFSET )
213+ | (0 << CTRLR0_SCPH_OFFSET )
214+ | (0 << CTRLR0_SSTE_OFFSET )
215+ | (TMOD_RO << CTRLR0_TMOD_OFFSET )
216+ | (data_len << CTRLR0_DFS_OFFSET );
217+ }
218+
209219void ospi_xip_enter_ext (ospi_flash_cfg_t * ospi_cfg , uint32_t inst_len , uint32_t data_len , uint16_t incr_command , uint16_t wrap_command , uint16_t read_dummy_cycles ) {
210220 spi_disable (ospi_cfg );
211221
212- uint32_t val = CTRLR0_IS_MST
213- | (OCTAL << CTRLR0_SPI_FRF_OFFSET )
214- | (0 << CTRLR0_SCPOL_OFFSET )
215- | (0 << CTRLR0_SCPH_OFFSET )
216- | (0 << CTRLR0_SSTE_OFFSET )
217- | (TMOD_RO << CTRLR0_TMOD_OFFSET )
218- | (data_len << CTRLR0_DFS_OFFSET );
219-
220- ospi_writel (ospi_cfg , ctrlr0 , val );
222+ ospi_writel (ospi_cfg , ctrlr0 , ospi_xip_ctrlr0 (data_len ));
221223
222- val = (OCTAL << XIP_CTRL_FRF_OFFSET )
224+ uint32_t val = (OCTAL << XIP_CTRL_FRF_OFFSET )
223225 | (0x2 << XIP_CTRL_TRANS_TYPE_OFFSET )
224226 | (ADDR_L32bit << XIP_CTRL_ADDR_L_OFFSET )
225227 | (inst_len << XIP_CTRL_INST_L_OFFSET )
@@ -292,3 +294,9 @@ void ospi_xip_exit_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t inst_len, uint16_t i
292294 ospi_xip_enable (ospi_cfg );
293295 ospi_xip_disable (ospi_cfg );
294296}
297+
298+ void ospi_xip_restore_ext (ospi_flash_cfg_t * ospi_cfg , uint32_t data_len ) {
299+ spi_disable (ospi_cfg );
300+ ospi_writel (ospi_cfg , ctrlr0 , ospi_xip_ctrlr0 (data_len ));
301+ spi_enable (ospi_cfg );
302+ }
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