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alif: Integrate cyw43 WLAN driver.
Signed-off-by: Damien George <damien@micropython.org>
1 parent 526c7ea commit d6e3342

8 files changed

Lines changed: 323 additions & 1 deletion

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‎ports/alif/alif.mk‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,7 @@ SRC_O += \
115115

116116
SRC_C = \
117117
alif_flash.c \
118+
cyw43_port_spi.c \
118119
fatfs_port.c \
119120
machine_pin.c \
120121
machine_i2c.c \
@@ -196,12 +197,12 @@ ALIF_SRC_C += $(addprefix $(ALIF_DFP_REL_TOP)/,\
196197
Device/core/$(MCU_CORE)/source/startup_$(MCU_CORE).c \
197198
drivers/source/adc.c \
198199
drivers/source/i2c.c \
199-
drivers/source/spi.c \
200200
drivers/source/mhu_driver.c \
201201
drivers/source/mhu_receiver.c \
202202
drivers/source/mhu_sender.c \
203203
drivers/source/mram.c \
204204
drivers/source/pinconf.c \
205+
drivers/source/spi.c \
205206
drivers/source/uart.c \
206207
drivers/source/utimer.c \
207208
ospi_xip/source/ospi/ospi_drv.c \

‎ports/alif/cyw43_configport.h‎

Lines changed: 123 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,123 @@
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/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2024-2025 OpenMV LLC.
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*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
#ifndef MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
27+
#define MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
28+
29+
// The board-level config will be included here, so it can set some CYW43 values.
30+
#include "py/mpconfig.h"
31+
#include "py/mperrno.h"
32+
#include "py/mphal.h"
33+
#include "py/runtime.h"
34+
#include "extmod/modnetwork.h"
35+
#include "pendsv.h"
36+
37+
#ifndef static_assert
38+
#define static_assert(expr, msg) typedef int static_assert_##__LINE__[(expr) ? 1 : -1]
39+
#endif
40+
41+
#define CYW43_USE_SPI (1)
42+
#define CYW43_LWIP (1)
43+
#define CYW43_USE_STATS (0)
44+
#define CYW43_PRINTF(...) mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
45+
46+
#if 0
47+
#define CYW43_VERBOSE_DEBUG (1)
48+
#define CYW43_VDEBUG(...) mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
49+
#define CYW43_DEBUG(...) mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
50+
#define CYW43_INFO(...) mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
51+
#define CYW43_WARN(...) mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
52+
#endif
53+
54+
#define CYW43_IOCTL_TIMEOUT_US (1000000)
55+
#define CYW43_SLEEP_MAX (50)
56+
#define CYW43_NETUTILS (1)
57+
#define CYW43_CLEAR_SDIO_INT (1)
58+
59+
#define CYW43_EPERM MP_EPERM // Operation not permitted
60+
#define CYW43_EIO MP_EIO // I/O error
61+
#define CYW43_EINVAL MP_EINVAL // Invalid argument
62+
#define CYW43_ETIMEDOUT MP_ETIMEDOUT // Connection timed out
63+
64+
#define CYW43_THREAD_ENTER MICROPY_PY_LWIP_ENTER
65+
#define CYW43_THREAD_EXIT MICROPY_PY_LWIP_EXIT
66+
#define CYW43_THREAD_LOCK_CHECK
67+
68+
#define CYW43_HOST_NAME mod_network_hostname_data
69+
70+
#define CYW43_SDPCM_SEND_COMMON_WAIT __WFE()
71+
#define CYW43_DO_IOCTL_WAIT // __WFE()
72+
#define CYW43_EVENT_POLL_HOOK mp_event_handle_nowait()
73+
74+
#define CYW43_ARRAY_SIZE(a) MP_ARRAY_SIZE(a)
75+
76+
#define CYW43_HAL_PIN_MODE_INPUT MP_HAL_PIN_MODE_INPUT
77+
#define CYW43_HAL_PIN_MODE_OUTPUT MP_HAL_PIN_MODE_OUTPUT
78+
#define CYW43_HAL_PIN_PULL_NONE 0
79+
80+
#define CYW43_HAL_MAC_WLAN0 MP_HAL_MAC_WLAN0
81+
82+
#define cyw43_hal_ticks_us mp_hal_ticks_us
83+
#define cyw43_hal_ticks_ms mp_hal_ticks_ms
84+
85+
#define cyw43_hal_pin_obj_t mp_hal_pin_obj_t
86+
#define cyw43_hal_pin_read mp_hal_pin_read
87+
#define cyw43_hal_pin_low mp_hal_pin_low
88+
#define cyw43_hal_pin_high mp_hal_pin_high
89+
90+
#define cyw43_hal_get_mac mp_hal_get_mac
91+
#define cyw43_hal_get_mac_ascii mp_hal_get_mac_ascii
92+
#define cyw43_hal_generate_laa_mac mp_hal_generate_laa_mac
93+
94+
#define CYW43_PIN_WL_REG_ON pin_WL_REG_ON
95+
#define CYW43_PIN_WL_IRQ pin_WL_IRQ
96+
97+
#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
98+
99+
void cyw43_post_poll_hook(void);
100+
101+
static inline void cyw43_delay_us(uint32_t us) {
102+
uint32_t start = mp_hal_ticks_us();
103+
while (mp_hal_ticks_us() - start < us) {
104+
}
105+
}
106+
107+
static inline void cyw43_delay_ms(uint32_t ms) {
108+
mp_hal_delay_ms(ms);
109+
}
110+
111+
static inline void cyw43_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt) {
112+
if (mode == MP_HAL_PIN_MODE_INPUT) {
113+
mp_hal_pin_input(pin);
114+
} else {
115+
mp_hal_pin_output(pin);
116+
}
117+
}
118+
119+
static inline void cyw43_hal_pin_config_irq_falling(mp_hal_pin_obj_t pin, bool enable) {
120+
mp_hal_pin_config_irq_falling(pin, enable);
121+
}
122+
123+
#endif // MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H

‎ports/alif/cyw43_port_spi.c‎

Lines changed: 150 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,150 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2024-2025 OpenMV LLC.
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#if MICROPY_PY_NETWORK_CYW43
28+
29+
#include "lib/cyw43-driver/src/cyw43.h"
30+
#include "lib/cyw43-driver/src/cyw43_internal.h"
31+
#include "lib/cyw43-driver/src/cyw43_spi.h"
32+
33+
#include "spi.h"
34+
#include "sys_ctrl_spi.h"
35+
36+
// CYW43 is connected to SPI3.
37+
#define HW_SPI ((SPI_Type *)SPI3_BASE)
38+
#define SPI_BAUDRATE (16000000)
39+
#define SPI_RX_FIFO_SIZE (16)
40+
41+
// WL_IRQ is on P9_6.
42+
#define WL_IRQ_IRQN (GPIO9_IRQ6_IRQn)
43+
#define WL_IRQ_HANDLER GPIO9_IRQ6Handler
44+
45+
// Must run at IRQ priority above PendSV so it can wake cyw43-driver when PendSV is disabled.
46+
void WL_IRQ_HANDLER(void) {
47+
if (gpio_read_int_rawstatus(pin_WL_IRQ->gpio, pin_WL_IRQ->pin)) {
48+
gpio_interrupt_eoi(pin_WL_IRQ->gpio, pin_WL_IRQ->pin);
49+
pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
50+
__SEV();
51+
}
52+
}
53+
54+
static void spi_bus_init(void) {
55+
// Configure pins.
56+
mp_hal_pin_output(pin_WL_CS);
57+
mp_hal_pin_high(pin_WL_CS);
58+
// NOTE: Alif recommends enabled input read for all SPI pins.
59+
mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
60+
mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
61+
mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
62+
63+
// Starts out clock_polarity=1, clock_phase=0.
64+
spi_mode_master(HW_SPI);
65+
spi_set_bus_speed(HW_SPI, SPI_BAUDRATE, GetSystemAHBClock());
66+
spi_set_mode(HW_SPI, SPI_MODE_2);
67+
spi_set_protocol(HW_SPI, SPI_PROTO_SPI);
68+
spi_set_dfs(HW_SPI, 8);
69+
spi_set_tmod(HW_SPI, SPI_TMOD_TX_AND_RX);
70+
spi_control_ss(HW_SPI, 0, SPI_SS_STATE_ENABLE);
71+
}
72+
73+
int cyw43_spi_init(cyw43_int_t *self) {
74+
spi_bus_init();
75+
76+
// Configure IRQ for WL_IRQ (active low input).
77+
NVIC_SetPriority(WL_IRQ_IRQN, IRQ_PRI_CYW43);
78+
NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
79+
NVIC_EnableIRQ(WL_IRQ_IRQN);
80+
81+
return 0;
82+
}
83+
84+
void cyw43_spi_deinit(cyw43_int_t *self) {
85+
// Disable clock, SS and SPI.
86+
spi_mask_interrupts(HW_SPI);
87+
spi_control_ss(HW_SPI, 0, 0);
88+
spi_disable(HW_SPI);
89+
90+
// Disable SPI IRQ.
91+
NVIC_DisableIRQ(WL_IRQ_IRQN);
92+
NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
93+
}
94+
95+
void cyw43_spi_gpio_setup(void) {
96+
}
97+
98+
void cyw43_spi_reset(void) {
99+
}
100+
101+
void cyw43_spi_set_polarity(cyw43_int_t *self, int pol) {
102+
(void)self;
103+
104+
if (pol == 0) {
105+
spi_set_mode(HW_SPI, SPI_MODE_0);
106+
} else {
107+
spi_set_mode(HW_SPI, SPI_MODE_2);
108+
}
109+
}
110+
111+
// tx must not be NULL.
112+
// rx_len must be 0, or the same as tx_len.
113+
int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_len, uint8_t *rx, size_t rx_len) {
114+
(void)self;
115+
116+
if (tx_len == 0 && rx_len == 0) {
117+
return 0;
118+
}
119+
120+
mp_hal_pin_low(pin_WL_CS);
121+
122+
// Must read the same amount of data that is written out to SPI.
123+
rx_len = tx_len;
124+
125+
while (tx_len || rx_len) {
126+
// Only add data to the TX FIFO if:
127+
// - there's data to add
128+
// - and TX is not ahead of RX by more than the RX FIFO size
129+
// - and there's space in the TX FIFO
130+
if (tx_len && tx_len + SPI_RX_FIFO_SIZE > rx_len && (HW_SPI->SPI_SR & SPI_SR_TFNF) != 0) {
131+
HW_SPI->SPI_DR[0] = *tx++;
132+
--tx_len;
133+
}
134+
135+
// Take data from the RX FIFO and store it into the output buffer (if given).
136+
if (rx_len && (HW_SPI->SPI_SR & SPI_SR_RFNE) != 0) {
137+
uint8_t data = HW_SPI->SPI_DR[0];
138+
if (rx != NULL) {
139+
*rx++ = data;
140+
}
141+
--rx_len;
142+
}
143+
}
144+
145+
mp_hal_pin_high(pin_WL_CS);
146+
147+
return 0;
148+
}
149+
150+
#endif

‎ports/alif/irq.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
#define IRQ_PRI_HWSEM NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 8, 0)
5050
#define IRQ_PRI_GPU NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 10, 0)
5151
#define IRQ_PRI_RTC NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 100, 0)
52+
#define IRQ_PRI_CYW43 NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 126, 0)
5253
#define IRQ_PRI_PENDSV NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 127, 0)
5354

5455
// these states correspond to values from query_irq, enable_irq and disable_irq

‎ports/alif/main.c‎

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Original file line numberDiff line numberDiff line change
@@ -47,6 +47,9 @@
4747
#include "lwip/init.h"
4848
#include "lwip/apps/mdns.h"
4949
#endif
50+
#if MICROPY_PY_NETWORK_CYW43
51+
#include "lib/cyw43-driver/src/cyw43.h"
52+
#endif
5053

5154
extern uint8_t __StackTop, __StackLimit;
5255
extern uint8_t __GcHeapStart, __GcHeapEnd;
@@ -100,6 +103,18 @@ int main(void) {
100103
mod_network_lwip_init();
101104
#endif
102105

106+
#if MICROPY_PY_NETWORK_CYW43
107+
{
108+
cyw43_init(&cyw43_state);
109+
uint8_t buf[8];
110+
memcpy(&buf[0], "ALIF", 4);
111+
mp_hal_get_mac_ascii(MP_HAL_MAC_WLAN0, 8, 4, (char *)&buf[4]);
112+
cyw43_wifi_ap_set_ssid(&cyw43_state, 8, buf);
113+
cyw43_wifi_ap_set_auth(&cyw43_state, CYW43_AUTH_WPA2_AES_PSK);
114+
cyw43_wifi_ap_set_password(&cyw43_state, 8, (const uint8_t *)"alif0123");
115+
}
116+
#endif
117+
103118
for (;;) {
104119
// Initialise MicroPython runtime.
105120
mp_init();

‎ports/alif/mpconfigport.h‎

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Original file line numberDiff line numberDiff line change
@@ -155,6 +155,21 @@
155155
#define MICROPY_FATFS_MAX_SS (MICROPY_HW_FLASH_BLOCK_SIZE_BYTES)
156156
#endif
157157

158+
#if MICROPY_PY_NETWORK_CYW43
159+
extern const struct _mp_obj_type_t mp_network_cyw43_type;
160+
#define MICROPY_HW_NIC_CYW43 { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&mp_network_cyw43_type) },
161+
#else
162+
#define MICROPY_HW_NIC_CYW43
163+
#endif
164+
165+
#ifndef MICROPY_BOARD_NETWORK_INTERFACES
166+
#define MICROPY_BOARD_NETWORK_INTERFACES
167+
#endif
168+
169+
#define MICROPY_PORT_NETWORK_INTERFACES \
170+
MICROPY_HW_NIC_CYW43 \
171+
MICROPY_BOARD_NETWORK_INTERFACES \
172+
158173
#define MP_STATE_PORT MP_STATE_VM
159174

160175
// Miscellaneous settings

‎ports/alif/mpnetworkport.c‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,10 @@
3232
#include "shared/runtime/softtimer.h"
3333
#include "lwip/timeouts.h"
3434

35+
#if MICROPY_PY_NETWORK_CYW43
36+
#include "lib/cyw43-driver/src/cyw43.h"
37+
#endif
38+
3539
// Poll lwIP every 64ms by default
3640
#define LWIP_TICK_RATE_MS 64
3741

@@ -50,6 +54,16 @@ static void mp_network_soft_timer_callback(soft_timer_entry_t *self) {
5054
#if LWIP_NETIF_LOOPBACK
5155
netif_poll_all();
5256
#endif
57+
58+
#if MICROPY_PY_NETWORK_CYW43
59+
if (cyw43_poll) {
60+
if (cyw43_sleep != 0) {
61+
if (--cyw43_sleep == 0) {
62+
cyw43_poll();
63+
}
64+
}
65+
}
66+
#endif
5367
}
5468

5569
void mod_network_lwip_init(void) {

‎ports/alif/pendsv.h‎

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Original file line numberDiff line numberDiff line change
@@ -34,6 +34,9 @@
3434

3535
enum {
3636
PENDSV_DISPATCH_SOFT_TIMER,
37+
#if MICROPY_PY_NETWORK_CYW43
38+
PENDSV_DISPATCH_CYW43,
39+
#endif
3740
MICROPY_BOARD_PENDSV_ENTRIES
3841
PENDSV_DISPATCH_MAX
3942
};

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