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Commit 112104e

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Merge branch 'clk-determine-rate' into clk-next
* clk-determine-rate: (120 commits) clk: microchip: core: remove duplicate roclk_determine_rate() clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver clk: scmi: migrate round_rate() to determine_rate() clk: ti: fapll: convert from round_rate() to determine_rate() clk: ti: dra7-atl: convert from round_rate() to determine_rate() clk: ti: divider: convert from round_rate() to determine_rate() clk: ti: composite: convert from round_rate() to determine_rate() clk: ti: dpll: convert from round_rate() to determine_rate() clk: ti: dpll: change error return from ~0 to -EINVAL clk: ti: dpll: remove round_rate() in favor of determine_rate() clk: tegra: tegra210-emc: convert from round_rate() to determine_rate() clk: tegra: super: convert from round_rate() to determine_rate() clk: tegra: pll: convert from round_rate() to determine_rate() clk: tegra: periph: divider: convert from round_rate() to determine_rate() clk: tegra: divider: convert from round_rate() to determine_rate() clk: tegra: audio-sync: convert from round_rate() to determine_rate() clk: fixed-factor: drop round_rate() clk ops clk: divider: remove round_rate() in favor of determine_rate() clk: visconti: pll: convert from round_rate() to determine_rate() clk: versatile: vexpress-osc: convert from round_rate() to determine_rate() ...
2 parents f35f832 + 7d85cd8 commit 112104e

123 files changed

Lines changed: 1523 additions & 1197 deletions

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drivers/clk/actions/owl-composite.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -122,13 +122,13 @@ static int owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate,
122122
rate, parent_rate);
123123
}
124124

125-
static long owl_comp_fix_fact_round_rate(struct clk_hw *hw, unsigned long rate,
126-
unsigned long *parent_rate)
125+
static int owl_comp_fix_fact_determine_rate(struct clk_hw *hw,
126+
struct clk_rate_request *req)
127127
{
128128
struct owl_composite *comp = hw_to_owl_comp(hw);
129129
struct clk_fixed_factor *fix_fact_hw = &comp->rate.fix_fact_hw;
130130

131-
return comp->fix_fact_ops->round_rate(&fix_fact_hw->hw, rate, parent_rate);
131+
return comp->fix_fact_ops->determine_rate(&fix_fact_hw->hw, req);
132132
}
133133

134134
static unsigned long owl_comp_fix_fact_recalc_rate(struct clk_hw *hw,
@@ -193,7 +193,7 @@ const struct clk_ops owl_comp_fix_fact_ops = {
193193
.is_enabled = owl_comp_is_enabled,
194194

195195
/* fix_fact_ops */
196-
.round_rate = owl_comp_fix_fact_round_rate,
196+
.determine_rate = owl_comp_fix_fact_determine_rate,
197197
.recalc_rate = owl_comp_fix_fact_recalc_rate,
198198
.set_rate = owl_comp_fix_fact_set_rate,
199199
};

drivers/clk/actions/owl-divider.c

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -23,13 +23,16 @@ long owl_divider_helper_round_rate(struct owl_clk_common *common,
2323
div_hw->div_flags);
2424
}
2525

26-
static long owl_divider_round_rate(struct clk_hw *hw, unsigned long rate,
27-
unsigned long *parent_rate)
26+
static int owl_divider_determine_rate(struct clk_hw *hw,
27+
struct clk_rate_request *req)
2828
{
2929
struct owl_divider *div = hw_to_owl_divider(hw);
3030

31-
return owl_divider_helper_round_rate(&div->common, &div->div_hw,
32-
rate, parent_rate);
31+
req->rate = owl_divider_helper_round_rate(&div->common, &div->div_hw,
32+
req->rate,
33+
&req->best_parent_rate);
34+
35+
return 0;
3336
}
3437

3538
unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common,
@@ -89,6 +92,6 @@ static int owl_divider_set_rate(struct clk_hw *hw, unsigned long rate,
8992

9093
const struct clk_ops owl_divider_ops = {
9194
.recalc_rate = owl_divider_recalc_rate,
92-
.round_rate = owl_divider_round_rate,
95+
.determine_rate = owl_divider_determine_rate,
9396
.set_rate = owl_divider_set_rate,
9497
};

drivers/clk/actions/owl-factor.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -130,14 +130,16 @@ long owl_factor_helper_round_rate(struct owl_clk_common *common,
130130
return *parent_rate * mul / div;
131131
}
132132

133-
static long owl_factor_round_rate(struct clk_hw *hw, unsigned long rate,
134-
unsigned long *parent_rate)
133+
static int owl_factor_determine_rate(struct clk_hw *hw,
134+
struct clk_rate_request *req)
135135
{
136136
struct owl_factor *factor = hw_to_owl_factor(hw);
137137
struct owl_factor_hw *factor_hw = &factor->factor_hw;
138138

139-
return owl_factor_helper_round_rate(&factor->common, factor_hw,
140-
rate, parent_rate);
139+
req->rate = owl_factor_helper_round_rate(&factor->common, factor_hw,
140+
req->rate, &req->best_parent_rate);
141+
142+
return 0;
141143
}
142144

143145
unsigned long owl_factor_helper_recalc_rate(struct owl_clk_common *common,
@@ -214,7 +216,7 @@ static int owl_factor_set_rate(struct clk_hw *hw, unsigned long rate,
214216
}
215217

216218
const struct clk_ops owl_factor_ops = {
217-
.round_rate = owl_factor_round_rate,
219+
.determine_rate = owl_factor_determine_rate,
218220
.recalc_rate = owl_factor_recalc_rate,
219221
.set_rate = owl_factor_set_rate,
220222
};

drivers/clk/actions/owl-pll.c

Lines changed: 16 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -56,26 +56,33 @@ static const struct clk_pll_table *_get_pll_table(
5656
return table;
5757
}
5858

59-
static long owl_pll_round_rate(struct clk_hw *hw, unsigned long rate,
60-
unsigned long *parent_rate)
59+
static int owl_pll_determine_rate(struct clk_hw *hw,
60+
struct clk_rate_request *req)
6161
{
6262
struct owl_pll *pll = hw_to_owl_pll(hw);
6363
struct owl_pll_hw *pll_hw = &pll->pll_hw;
6464
const struct clk_pll_table *clkt;
6565
u32 mul;
6666

6767
if (pll_hw->table) {
68-
clkt = _get_pll_table(pll_hw->table, rate);
69-
return clkt->rate;
68+
clkt = _get_pll_table(pll_hw->table, req->rate);
69+
req->rate = clkt->rate;
70+
71+
return 0;
7072
}
7173

7274
/* fixed frequency */
73-
if (pll_hw->width == 0)
74-
return pll_hw->bfreq;
75+
if (pll_hw->width == 0) {
76+
req->rate = pll_hw->bfreq;
7577

76-
mul = owl_pll_calculate_mul(pll_hw, rate);
78+
return 0;
79+
}
80+
81+
mul = owl_pll_calculate_mul(pll_hw, req->rate);
7782

78-
return pll_hw->bfreq * mul;
83+
req->rate = pll_hw->bfreq * mul;
84+
85+
return 0;
7986
}
8087

8188
static unsigned long owl_pll_recalc_rate(struct clk_hw *hw,
@@ -188,7 +195,7 @@ const struct clk_ops owl_pll_ops = {
188195
.enable = owl_pll_enable,
189196
.disable = owl_pll_disable,
190197
.is_enabled = owl_pll_is_enabled,
191-
.round_rate = owl_pll_round_rate,
198+
.determine_rate = owl_pll_determine_rate,
192199
.recalc_rate = owl_pll_recalc_rate,
193200
.set_rate = owl_pll_set_rate,
194201
};

drivers/clk/at91/clk-audio-pll.c

Lines changed: 23 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -270,8 +270,8 @@ static int clk_audio_pll_frac_determine_rate(struct clk_hw *hw,
270270
return 0;
271271
}
272272

273-
static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
274-
unsigned long *parent_rate)
273+
static int clk_audio_pll_pad_determine_rate(struct clk_hw *hw,
274+
struct clk_rate_request *req)
275275
{
276276
struct clk_hw *pclk = clk_hw_get_parent(hw);
277277
long best_rate = -EINVAL;
@@ -283,7 +283,7 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
283283
int best_diff = -1;
284284

285285
pr_debug("A PLL/PAD: %s, rate = %lu (parent_rate = %lu)\n", __func__,
286-
rate, *parent_rate);
286+
req->rate, req->best_parent_rate);
287287

288288
/*
289289
* Rate divisor is actually made of two different divisors, multiplied
@@ -304,12 +304,12 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
304304
continue;
305305

306306
best_parent_rate = clk_hw_round_rate(pclk,
307-
rate * tmp_qd * div);
307+
req->rate * tmp_qd * div);
308308
tmp_rate = best_parent_rate / (div * tmp_qd);
309-
tmp_diff = abs(rate - tmp_rate);
309+
tmp_diff = abs(req->rate - tmp_rate);
310310

311311
if (best_diff < 0 || best_diff > tmp_diff) {
312-
*parent_rate = best_parent_rate;
312+
req->best_parent_rate = best_parent_rate;
313313
best_rate = tmp_rate;
314314
best_diff = tmp_diff;
315315
}
@@ -318,11 +318,13 @@ static long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate,
318318
pr_debug("A PLL/PAD: %s, best_rate = %ld, best_parent_rate = %lu\n",
319319
__func__, best_rate, best_parent_rate);
320320

321-
return best_rate;
321+
req->rate = best_rate;
322+
323+
return 0;
322324
}
323325

324-
static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
325-
unsigned long *parent_rate)
326+
static int clk_audio_pll_pmc_determine_rate(struct clk_hw *hw,
327+
struct clk_rate_request *req)
326328
{
327329
struct clk_hw *pclk = clk_hw_get_parent(hw);
328330
long best_rate = -EINVAL;
@@ -333,20 +335,20 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
333335
int best_diff = -1;
334336

335337
pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__,
336-
rate, *parent_rate);
338+
req->rate, req->best_parent_rate);
337339

338-
if (!rate)
340+
if (!req->rate)
339341
return 0;
340342

341343
best_parent_rate = clk_round_rate(pclk->clk, 1);
342-
div = max(best_parent_rate / rate, 1UL);
344+
div = max(best_parent_rate / req->rate, 1UL);
343345
for (; div <= AUDIO_PLL_QDPMC_MAX; div++) {
344-
best_parent_rate = clk_round_rate(pclk->clk, rate * div);
346+
best_parent_rate = clk_round_rate(pclk->clk, req->rate * div);
345347
tmp_rate = best_parent_rate / div;
346-
tmp_diff = abs(rate - tmp_rate);
348+
tmp_diff = abs(req->rate - tmp_rate);
347349

348350
if (best_diff < 0 || best_diff > tmp_diff) {
349-
*parent_rate = best_parent_rate;
351+
req->best_parent_rate = best_parent_rate;
350352
best_rate = tmp_rate;
351353
best_diff = tmp_diff;
352354
tmp_qd = div;
@@ -356,9 +358,11 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate,
356358
}
357359

358360
pr_debug("A PLL/PMC: %s, best_rate = %ld, best_parent_rate = %lu (qd = %d)\n",
359-
__func__, best_rate, *parent_rate, tmp_qd - 1);
361+
__func__, best_rate, req->best_parent_rate, tmp_qd - 1);
362+
363+
req->rate = best_rate;
360364

361-
return best_rate;
365+
return 0;
362366
}
363367

364368
static int clk_audio_pll_frac_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -436,15 +440,15 @@ static const struct clk_ops audio_pll_pad_ops = {
436440
.enable = clk_audio_pll_pad_enable,
437441
.disable = clk_audio_pll_pad_disable,
438442
.recalc_rate = clk_audio_pll_pad_recalc_rate,
439-
.round_rate = clk_audio_pll_pad_round_rate,
443+
.determine_rate = clk_audio_pll_pad_determine_rate,
440444
.set_rate = clk_audio_pll_pad_set_rate,
441445
};
442446

443447
static const struct clk_ops audio_pll_pmc_ops = {
444448
.enable = clk_audio_pll_pmc_enable,
445449
.disable = clk_audio_pll_pmc_disable,
446450
.recalc_rate = clk_audio_pll_pmc_recalc_rate,
447-
.round_rate = clk_audio_pll_pmc_round_rate,
451+
.determine_rate = clk_audio_pll_pmc_determine_rate,
448452
.set_rate = clk_audio_pll_pmc_set_rate,
449453
};
450454

drivers/clk/at91/clk-h32mx.c

Lines changed: 22 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -40,21 +40,32 @@ static unsigned long clk_sama5d4_h32mx_recalc_rate(struct clk_hw *hw,
4040
return parent_rate;
4141
}
4242

43-
static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate,
44-
unsigned long *parent_rate)
43+
static int clk_sama5d4_h32mx_determine_rate(struct clk_hw *hw,
44+
struct clk_rate_request *req)
4545
{
4646
unsigned long div;
4747

48-
if (rate > *parent_rate)
49-
return *parent_rate;
50-
div = *parent_rate / 2;
51-
if (rate < div)
52-
return div;
48+
if (req->rate > req->best_parent_rate) {
49+
req->rate = req->best_parent_rate;
5350

54-
if (rate - div < *parent_rate - rate)
55-
return div;
51+
return 0;
52+
}
53+
div = req->best_parent_rate / 2;
54+
if (req->rate < div) {
55+
req->rate = div;
56+
57+
return 0;
58+
}
59+
60+
if (req->rate - div < req->best_parent_rate - req->rate) {
61+
req->rate = div;
5662

57-
return *parent_rate;
63+
return 0;
64+
}
65+
66+
req->rate = req->best_parent_rate;
67+
68+
return 0;
5869
}
5970

6071
static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -77,7 +88,7 @@ static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate,
7788

7889
static const struct clk_ops h32mx_ops = {
7990
.recalc_rate = clk_sama5d4_h32mx_recalc_rate,
80-
.round_rate = clk_sama5d4_h32mx_round_rate,
91+
.determine_rate = clk_sama5d4_h32mx_determine_rate,
8192
.set_rate = clk_sama5d4_h32mx_set_rate,
8293
};
8394

drivers/clk/at91/clk-peripheral.c

Lines changed: 29 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -279,8 +279,11 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
279279
long best_diff = LONG_MIN;
280280
u32 shift;
281281

282-
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
283-
return parent_rate;
282+
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
283+
req->rate = parent_rate;
284+
285+
return 0;
286+
}
284287

285288
/* Fist step: check the available dividers. */
286289
for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
@@ -332,50 +335,57 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
332335
return 0;
333336
}
334337

335-
static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
336-
unsigned long rate,
337-
unsigned long *parent_rate)
338+
static int clk_sam9x5_peripheral_no_parent_determine_rate(struct clk_hw *hw,
339+
struct clk_rate_request *req)
338340
{
339341
int shift = 0;
340342
unsigned long best_rate;
341343
unsigned long best_diff;
342-
unsigned long cur_rate = *parent_rate;
344+
unsigned long cur_rate = req->best_parent_rate;
343345
unsigned long cur_diff;
344346
struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
345347

346-
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
347-
return *parent_rate;
348+
if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
349+
req->rate = req->best_parent_rate;
350+
351+
return 0;
352+
}
348353

349354
if (periph->range.max) {
350355
for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
351-
cur_rate = *parent_rate >> shift;
356+
cur_rate = req->best_parent_rate >> shift;
352357
if (cur_rate <= periph->range.max)
353358
break;
354359
}
355360
}
356361

357-
if (rate >= cur_rate)
358-
return cur_rate;
362+
if (req->rate >= cur_rate) {
363+
req->rate = cur_rate;
364+
365+
return 0;
366+
}
359367

360-
best_diff = cur_rate - rate;
368+
best_diff = cur_rate - req->rate;
361369
best_rate = cur_rate;
362370
for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
363-
cur_rate = *parent_rate >> shift;
364-
if (cur_rate < rate)
365-
cur_diff = rate - cur_rate;
371+
cur_rate = req->best_parent_rate >> shift;
372+
if (cur_rate < req->rate)
373+
cur_diff = req->rate - cur_rate;
366374
else
367-
cur_diff = cur_rate - rate;
375+
cur_diff = cur_rate - req->rate;
368376

369377
if (cur_diff < best_diff) {
370378
best_diff = cur_diff;
371379
best_rate = cur_rate;
372380
}
373381

374-
if (!best_diff || cur_rate < rate)
382+
if (!best_diff || cur_rate < req->rate)
375383
break;
376384
}
377385

378-
return best_rate;
386+
req->rate = best_rate;
387+
388+
return 0;
379389
}
380390

381391
static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
@@ -427,7 +437,7 @@ static const struct clk_ops sam9x5_peripheral_ops = {
427437
.disable = clk_sam9x5_peripheral_disable,
428438
.is_enabled = clk_sam9x5_peripheral_is_enabled,
429439
.recalc_rate = clk_sam9x5_peripheral_recalc_rate,
430-
.round_rate = clk_sam9x5_peripheral_round_rate,
440+
.determine_rate = clk_sam9x5_peripheral_no_parent_determine_rate,
431441
.set_rate = clk_sam9x5_peripheral_set_rate,
432442
.save_context = clk_sam9x5_peripheral_save_context,
433443
.restore_context = clk_sam9x5_peripheral_restore_context,

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