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Liu Yinglumag
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drm/bridge: ite-it6263: Support HDMI vendor specific infoframe
IT6263 supports HDMI vendor specific infoframe. The infoframe header and payload are configurable via NULL packet registers. The infoframe is enabled and disabled via PKT_NULL_CTRL register. Add the HDMI vendor specific infoframe support. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250908-it6263-vendor-specific-infoframe-v2-1-3f2ebd9135ad@nxp.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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1 file changed

Lines changed: 44 additions & 20 deletions

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drivers/gpu/drm/bridge/ite-it6263.c

Lines changed: 44 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -146,6 +146,7 @@
146146
#define HDMI_COLOR_DEPTH_24 FIELD_PREP(HDMI_COLOR_DEPTH, 4)
147147

148148
#define HDMI_REG_PKT_GENERAL_CTRL 0xc6
149+
#define HDMI_REG_PKT_NULL_CTRL 0xc9
149150
#define HDMI_REG_AVI_INFOFRM_CTRL 0xcd
150151
#define ENABLE_PKT BIT(0)
151152
#define REPEAT_PKT BIT(1)
@@ -154,6 +155,12 @@
154155
* 3) HDMI register bank1: 0x130 ~ 0x1ff (HDMI packet registers)
155156
*/
156157

158+
/* NULL packet registers */
159+
/* Header Byte(HB): n = 0 ~ 2 */
160+
#define HDMI_REG_PKT_HB(n) (0x138 + (n))
161+
/* Packet Byte(PB): n = 0 ~ 27(HDMI_MAX_INFOFRAME_SIZE), n = 0 for checksum */
162+
#define HDMI_REG_PKT_PB(n) (0x13b + (n))
163+
157164
/* AVI packet registers */
158165
#define HDMI_REG_AVI_DB1 0x158
159166
#define HDMI_REG_AVI_DB2 0x159
@@ -224,7 +231,9 @@ static bool it6263_hdmi_writeable_reg(struct device *dev, unsigned int reg)
224231
case HDMI_REG_HDMI_MODE:
225232
case HDMI_REG_GCP:
226233
case HDMI_REG_PKT_GENERAL_CTRL:
234+
case HDMI_REG_PKT_NULL_CTRL:
227235
case HDMI_REG_AVI_INFOFRM_CTRL:
236+
case HDMI_REG_PKT_HB(0) ... HDMI_REG_PKT_PB(HDMI_MAX_INFOFRAME_SIZE):
228237
case HDMI_REG_AVI_DB1:
229238
case HDMI_REG_AVI_DB2:
230239
case HDMI_REG_AVI_DB3:
@@ -755,10 +764,16 @@ static int it6263_hdmi_clear_infoframe(struct drm_bridge *bridge,
755764
{
756765
struct it6263 *it = bridge_to_it6263(bridge);
757766

758-
if (type == HDMI_INFOFRAME_TYPE_AVI)
767+
switch (type) {
768+
case HDMI_INFOFRAME_TYPE_AVI:
759769
regmap_write(it->hdmi_regmap, HDMI_REG_AVI_INFOFRM_CTRL, 0);
760-
else
770+
break;
771+
case HDMI_INFOFRAME_TYPE_VENDOR:
772+
regmap_write(it->hdmi_regmap, HDMI_REG_PKT_NULL_CTRL, 0);
773+
break;
774+
default:
761775
dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type);
776+
}
762777

763778
return 0;
764779
}
@@ -770,27 +785,36 @@ static int it6263_hdmi_write_infoframe(struct drm_bridge *bridge,
770785
struct it6263 *it = bridge_to_it6263(bridge);
771786
struct regmap *regmap = it->hdmi_regmap;
772787

773-
if (type != HDMI_INFOFRAME_TYPE_AVI) {
788+
switch (type) {
789+
case HDMI_INFOFRAME_TYPE_AVI:
790+
/* write the first AVI infoframe data byte chunk(DB1-DB5) */
791+
regmap_bulk_write(regmap, HDMI_REG_AVI_DB1,
792+
&buffer[HDMI_INFOFRAME_HEADER_SIZE],
793+
HDMI_AVI_DB_CHUNK1_SIZE);
794+
795+
/* write the second AVI infoframe data byte chunk(DB6-DB13) */
796+
regmap_bulk_write(regmap, HDMI_REG_AVI_DB6,
797+
&buffer[HDMI_INFOFRAME_HEADER_SIZE +
798+
HDMI_AVI_DB_CHUNK1_SIZE],
799+
HDMI_AVI_DB_CHUNK2_SIZE);
800+
801+
/* write checksum */
802+
regmap_write(regmap, HDMI_REG_AVI_CSUM, buffer[3]);
803+
804+
regmap_write(regmap, HDMI_REG_AVI_INFOFRM_CTRL,
805+
ENABLE_PKT | REPEAT_PKT);
806+
break;
807+
case HDMI_INFOFRAME_TYPE_VENDOR:
808+
/* write header and payload */
809+
regmap_bulk_write(regmap, HDMI_REG_PKT_HB(0), buffer, len);
810+
811+
regmap_write(regmap, HDMI_REG_PKT_NULL_CTRL,
812+
ENABLE_PKT | REPEAT_PKT);
813+
break;
814+
default:
774815
dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type);
775-
return 0;
776816
}
777817

778-
/* write the first AVI infoframe data byte chunk(DB1-DB5) */
779-
regmap_bulk_write(regmap, HDMI_REG_AVI_DB1,
780-
&buffer[HDMI_INFOFRAME_HEADER_SIZE],
781-
HDMI_AVI_DB_CHUNK1_SIZE);
782-
783-
/* write the second AVI infoframe data byte chunk(DB6-DB13) */
784-
regmap_bulk_write(regmap, HDMI_REG_AVI_DB6,
785-
&buffer[HDMI_INFOFRAME_HEADER_SIZE +
786-
HDMI_AVI_DB_CHUNK1_SIZE],
787-
HDMI_AVI_DB_CHUNK2_SIZE);
788-
789-
/* write checksum */
790-
regmap_write(regmap, HDMI_REG_AVI_CSUM, buffer[3]);
791-
792-
regmap_write(regmap, HDMI_REG_AVI_INFOFRM_CTRL, ENABLE_PKT | REPEAT_PKT);
793-
794818
return 0;
795819
}
796820

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