diff --git a/.github/actionlint.yaml b/.github/actionlint.yaml new file mode 100644 index 000000000000..95b45952b6bf --- /dev/null +++ b/.github/actionlint.yaml @@ -0,0 +1,3 @@ +# GitHub-hosted labels documented in runner-images; actionlint 1.7.12 predates them. +self-hosted-runner: + labels: [ubuntu-26.04, ubuntu-26.04-arm] diff --git a/.github/copilot-instructions.md b/.github/copilot-instructions.md deleted file mode 100644 index 0e9e70b89392..000000000000 --- a/.github/copilot-instructions.md +++ /dev/null @@ -1,19 +0,0 @@ -# Aurora Silicon assistant policy - -This is Aurora Silicon's own policy for AI coding assistants working in -this repository. It is the only assistant instruction file this tree -carries. Upstream projects' instruction files are never carried here. - -AGENTS.md, CLAUDE.md, GEMINI.md and .github/copilot-instructions.md are -copies of .github/aurora/AGENTS.md. The aurora-agent-policy workflow -puts them back if anything else replaces them, including an upstream -merge. To change the policy, edit .github/aurora/AGENTS.md. - -## Rules - -- Only public code goes in. Never copy code from proprietary sources. -- Changes are tested on the hardware they affect before they are merged. - -## To be expanded - -Build, test and review conventions for this repository will go here. diff --git a/.github/copilot-instructions.md b/.github/copilot-instructions.md new file mode 120000 index 000000000000..47dc3e3d863c --- /dev/null +++ b/.github/copilot-instructions.md @@ -0,0 +1 @@ +AGENTS.md \ No newline at end of file diff --git a/.github/mesa-ci/README.md b/.github/mesa-ci/README.md new file mode 100644 index 000000000000..0148992ce7c6 --- /dev/null +++ b/.github/mesa-ci/README.md @@ -0,0 +1,72 @@ +# Omacom Mesa CI + +Proposed integration CI, vetted first in `chriskearney/omacom-mesa`. +No CODEOWNERS, Omacom repository settings, package source pins, or driver code are changed. + +## PR checks + +`ci / result` is the single required check. It always runs and fails on failures, +cancellations, absent planner output or unexpected skips. The workflow has no +path/branch filters on PRs, supports `merge_group`, and tests GitHub's checked-out +merge commit rather than replacing it with the PR head. New PR commits cancel +older PR runs. New events do not cancel running merge-group or post-merge builds; GitHub keeps only the newest pending run in each concurrency group. + +Every PR runs production CPU fixtures, pinned kernel UAPI-layout checks, workflow lint and negative CI-control tests. The linter is a SHA-256-verified official release binary, avoiding a cold Go build on every PR. Planner and result jobs check out only their small controller scripts. +Only a small documentation allowlist can skip native builds on PRs. Unknown paths, +CI files, dependency metadata and every source change build both architectures. +Merge-queue, manual and integration-branch push runs always build both. + +The parallel x86_64 and native aarch64 jobs use hosted Ubuntu 26.04, a matching +LLVM/Clang/translator 22 toolchain and hash-pinned Meson 1.10.2. Four build workers +match the hosted CPUs while bounding peak memory. Compiler tools come from the same source; the final +Asahi/Zink/Honeykrisp driver build disables LLVM and SPIRV-Tools linkage. It runs +all configured Meson tests (including explicitly built dependencies of Python-wrapped executables that Meson omits from its default build), then the existing no-submit drm-shim admission, +pipeline and memory-map probes with Vulkan validation. Complete shader-compilation probes also cover float-to-int64 and perspective interpolateAtOffset on G13G, G15S, G15C, G17P and G15G. Installed ELF dependencies +are checked before a manifest is created. CPU/shim success is not GPU or CTS proof. + +Ccache speeds up subsequent PR revisions; successfully compiled objects are retained even when a later test fails. Keys include architecture and build +configuration, and GitHub isolates PR cache writes to each PR ref. Merge-queue, manual and post-merge +builds disable ccache and do not restore PR caches. No build directory, prebuilt +shader tool or driver binary is shared between runs. Timeouts, bounded cache size +and artifact retention limit cost. Exact cold/warm timings are measured in the +personal-fork trial, not promised in advance. + +## Delivery and release + +A successful push to `integration/aurora` retains a staged ARM driver candidate +and manifest after both architecture jobs and the required gate pass, not an Arch package or automatic release. A separate trusted job verifies the archive digest and issues a GitHub provenance attestation. The tar archive preserves file modes and symlinks. The manifest identifies +the exact commit, runner architecture, run/attempt, per-file SHA-256, tested suites +and installed toolchain packages. Failure artifacts retain Meson configure logs, +test logs and JUnit evidence. Artifacts have 14-day retention. + +These are integration/debug builds with assertions. Shipping remains in +`omarchy-pkgs`: pin an exact Omacom source commit, build the actual split packages +with its production flags, obtain relevant hardware/CTS qualification and the +normal maintainer release approval. Do not publish a PR artifact or assume a +hosted ARM CPU is an Apple GPU. A new compiler/kernel contract needs new hardware +results. Existing M3 Air and full CTS limitations remain. + +PR code runs only on disposable GitHub-hosted runners with a read-only token, +no secrets, no retained checkout credentials and full-SHA action/tool pins. There is no +`pull_request_target`, privileged `workflow_run`, automatic lab access or package-write permission. Only the post-merge attestation job receives OIDC/attestations permission; it does not check out or execute repository code. Action pin updates should be reviewed like source. + +## Maintainer rollout after the trial + +1. Establish Omacom's intended `integration/aurora` base and land this workflow there. +2. Require the exact `ci / result` check from the GitHub Actions app (ID 15368). + Do not require optional matrix job names or the old lightweight check. +3. Require PR review and approval of the latest push; disallow branch deletion and + force-pushes. Merge queues can use this workflow's `merge_group` coverage. +4. Confirm a failing PR is blocked, a docs-only PR succeeds without build-pending + checks, and a merge-group run produces the same required context before release. + +CODEOWNERS and owner-review settings are deliberately outside this change, per +Chris's hold. Workflow files and CI-control code are PR-editable, so the required +status check alone is not tamper-proof: human review of workflow/gate changes or +an organization-controlled required workflow is still necessary. Do not attach lab runners to untrusted PR workflows; any later hardware job needs a restricted runner group and an exact trusted source revision. Required status +checks cannot enforce a numeric hardware/CTS result that this workflow never ran. + +Public design references: +- https://docs.github.com/en/actions/reference/security/secure-use +- https://docs.github.com/en/pull-requests/how-tos/merge-and-close-pull-requests/troubleshooting-required-status-checks +- https://github.com/actions/runner-images diff --git a/.github/mesa-ci/build-tests.py b/.github/mesa-ci/build-tests.py new file mode 100644 index 000000000000..b60222b9a5eb --- /dev/null +++ b/.github/mesa-ci/build-tests.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Build every registered test dependency, including build_by_default:false wrappers.""" +import json +import os +from pathlib import Path +import subprocess +import sys + + +def outputs(build, tests, targets): + needed = {dep for test in tests for dep in test.get('depends', [])} + selected = {target['id']: target for target in targets if target['id'] in needed} + if missing := needed - selected.keys(): + raise ValueError('Missing introspection targets: ' + str(missing)) + return sorted({str(Path(filename).relative_to(build)) + for target in selected.values() for filename in target['filename']}) + + +if __name__ == '__main__': + build = Path(sys.argv[1]).resolve() + info = build / 'meson-info' + tests = json.loads((info / 'intro-tests.json').read_text()) + targets = json.loads((info / 'intro-targets.json').read_text()) + files = outputs(build, tests, targets) + if not tests or not files: + raise SystemExit('No configured tests or test executables') + print(f'Building {len(files)} outputs for {len(tests)} configured tests', flush=True) + if '--dry-run' in sys.argv[2:]: + print('\n'.join(files)) + else: + subprocess.run(['ninja', '-C', str(build), '-j', os.environ.get('CI_JOBS', '4'), *files], check=True) diff --git a/.github/mesa-ci/build.sh b/.github/mesa-ci/build.sh new file mode 100644 index 000000000000..6a4e7d6550bc --- /dev/null +++ b/.github/mesa-ci/build.sh @@ -0,0 +1,40 @@ +#!/usr/bin/env bash +# SPDX-License-Identifier: MIT +set -euo pipefail +export PATH="$PWD/.ci-venv/bin:/usr/lib/llvm-22/bin:$PATH" +export CC='ccache gcc' CXX='ccache g++' +export CCACHE_BASEDIR="$PWD" CCACHE_COMPILERCHECK=content +export CCACHE_MAXSIZE=400M +if [[ ${GITHUB_EVENT_NAME:-local} != pull_request ]]; then + export CCACHE_DISABLE=true +else + unset CCACHE_DISABLE +fi +# Keep hosted 16 GiB runners below OOM even on large compiler translation units. +ci_jobs=${CI_JOBS:-4} +ci_meson=(--buildtype=debugoptimized -Db_ndebug=false --wrap-mode=nodownload + --prefix=/usr --libdir=lib -Dplatforms=x11,wayland + -Dgallium-drivers=asahi,zink,softpipe -Dvulkan-drivers=asahi + -Degl=enabled -Dgbm=enabled -Dglx=dri -Dgles1=enabled -Dgles2=enabled + -Dglvnd=enabled -Dvideo-codecs= -Dgallium-va=disabled -Dvulkan-layers= + -Dvalgrind=disabled -Dlibunwind=disabled -Dtools=asahi,drm-shim) +meson setup .ci-tools "${ci_meson[@]}" -Dllvm=enabled -Dbuild-tests=false +ninja -C .ci-tools -j "$ci_jobs" \ + src/compiler/clc/mesa_clc src/compiler/spirv/vtn_bindgen2 src/asahi/clc/asahi_clc +printf '%s\n' '[binaries]' \ + "mesa_clc = '$PWD/.ci-tools/src/compiler/clc/mesa_clc'" \ + "vtn_bindgen2 = '$PWD/.ci-tools/src/compiler/spirv/vtn_bindgen2'" \ + "asahi_clc = '$PWD/.ci-tools/src/asahi/clc/asahi_clc'" > .ci-tools.ini +meson setup .ci-build "${ci_meson[@]}" --native-file .ci-tools.ini \ + -Dllvm=disabled -Dspirv-tools=disabled -Dmesa-clc=system \ + -Dprecomp-compiler=system -Dbuild-tests=true +meson compile -C .ci-build -j "$ci_jobs" +python3 .github/mesa-ci/build-tests.py .ci-build +# Run ALL configured suites: NIR, SPIR-V and Vulkan support tests as well as Asahi. +meson test -C .ci-build --no-rebuild --print-errorlogs --num-processes "$ci_jobs" +VK_INSTANCE_LAYERS=VK_LAYER_KHRONOS_validation \ + python3 tools/siliconforest/drm-smoke.py .ci-build +python3 .github/mesa-ci/pipelines.py +DESTDIR="$PWD/.ci-stage" meson install -C .ci-build --no-rebuild +python3 .github/mesa-ci/manifest.py +ccache --show-stats diff --git a/.github/mesa-ci/conversion.comp b/.github/mesa-ci/conversion.comp new file mode 100644 index 000000000000..916a181bdc00 --- /dev/null +++ b/.github/mesa-ci/conversion.comp @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: MIT +#version 450 +#extension GL_EXT_shader_explicit_arithmetic_types_int64 : require +layout(local_size_x = 1) in; +layout(set = 0, binding = 0, std430) buffer Data { + float input_value; + uint64_t output_value; + int64_t signed_output_value; +} data; +void main() { + data.output_value = uint64_t(data.input_value); + data.signed_output_value = int64_t(data.input_value); +} diff --git a/.github/mesa-ci/deps.sh b/.github/mesa-ci/deps.sh new file mode 100644 index 000000000000..44d016ded5d1 --- /dev/null +++ b/.github/mesa-ci/deps.sh @@ -0,0 +1,19 @@ +#!/usr/bin/env bash +# SPDX-License-Identifier: MIT +set -euo pipefail +# Ubuntu 26.04 supplies a matching LLVM/Clang/translator 22 toolchain on both CPUs. +sudo apt-get update +sudo apt-get install --no-install-recommends -y \ + build-essential bison flex ccache cmake ninja-build pkg-config python3-venv \ + python3-mako python3-yaml python3-ply python3-packaging \ + clang-22 llvm-22-dev libclang-22-dev libclang-cpp22-dev \ + libllvmspirvlib-22-dev libclc-22 libclc-22-dev spirv-tools spirv-tools-dev glslang-tools \ + libdrm-dev libexpat1-dev libglvnd-dev libvulkan-dev \ + libx11-dev libx11-xcb-dev libxcb-dri2-0-dev libxcb-dri3-dev \ + libxcb-keysyms1-dev libxcb-present-dev libxcb-randr0-dev libxcb-shm0-dev libxcb-sync-dev \ + libxcb-xfixes0-dev libxcb-glx0-dev libxdamage-dev libxext-dev \ + libxfixes-dev libxrandr-dev libxshmfence-dev libxxf86vm-dev \ + libwayland-dev libwayland-egl-backend-dev libwayland-bin wayland-protocols libzstd-dev zlib1g-dev \ + libdisplay-info-dev libelf-dev libpng-dev libunwind-dev libudev-dev libsensors-dev vulkan-validationlayers +python3 -m venv --system-site-packages .ci-venv +.ci-venv/bin/pip install --require-hashes -r .github/mesa-ci/requirements.txt diff --git a/.github/mesa-ci/gate.py b/.github/mesa-ci/gate.py new file mode 100644 index 000000000000..e39f3eec85ae --- /dev/null +++ b/.github/mesa-ci/gate.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Fail closed on failed, cancelled, missing or unexpectedly skipped work.""" +import json +import os +import sys + + +def passes(needs): + if set(needs) != {'plan', 'source', 'build'}: + return False + if any(needs[j].get('result') != 'success' for j in ('plan', 'source')): + return False + required = needs['plan'].get('outputs', {}).get('build') + return (required == 'true' and needs['build'].get('result') == 'success') or ( + required == 'false' and needs['build'].get('result') == 'skipped') + + +if __name__ == '__main__': + needs = json.loads(os.environ['NEEDS_JSON']) + print(json.dumps(needs, indent=2)) + sys.exit(0 if passes(needs) else 1) diff --git a/.github/mesa-ci/interpolation.frag b/.github/mesa-ci/interpolation.frag new file mode 100644 index 000000000000..b439d0138e60 --- /dev/null +++ b/.github/mesa-ci/interpolation.frag @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: MIT +#version 450 +layout(location = 0) in vec4 value; +layout(location = 0) out vec4 color; +void main() { + color = interpolateAtOffset(value, vec2(0.125, -0.25)); +} diff --git a/.github/mesa-ci/interpolation.vert b/.github/mesa-ci/interpolation.vert new file mode 100644 index 000000000000..b6c073f675f7 --- /dev/null +++ b/.github/mesa-ci/interpolation.vert @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: MIT +#version 450 +layout(location = 0) out vec4 value; +void main() { + gl_Position = vec4(float(gl_VertexIndex), 0.0, 0.0, 1.0); + value = vec4(float(gl_VertexIndex)); +} diff --git a/.github/mesa-ci/kernel-contract.py b/.github/mesa-ci/kernel-contract.py new file mode 100644 index 000000000000..690aefb49fe3 --- /dev/null +++ b/.github/mesa-ci/kernel-contract.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Fetch only the public, exact kernel contract declared by this source tree.""" +import json +from pathlib import Path +import re + +contract = json.loads(Path('SILICONFOREST-SOURCES.json').read_text())['integration_followups_20261024'] +assert contract['kernel_repository'] == 'https://github.com/omacom/linux-aurora' +assert contract['kernel_header'] == 'include/uapi/drm/asahi_drm.h' +assert re.fullmatch(r'[0-9a-f]{40}', contract['kernel_commit']) +print('sha=' + contract['kernel_commit']) diff --git a/.github/mesa-ci/lint.sh b/.github/mesa-ci/lint.sh new file mode 100644 index 000000000000..b7bf2535f807 --- /dev/null +++ b/.github/mesa-ci/lint.sh @@ -0,0 +1,15 @@ +#!/usr/bin/env bash +# SPDX-License-Identifier: MIT +set -euo pipefail +# Official v1.7.12 release; source commit 914e7df21a07ef503a81201c76d2b11c789d3fca. +# Verify immutable bytes instead of recompiling Go dependencies on every PR. +ci_lint_directory=$(mktemp -d "${RUNNER_TEMP:-/tmp}/mesa-actionlint.XXXXXX") +trap 'rm -rf -- "$ci_lint_directory"' EXIT +curl --fail --silent --show-error --location --retry 3 --proto '=https' --proto-redir '=https' \ + https://github.com/rhysd/actionlint/releases/download/v1.7.12/actionlint_1.7.12_linux_amd64.tar.gz \ + -o "$ci_lint_directory/actionlint.tar.gz" +printf '%s %s\n' \ + 8aca8db96f1b94770f1b0d72b6dddcb1ebb8123cb3712530b08cc387b349a3d8 \ + "$ci_lint_directory/actionlint.tar.gz" | sha256sum --check +tar -xzf "$ci_lint_directory/actionlint.tar.gz" -C "$ci_lint_directory" actionlint +"$ci_lint_directory/actionlint" -shellcheck="${ACTIONLINT_SHELLCHECK-shellcheck}" .github/workflows/mesa.yml diff --git a/.github/mesa-ci/manifest.py b/.github/mesa-ci/manifest.py new file mode 100644 index 000000000000..f6660984c8b5 --- /dev/null +++ b/.github/mesa-ci/manifest.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Bind staged driver bytes, test results and dependency inventory to an exact commit.""" +import hashlib +import json +import os +from pathlib import Path +import platform +import subprocess + +from policy import test_summary + +root = Path('.ci-stage') +elfs = [] +files = [] +for path in sorted(root.rglob('*')): + if path.is_symlink(): + if not path.resolve().is_relative_to(root.resolve()): + raise SystemExit(f'Staged symlink escapes install root: {path}') + files.append({'path': str(path.relative_to(root)), 'symlink': os.readlink(path)}) + continue + if not path.is_file(): + continue + data = path.read_bytes() + files.append({'path': str(path.relative_to(root)), 'sha256': hashlib.sha256(data).hexdigest()}) + if data[:4] == b'\x7fELF': + dynamic = subprocess.check_output(['readelf', '-d', str(path)], text=True) + if any('NEEDED' in line and ('libLLVM' in line or 'libSPIRV-Tools' in line) + for line in dynamic.splitlines()): + raise SystemExit(f'Unexpected compiler runtime dependency in {path}') + elfs.append(str(path.relative_to(root))) +if not elfs or not any(Path(p).name == 'libvulkan_asahi.so' for p in elfs): + raise SystemExit('Missing staged driver ELF payload') +logs = Path('.ci-build/meson-logs/testlog.json') +results = [json.loads(line) for line in logs.read_text().splitlines()] +summary = test_summary(results) +provenance = { + 'source_commit': subprocess.check_output(['git', 'rev-parse', 'HEAD'], text=True).strip(), + 'architecture': platform.machine(), + 'kernel_contract': {k: v for k, v in json.loads(Path('SILICONFOREST-SOURCES.json').read_text())['integration_followups_20261024'].items() if k.startswith('kernel_')}, + 'event': os.environ.get('GITHUB_EVENT_NAME', 'local'), + 'run_id': os.environ.get('GITHUB_RUN_ID'), + 'run_attempt': os.environ.get('GITHUB_RUN_ATTEMPT'), + 'hardware_qualified': False, + 'claim': 'CPU build/tests and no-submit drm-shim only; not a release approval or Arch package', + 'test_results': summary, + 'elfs': elfs, 'files': files, + 'packages': subprocess.check_output(['dpkg-query', '-W', '-f=${Package}=${Version}\n'], text=True).splitlines(), +} +Path('.ci-manifest.json').write_text(json.dumps(provenance, indent=2) + '\n') diff --git a/.github/mesa-ci/pipeline.c b/.github/mesa-ci/pipeline.c new file mode 100644 index 000000000000..5d02f57b4e16 --- /dev/null +++ b/.github/mesa-ci/pipeline.c @@ -0,0 +1,135 @@ +/* SPDX-License-Identifier: MIT + * Compile real SPIR-V through the complete driver pipeline without submitting work. + * Cover float->int64 and perspective offset interpolation introduced after NIR prep. + */ +#include +#include +#include +#include +#include + +#define REQUIRE(x) do { if (!(x)) { fprintf(stderr, "line %u: %s\n", __LINE__, #x); exit(1); } } while (0) +#define OK(x) REQUIRE((x) == VK_SUCCESS) + +static VkShaderModule module(VkDevice dev, const char *path) +{ + FILE *f = fopen(path, "rb"); + REQUIRE(f); + REQUIRE(fseek(f, 0, SEEK_END) == 0); + long size = ftell(f); + REQUIRE(size > 0 && size % 4 == 0); + rewind(f); + uint32_t *code = malloc(size); + REQUIRE(code && fread(code, size, 1, f) == 1); + REQUIRE(fclose(f) == 0); + VkShaderModuleCreateInfo ci = { + .sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO, + .codeSize = size, .pCode = code, + }; + VkShaderModule result; + OK(vkCreateShaderModule(dev, &ci, NULL, &result)); + free(code); + return result; +} + +int main(int argc, char **argv) +{ + REQUIRE(argc == 4); + REQUIRE(dlsym(RTLD_DEFAULT, "asahi_noop_is_registered_fd") != NULL); + VkInstance instance; + VkApplicationInfo app = {.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO, + .pApplicationName = "mesa-ci-compiler-regression", + .apiVersion = VK_API_VERSION_1_3}; + VkInstanceCreateInfo ici = {.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO, + .pApplicationInfo = &app}; + OK(vkCreateInstance(&ici, NULL, &instance)); + uint32_t count = 1; + VkPhysicalDevice physical; + OK(vkEnumeratePhysicalDevices(instance, &count, &physical)); + REQUIRE(count == 1); + VkPhysicalDeviceFeatures features; + vkGetPhysicalDeviceFeatures(physical, &features); + REQUIRE(features.shaderInt64 && features.sampleRateShading); + count = 0; + vkGetPhysicalDeviceQueueFamilyProperties(physical, &count, NULL); + VkQueueFamilyProperties *queues = calloc(count, sizeof(*queues)); + REQUIRE(queues); + vkGetPhysicalDeviceQueueFamilyProperties(physical, &count, queues); + uint32_t family; + for (family = 0; family < count; family++) + if ((queues[family].queueFlags & (VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT)) == + (VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT)) break; + REQUIRE(family < count); + free(queues); + float priority = 1.0f; + VkDeviceQueueCreateInfo q = {.sType = VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO, + .queueFamilyIndex = family, .queueCount = 1, .pQueuePriorities = &priority}; + VkPhysicalDeviceVulkan13Features f13 = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_FEATURES, + .dynamicRendering = VK_TRUE}; + features = (VkPhysicalDeviceFeatures){.shaderInt64 = VK_TRUE, .sampleRateShading = VK_TRUE}; + VkDeviceCreateInfo dci = {.sType = VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO, + .pNext = &f13, .queueCreateInfoCount = 1, .pQueueCreateInfos = &q, + .pEnabledFeatures = &features}; + VkDevice dev; + OK(vkCreateDevice(physical, &dci, NULL, &dev)); + VkDescriptorSetLayoutBinding binding = {.binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT}; + VkDescriptorSetLayoutCreateInfo sci = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, .pBindings = &binding}; + VkDescriptorSetLayout set; + OK(vkCreateDescriptorSetLayout(dev, &sci, NULL, &set)); + VkPipelineLayoutCreateInfo lci = {.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, .pSetLayouts = &set}; + VkPipelineLayout layout; + OK(vkCreatePipelineLayout(dev, &lci, NULL, &layout)); + VkShaderModule comp = module(dev, argv[1]); + VkPipelineShaderStageCreateInfo cs = {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, .module = comp, .pName = "main"}; + VkComputePipelineCreateInfo cci = {.sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = cs, .layout = layout}; + VkPipeline compute; + OK(vkCreateComputePipelines(dev, VK_NULL_HANDLE, 1, &cci, NULL, &compute)); + VkShaderModule vert = module(dev, argv[2]), frag = module(dev, argv[3]); + VkPipelineShaderStageCreateInfo stages[] = { + {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, .module = vert, .pName = "main"}, + {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, .module = frag, .pName = "main"}}; + VkPipelineVertexInputStateCreateInfo vi = {.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO}; + VkPipelineInputAssemblyStateCreateInfo ia = {.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST}; + VkViewport viewport = {.width = 1, .height = 1, .maxDepth = 1}; + VkRect2D scissor = {.extent = {1, 1}}; + VkPipelineViewportStateCreateInfo vp = {.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 1, .pViewports = &viewport, .scissorCount = 1, .pScissors = &scissor}; + VkPipelineRasterizationStateCreateInfo rs = {.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .polygonMode = VK_POLYGON_MODE_FILL, .cullMode = VK_CULL_MODE_NONE, .lineWidth = 1}; + VkPipelineMultisampleStateCreateInfo ms = {.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = VK_SAMPLE_COUNT_1_BIT}; + VkPipelineColorBlendAttachmentState ba = {.colorWriteMask = 0xf}; + VkPipelineColorBlendStateCreateInfo bs = {.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 1, .pAttachments = &ba}; + VkFormat format = VK_FORMAT_R8G8B8A8_UNORM; + VkPipelineRenderingCreateInfo render = {.sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO, + .colorAttachmentCount = 1, .pColorAttachmentFormats = &format}; + VkGraphicsPipelineCreateInfo gci = {.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .pNext = &render, .stageCount = 2, .pStages = stages, .pVertexInputState = &vi, + .pInputAssemblyState = &ia, .pViewportState = &vp, .pRasterizationState = &rs, + .pMultisampleState = &ms, .pColorBlendState = &bs, .layout = layout}; + VkPipeline graphics; + OK(vkCreateGraphicsPipelines(dev, VK_NULL_HANDLE, 1, &gci, NULL, &graphics)); + vkDestroyPipeline(dev, graphics, NULL); + vkDestroyPipeline(dev, compute, NULL); + vkDestroyShaderModule(dev, frag, NULL); + vkDestroyShaderModule(dev, vert, NULL); + vkDestroyShaderModule(dev, comp, NULL); + vkDestroyPipelineLayout(dev, layout, NULL); + vkDestroyDescriptorSetLayout(dev, set, NULL); + vkDestroyDevice(dev, NULL); + vkDestroyInstance(instance, NULL); + puts("PASS: float-to-int64 and perspective-offset pipelines compiled; zero submissions"); + return 0; +} diff --git a/.github/mesa-ci/pipelines.py b/.github/mesa-ci/pipelines.py new file mode 100644 index 000000000000..17970f747866 --- /dev/null +++ b/.github/mesa-ci/pipelines.py @@ -0,0 +1,39 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Exercise complete shader compilation on emulated device profiles; no queue submits.""" +import os +from pathlib import Path +import subprocess +import tempfile + +root = Path(__file__).resolve().parent +build = Path('.ci-build').resolve() +icds = list((build / 'src/asahi/vulkan').glob('asahi_devenv_icd.*.json')) +assert len(icds) == 1 +with tempfile.TemporaryDirectory(prefix='mesa-ci-pipelines-') as directory: + work = Path(directory) + shaders = ['conversion.comp', 'interpolation.vert', 'interpolation.frag'] + binaries = [work / (s + '.spv') for s in shaders] + for shader, binary in zip(shaders, binaries): + subprocess.run(['glslangValidator', '-V', '--target-env', 'vulkan1.3', + str(root / shader), '-o', str(binary)], check=True) + executable = work / 'pipeline' + subprocess.run(['cc', '-std=c11', '-O2', '-Wall', '-Wextra', '-Werror', + '-Iinclude', str(root / 'pipeline.c'), '-lvulkan', '-ldl', + '-o', str(executable)], check=True) + for chip in ['g13g', 'g15s', 'g15c', 'g17p', 'g15g']: + env = os.environ.copy() + for key in ['VK_ICD_FILENAMES', 'VK_LOADER_DRIVERS_SELECT', + 'VK_LOADER_DRIVERS_DISABLE', 'ASAHI_M3_EXPERIMENTAL']: + env.pop(key, None) + env.update(LD_PRELOAD=str(build / 'src/asahi/drm-shim/libasahi_noop_drm_shim.so'), + VK_DRIVER_FILES=str(icds[0]), ASAHI_SHIM_CHIP=chip, + ASAHI_SHIM_G15S_EXPECT_VALID='1', MESA_SHADER_CACHE_DISABLE='true', + VK_INSTANCE_LAYERS='VK_LAYER_KHRONOS_validation') + result = subprocess.run([str(executable), *map(str, binaries)], env=env, + text=True, stdout=subprocess.PIPE, + stderr=subprocess.STDOUT, timeout=90) + print(chip, result.stdout, flush=True) + result.check_returncode() + if 'Validation Error:' in result.stdout: + raise RuntimeError('Invalid compiler regression probe') diff --git a/.github/mesa-ci/plan.py b/.github/mesa-ci/plan.py new file mode 100644 index 000000000000..a01127e07bfd --- /dev/null +++ b/.github/mesa-ci/plan.py @@ -0,0 +1,33 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Only a narrow allowlist of documentation changes can skip driver compilation.""" +import os +from pathlib import PurePosixPath +import re +import subprocess + + +def docs_only(paths): + return bool(paths) and all( + (p.startswith('docs/') and PurePosixPath(p).suffix in {'.md', '.rst', '.txt', '.svg', '.png'}) + or p in {'README.md', 'README.rst', 'CONTRIBUTING.md', 'CODE_OF_CONDUCT.md', 'SECURITY.md', 'COPYING'} + or ('/' not in p and p.startswith('SILICONFOREST-') and p.endswith('.md')) + for p in paths + ) + + +def plan(base): + if not re.fullmatch(r'[0-9a-f]{40}', base or '') or base == '0' * 40: + return True + subprocess.run(['git', 'fetch', '--no-tags', '--depth=1', 'origin', base], check=True) + names = subprocess.check_output( + ['git', 'diff', '--name-only', '--no-renames', '-z', base, 'HEAD']) + paths = names.decode('utf-8', errors='strict').rstrip('\0').split('\0') if names else [] + return not docs_only(paths) + + +if __name__ == '__main__': + build = True if os.environ.get('GITHUB_EVENT_NAME') in {'push', 'merge_group', 'workflow_dispatch'} else plan(os.environ.get('BASE_SHA', '')) + with open(os.environ['GITHUB_OUTPUT'], 'a') as out: + print(f'build={str(build).lower()}', file=out) + print('Full driver builds required:', build) diff --git a/.github/mesa-ci/policy.py b/.github/mesa-ci/policy.py new file mode 100644 index 000000000000..9d79e6562bb4 --- /dev/null +++ b/.github/mesa-ci/policy.py @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: MIT +"""Evidence required before a staged build can become a delivery candidate.""" +REQUIRED_SUITES = {'agx_tests', 'nir_tests', 'spirv_tests', 'asahi-g15-wire'} + + +def test_summary(results): + if not results or any(r.get('result') not in {'OK', 'SKIP', 'EXPECTEDFAIL'} for r in results): + raise ValueError('Missing or failed Meson tests') + passed = {r['name'].rsplit(':', 1)[-1] for r in results if r['result'] == 'OK'} + if not REQUIRED_SUITES <= passed: + raise ValueError('Required compiler/wire suites did not pass: ' + str(REQUIRED_SUITES - passed)) + return {key: sum(r['result'] == key for r in results) for key in sorted({r['result'] for r in results})} diff --git a/.github/mesa-ci/requirements.txt b/.github/mesa-ci/requirements.txt new file mode 100644 index 000000000000..076a1eb0dedc --- /dev/null +++ b/.github/mesa-ci/requirements.txt @@ -0,0 +1 @@ +meson==1.10.2 --hash=sha256:5f84ef186e6e788d9154db63620fc61b3ece69f643b94b43c8b9203c43d89b36 diff --git a/.github/mesa-ci/tests/test_control.py b/.github/mesa-ci/tests/test_control.py new file mode 100644 index 000000000000..28614274bf1f --- /dev/null +++ b/.github/mesa-ci/tests/test_control.py @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: MIT +import importlib.util +from pathlib import Path +import unittest + +root = Path(__file__).resolve().parents[1] + +def load(name): + spec = importlib.util.spec_from_file_location(name, root / (name + '.py')) + module = importlib.util.module_from_spec(spec) + spec.loader.exec_module(module) + return module + +plan, gate, policy, dependencies = load('plan'), load('gate'), load('policy'), load('build-tests') + +class ControlTests(unittest.TestCase): + def needs(self, build='true', result='success'): + return {'plan': {'result': 'success', 'outputs': {'build': build}}, + 'source': {'result': 'success'}, 'build': {'result': result}} + + def test_doc_only(self): + self.assertTrue(plan.docs_only(['README.md', 'docs/asahi.rst'])) + for paths in [[], ['docs/build.py'], ['.github/workflows/mesa.yml'], + ['src/asahi/compiler/agx_compile.c'], ['meson.build'], ['requirements.txt'], + ['docs/guide.rst', 'include/vulkan/vulkan.h'], ['unknown']]: + self.assertFalse(plan.docs_only(paths)) + + def test_python_wrapped_executable_is_built(self): + build = Path('/tmp/build') + tests = [{'cmd': ['python3', 'wrapper.py', 'hidden-test'], 'depends': ['hidden@exe']}] + targets = [{'id': 'hidden@exe', 'build_by_default': False, + 'filename': ['/tmp/build/path/hidden-test']}] + self.assertEqual(dependencies.outputs(build, tests, targets), ['path/hidden-test']) + with self.assertRaises(ValueError): + dependencies.outputs(build, tests, []) + + def test_required_test_evidence_cannot_disappear(self): + good = [{'name': 'suite - mesa:' + n, 'result': 'OK'} for n in policy.REQUIRED_SUITES] + self.assertEqual(policy.test_summary(good), {'OK': 4}) + for bad in [[], good[:-1], [dict(r, result='SKIP') for r in good], + good + [{'name': 'another-test', 'result': 'FAIL'}]]: + with self.assertRaises(ValueError): + policy.test_summary(bad) + + def test_required_work_fails_closed(self): + self.assertTrue(gate.passes(self.needs())) + self.assertTrue(gate.passes(self.needs('false', 'skipped'))) + for result in ['failure', 'cancelled', 'skipped', '', 'neutral']: + self.assertFalse(gate.passes(self.needs(result=result))) + for flag in ['', 'True', 'false ', 'unknown']: + self.assertFalse(gate.passes(self.needs(flag))) + for job in ['plan', 'source']: + for result in ['failure', 'cancelled', 'skipped']: + needs = self.needs('false', 'skipped') + needs[job]['result'] = result + self.assertFalse(gate.passes(needs)) + self.assertFalse(gate.passes({})) + self.assertFalse(gate.passes(self.needs('false', 'failure'))) + +if __name__ == '__main__': + unittest.main() diff --git a/.github/workflows/aurora-agent-policy.yml b/.github/workflows/aurora-agent-policy.yml deleted file mode 100644 index 500a00067013..000000000000 --- a/.github/workflows/aurora-agent-policy.yml +++ /dev/null @@ -1,50 +0,0 @@ -name: aurora-agent-policy - -# Keeps upstream AI-assistant instruction files out of this repository. -# The policy is .github/aurora/AGENTS.md on the default branch; see -# .github/aurora/agent-policy.sh for the rules. - -on: - push: - pull_request: - schedule: - - cron: "17 * * * *" - workflow_dispatch: - -permissions: - contents: write - -concurrency: - group: aurora-agent-policy-${{ (github.event_name == 'push' || github.event_name == 'pull_request') && github.ref || 'sweep' }} - cancel-in-progress: false - -env: - DEFAULT_BRANCH: ${{ github.event.repository.default_branch }} - POLICY_BRANCHES: ${{ github.event.repository.default_branch }} aurora-wip - -jobs: - policy: - if: github.event_name != 'push' || !github.event.deleted - runs-on: ubuntu-latest - timeout-minutes: 30 - steps: - - name: Check out the policy files only - uses: actions/checkout@v4 - with: - ref: ${{ github.event.repository.default_branch }} - fetch-depth: 1 - filter: blob:none - sparse-checkout: .github/aurora - sparse-checkout-cone-mode: false - - - name: Heal the pushed branch - if: github.event_name == 'push' - run: bash .github/aurora/agent-policy.sh push "${GITHUB_REF_NAME}" - - - name: Sweep every branch - if: github.event_name == 'schedule' || github.event_name == 'workflow_dispatch' - run: bash .github/aurora/agent-policy.sh sweep - - - name: Check the pull request head - if: github.event_name == 'pull_request' - run: bash .github/aurora/agent-policy.sh pr "refs/pull/${{ github.event.pull_request.number }}/head" diff --git a/.github/workflows/macos.yml b/.github/workflows/macos.yml deleted file mode 100644 index 7a24ce1329b0..000000000000 --- a/.github/workflows/macos.yml +++ /dev/null @@ -1,60 +0,0 @@ -name: macOS-CI -on: push - -permissions: - contents: read - -jobs: - macOS-CI: - strategy: - matrix: - glx_option: ['dri', 'xlib'] - runs-on: macos-11 - env: - GALLIUM_DUMP_CPU: true - MESON_EXEC: /Users/runner/Library/Python/3.11/bin/meson - steps: - - name: Checkout - uses: actions/checkout@v3 - - name: Install Dependencies - run: | - cat > Brewfile < native_config <> "$GITHUB_OUTPUT" + - uses: actions/checkout@fbc6f3992d24b796d5a048ff273f7fcc4a7b6c09 # v5 + with: + repository: omacom/linux-aurora + ref: ${{ steps.contract.outputs.sha }} + path: .ci-kernel + sparse-checkout: include/uapi/drm + persist-credentials: false + - name: CPU source fixtures and CI gate regression tests + run: | + bash .github/mesa-ci/lint.sh + python3 tools/siliconforest/check.py + python3 tools/siliconforest/check-kernel-abi.py .ci-kernel + python3 -m unittest discover -s .github/mesa-ci/tests -v + bash -n .github/mesa-ci/build.sh .github/mesa-ci/deps.sh .github/mesa-ci/lint.sh + build: + needs: [plan, source] + if: needs.plan.outputs.build == 'true' + strategy: + fail-fast: false + matrix: + include: + - runner: ubuntu-26.04 + architecture: x86_64 + - runner: ubuntu-26.04-arm + architecture: aarch64 + runs-on: ${{ matrix.runner }} + timeout-minutes: 35 + env: + CCACHE_DIR: ${{ github.workspace }}/.ccache + steps: + - uses: actions/checkout@fbc6f3992d24b796d5a048ff273f7fcc4a7b6c09 # v5 + with: + persist-credentials: false + - name: Install matched toolchain + run: bash .github/mesa-ci/deps.sh + - name: Restore compiler cache + id: cache + continue-on-error: true + if: github.event_name == 'pull_request' + uses: actions/cache/restore@0057852bfaa89a56745cba8c7296529d2fc39830 # v4 + with: + path: .ccache + key: mesa-ci-v1-${{ matrix.architecture }}-${{ hashFiles('.github/mesa-ci/build.sh', '.github/mesa-ci/deps.sh', '.github/mesa-ci/requirements.txt') }}-${{ github.sha }} + restore-keys: | + mesa-ci-v1-${{ matrix.architecture }}-${{ hashFiles('.github/mesa-ci/build.sh', '.github/mesa-ci/deps.sh', '.github/mesa-ci/requirements.txt') }}- + - name: Build and test the exact checked-out merge commit + run: bash .github/mesa-ci/build.sh + - name: Save compiler cache + continue-on-error: true + if: ${{ !cancelled() && github.event_name == 'pull_request' && steps.cache.outputs.cache-hit != 'true' }} + uses: actions/cache/save@0057852bfaa89a56745cba8c7296529d2fc39830 # v4 + with: + path: .ccache + key: mesa-ci-v1-${{ matrix.architecture }}-${{ hashFiles('.github/mesa-ci/build.sh', '.github/mesa-ci/deps.sh', '.github/mesa-ci/requirements.txt') }}-${{ github.sha }} + - name: Preserve test and configure evidence + if: always() + uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4 + with: + name: mesa-evidence-${{ matrix.architecture }}-${{ github.run_id }}-${{ github.run_attempt }} + include-hidden-files: true + retention-days: 14 + path: | + .ci-build/meson-logs/ + .ci-build/meson-info/ + .ci-tools/meson-logs/ + .ci-manifest.json + - name: Archive clean ARM staging tree with file modes and symlinks + if: success() && github.event_name == 'push' && github.ref == 'refs/heads/integration/aurora' && matrix.architecture == 'aarch64' + run: | + tar -czf mesa-arm-stage.tar.gz .ci-stage .ci-manifest.json + sha256sum mesa-arm-stage.tar.gz > mesa-arm-stage.tar.gz.sha256 + - name: Retain unpromoted ARM staging input + if: success() && github.event_name == 'push' && github.ref == 'refs/heads/integration/aurora' && matrix.architecture == 'aarch64' + uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4 + with: + name: mesa-arm-staging-${{ github.sha }} + include-hidden-files: true + if-no-files-found: error + retention-days: 14 + path: | + mesa-arm-stage.tar.gz + mesa-arm-stage.tar.gz.sha256 + result: + name: ci / result + if: always() + needs: [plan, source, build] + runs-on: ubuntu-26.04 + timeout-minutes: 5 + steps: + - uses: actions/checkout@fbc6f3992d24b796d5a048ff273f7fcc4a7b6c09 # v5 + with: + persist-credentials: false + sparse-checkout: .github/mesa-ci/gate.py + sparse-checkout-cone-mode: false + - name: Require all applicable checks + env: + NEEDS_JSON: ${{ toJSON(needs) }} + run: python3 .github/mesa-ci/gate.py + + candidate: + name: Attested ARM candidate + needs: [result, build] + if: github.event_name == 'push' && github.ref == 'refs/heads/integration/aurora' + runs-on: ubuntu-26.04 + timeout-minutes: 5 + permissions: + contents: read + actions: read + id-token: write + attestations: write + steps: + - uses: actions/download-artifact@d3f86a106a0bac45b974a628896c90dbdf5c8093 # v4 + with: + name: mesa-arm-staging-${{ github.sha }} + path: candidate + - name: Verify archive digest + working-directory: candidate + run: sha256sum --check mesa-arm-stage.tar.gz.sha256 + - name: Attest the clean archive after both architectures and the gate pass + uses: actions/attest-build-provenance@977bb373ede98d70efdf65b84cb5f73e068dcc2a # v3 + with: + subject-path: candidate/mesa-arm-stage.tar.gz + - uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4 + with: + name: mesa-arm-candidate-${{ github.sha }} + if-no-files-found: error + retention-days: 14 + path: candidate/ diff --git a/AGENTS.md b/AGENTS.md index 0e9e70b89392..a0fa482c449d 100644 --- a/AGENTS.md +++ b/AGENTS.md @@ -1,19 +1,13 @@ -# Aurora Silicon assistant policy - -This is Aurora Silicon's own policy for AI coding assistants working in -this repository. It is the only assistant instruction file this tree -carries. Upstream projects' instruction files are never carried here. - -AGENTS.md, CLAUDE.md, GEMINI.md and .github/copilot-instructions.md are -copies of .github/aurora/AGENTS.md. The aurora-agent-policy workflow -puts them back if anything else replaces them, including an upstream -merge. To change the policy, edit .github/aurora/AGENTS.md. - -## Rules - -- Only public code goes in. Never copy code from proprietary sources. -- Changes are tested on the hardware they affect before they are merged. - -## To be expanded - -Build, test and review conventions for this repository will go here. +# SiliconForest Mesa maintenance + +This is iconidentify's personally maintained downstream fork. The owner has +authorized AI-assisted research, review, source integration and development here. +The upstream community's contribution policy still applies to submissions there; +do not open upstream issues, comments or merge requests without explicit owner +instructions. + +Preserve contributor identities, original commits, licenses and source provenance. +Label newly generated commits with `Generated-by: LLM`. Record which exact source +was built and tested. Host or drm-shim checks do not prove hardware correctness. +Do not enable an unqualified GPU, weaken firmware/ABI admission, install into a +host system, or reboot a test machine as a side effect of a source build. diff --git a/CLAUDE.md b/CLAUDE.md deleted file mode 100644 index 0e9e70b89392..000000000000 --- a/CLAUDE.md +++ /dev/null @@ -1,19 +0,0 @@ -# Aurora Silicon assistant policy - -This is Aurora Silicon's own policy for AI coding assistants working in -this repository. It is the only assistant instruction file this tree -carries. Upstream projects' instruction files are never carried here. - -AGENTS.md, CLAUDE.md, GEMINI.md and .github/copilot-instructions.md are -copies of .github/aurora/AGENTS.md. The aurora-agent-policy workflow -puts them back if anything else replaces them, including an upstream -merge. To change the policy, edit .github/aurora/AGENTS.md. - -## Rules - -- Only public code goes in. Never copy code from proprietary sources. -- Changes are tested on the hardware they affect before they are merged. - -## To be expanded - -Build, test and review conventions for this repository will go here. diff --git a/CLAUDE.md b/CLAUDE.md new file mode 120000 index 000000000000..47dc3e3d863c --- /dev/null +++ b/CLAUDE.md @@ -0,0 +1 @@ +AGENTS.md \ No newline at end of file diff --git a/GEMINI.md b/GEMINI.md deleted file mode 100644 index 0e9e70b89392..000000000000 --- a/GEMINI.md +++ /dev/null @@ -1,19 +0,0 @@ -# Aurora Silicon assistant policy - -This is Aurora Silicon's own policy for AI coding assistants working in -this repository. It is the only assistant instruction file this tree -carries. Upstream projects' instruction files are never carried here. - -AGENTS.md, CLAUDE.md, GEMINI.md and .github/copilot-instructions.md are -copies of .github/aurora/AGENTS.md. The aurora-agent-policy workflow -puts them back if anything else replaces them, including an upstream -merge. To change the policy, edit .github/aurora/AGENTS.md. - -## Rules - -- Only public code goes in. Never copy code from proprietary sources. -- Changes are tested on the hardware they affect before they are merged. - -## To be expanded - -Build, test and review conventions for this repository will go here. diff --git a/GEMINI.md b/GEMINI.md new file mode 120000 index 000000000000..47dc3e3d863c --- /dev/null +++ b/GEMINI.md @@ -0,0 +1 @@ +AGENTS.md \ No newline at end of file diff --git a/MAINTAINING.md b/MAINTAINING.md new file mode 100644 index 000000000000..0e3223ca3912 --- /dev/null +++ b/MAINTAINING.md @@ -0,0 +1,49 @@ +# Maintaining SiliconForest Mesa + +The default integration is `siliconforest/next`. Keep original contributor +commits and licensing intact; use merges or `git cherry-pick -x` with a written +record of any conflict resolution. Label newly generated commits as described +in `AGENTS.md`. + +## Reviewing a source update + +1. Check the source repository's visibility before including its refs or code in + a publication. For GitHub, use `gh api repos/OWNER/REPO --jq .visibility`. + Private-source work stays in local research refs and notes. This public + integration contains public-source code only. +2. Pin the exact source SHA, compare divergence against the current integration, + and review dependencies and duplicate implementations. A newer topic name is + not proof that it includes another branch's fixes. +3. Keep identity, topology, USC, HAL and kernel-ABI admission checks intact. + Hardware recognition and shader encoding alone do not establish support. +4. Update `SILICONFOREST-SOURCES.json` and the review ledger. Source tags preserve + evidence; their existence does not mean every experiment is approved for the + default build. + +## Checking the integration + +Run the quick checks, build the affected drivers and all registered Asahi test +dependencies, and run the host suite. For changes around device setup, mappings +or synchronization, also run the Vulkan drm-shim regression probe with Khronos +validation enabled. Commands and the exact baseline results are in +`SILICONFOREST-VALIDATION.md`. + +`check.py --check-git` works with local maintainer branches or the corresponding +`origin/*` refs in a fresh full clone. It verifies exact source tags and the +limited changes to compatibility profiles. The quick GitHub workflow runs +without requiring all historical source tags or a complete Mesa build. + +## Publishing source + +Push explicit branch/tag refs from the reviewed source manifest. Do not use an +unrestricted `--mirror`, `--all` or `--tags` push from a research checkout that +also holds private or unreviewed refs. For a new repository, keep it private until +its remote ref set and source access checks match the intended public inventory. +Cancelling a local wrapper process is not proof that its upload children stopped. + +Keep experimental firmware/driver profiles separate. Before publishing installable +packages, qualify the exact board, firmware, m1n1 handoffs and kernel ABI on +hardware, run the relevant CTS and compositor/application checks, and record the +results against a pinned source. Host CPU tests and drm-shim checks do not replace +that hardware qualification. Source maintenance must not install Mesa or alter a +working boot stack as a side effect. diff --git a/README.md b/README.md new file mode 100644 index 000000000000..89907cba2c7a --- /dev/null +++ b/README.md @@ -0,0 +1,106 @@ +# SiliconForest Mesa + +Personally maintained Mesa integration for Apple Silicon, by +[iconidentify](https://github.com/iconidentify). Default branch: +**`siliconforest/next`**, Mesa **26.3.0-devel**. + +This combines DJ's Neo/G17P work, Eryk Wieliczko's current M3 Pro native +OpenGL/Vulkan work, Naeem's M3 Max additions, and selected correctness fixes. +Original commits, author identities, copyrights and licenses are retained. +The upstream Mesa README is [README.rst](README.rst). + +## Source profiles + +| Hardware / contract | Branch | Status in this integration | +| --- | --- | --- | +| M1/M2 and AGX2 | `siliconforest/next` | Existing Asahi/Honeykrisp paths retained; no physical-device qualification here | +| M3 Pro, T6030 / G15S, legacy firmware interface with native AGX3 shaders | `siliconforest/next` | Pinned Aurora WIP native GL/Vulkan stack; this update needs hardware requalification | +| M3 Max, T6031 / G15C, single die / four clusters | `siliconforest/next` | Naeem's identity, native admission and USC helper-table fixes merged with Eryk's follow-ups | +| Neo / A18 Pro, T8140 / G17P, USC3 / HAL200 | `siliconforest/next` | DJ's current AGX3b stack retained, including its feature restrictions | +| M3 Air, T8122 / G15G, legacy 14.x firmware | `siliconforest/next` | Scott Jones PR71 integrated; enabled without a Mesa environment opt-in for its exact supported contract; revised address layout is not hardware-qualified | +| M3 Air, T8122, HAL200 / macOS 26.6.2 boot stack | `compat/m3-air-hal200` | Older OpenGL-only compatibility source; not part of the native main build | +| Older M3 boot/firmware stacks | `compat/m3-legacy`, `compat/m3-pro-legacy` | Previous personal source profiles preserved with exact parent pins | +| M4 | `experimental/m4` | Eryk's separate development/evidence branch; unqualified here | +| M5 recognition research | `experimental/m5-recognition` | Public DJ recognition/encoder source; hardware admission stays fail-closed. Native private HAL300 work stays local. | +| Earlier M3 Max experiments | `experimental/m3-max-legacy` | Historical source profile; use the combined native branch for new development | + +A chip name or shader encoder alone does not establish support. Main deliberately +refuses M3 Ultra, M4 and M5 admission. Native M3 Air is experimental and +requires its exact identity, supported firmware and a compatible kernel. No Mesa +environment opt-in is required. +Compatibility and experimental profiles are separate source trees, not additional +drivers silently enabled in one binary. They have **not** undergone the main +branch's build/test run. + +## Kernel and firmware pairing + +Native M3 Pro/Max, experimental M3 Air and Neo use the unified Aurora ABI +represented by `include/drm-uapi/asahi_drm.h`. The checked kernel source is +[omacom/linux-aurora at 7b969982](https://github.com/omacom/linux-aurora/tree/7b969982306e1498a8cbe6e5da9bde743acd8fc5), +`include/uapi/drm/asahi_drm.h`. The update uses the high feature-bit assignments +and timestamp-copy command fields from that contract. It rejects the older +low-bit native contract before VM creation; this is a check for the known +collision, not universal ABI negotiation. The older SiliconForest experimental +header checked on October 18 is no longer the matching contract. + +Do not substitute headers, force a chip identity or use an old kernel simply +because its version string resembles the checked one. Kernel configuration, +firmware and m1n1 handoffs still need qualification on the actual board. +M3 Air needs no `ASAHI_M3_EXPERIMENTAL` variable; its kernel startup +configuration and package defaults are separate. This source update does not change any installed boot stack. + +## Build and check + +A source build does not install files, replace system Mesa, enable a kernel +option, or reboot anything. The integration was configured on x86_64 with +LLVM/Clang 22.1.8, a matching SPIR-V LLVM translator, Meson 1.10.2, Mako, PLY, +PyYAML, libdrm, SPIR-V Tools, and the development dependencies for X11/Wayland, +EGL, GBM and Vulkan. See [validation](SILICONFOREST-VALIDATION.md) for the exact +configuration and outcomes. + +Quick checks require a C compiler and Python 3. They compile and run production +chip admission, compression, plane-layout and scratch-layout tests: + +```sh +python3 tools/siliconforest/check.py +# In a full clone with all source tags: +python3 tools/siliconforest/check.py --check-git +``` + +With the build dependencies available: + +```sh +python3 -m venv ../mesa-venv +../mesa-venv/bin/pip install 'meson==1.10.2' 'Mako==1.3.10' 'ply==3.11' PyYAML pytest +MESON="$PWD/../mesa-venv/bin/meson" JOBS=8 tools/siliconforest/build.sh ../mesa-build +``` + +The October 18 baseline passed **36 Asahi host suites** and Vulkan regression +probes for four drm-shim identities, with Khronos validation enabled. Results +for the October 24 integration are recorded separately in the validation files. To rerun +those probes after the build: + +```sh +python3 tools/siliconforest/check-kernel-abi.py PATH_TO_SILICONFOREST_LINUX +VK_INSTANCE_LAYERS=VK_LAYER_KHRONOS_validation \ + python3 tools/siliconforest/drm-smoke.py ../mesa-build +``` + +The script builds Asahi and Zink OpenGL, Honeykrisp Vulkan, tree-matched shader +compiler tools and drm-shim, then runs the Asahi host suite. Do not reuse shader +compiler binaries from an older Mesa tree. There are no binary releases or +system-install commands for this integration yet. + +## What was reviewed and retained + +[The review ledger](SILICONFOREST-REVIEW.md) explains merged changes, duplicate +fixes, ABI findings, held regressions and experimental branches. +[SILICONFOREST-SOURCES.json](SILICONFOREST-SOURCES.json) retains the 209 original public branch, +PR and MR snapshots under `sources/2026-10-18/*`, adds two pinned October 24 +inputs, and retains the dated inventory of 37 GitHub PR records and +25 open upstream Asahi MR records. A snapshot is evidence, not approval to ship +its contents. This is a dated public-source investigation; it cannot establish +that no private, deleted, unindexed or newer work exists. + +GitHub Actions runs the quick CPU checks on main and pull requests. Full host +compilation and hardware qualification are distinct checks. diff --git a/SILICONFOREST-G15-WIRE.md b/SILICONFOREST-G15-WIRE.md new file mode 100644 index 000000000000..6d21dd7f838b --- /dev/null +++ b/SILICONFOREST-G15-WIRE.md @@ -0,0 +1,53 @@ +# Omacom retained G15 wire compatibility + +The J516S boot at kernel `7.2.11-lab7b969982-2e59`, built from +`omacom/linux-aurora@7b969982306e1498a8cbe6e5da9bde743acd8fc5`, reported +GET_PARAMS features `0x3e`, USC 3 and HAL 0. The initial integration refused it +before VM creation. No GPU benchmark was run on that failed admission. + +The source explains the distinction: + +- [g15/wire.rs](https://github.com/omacom/linux-aurora/blob/7b969982306e1498a8cbe6e5da9bde743acd8fc5/drivers/gpu/drm/asahi/g15/wire.rs) + explicitly retains the Mesa-751 private wire. Feature words are `0x3e`, or + `0xbe` with early tiling. Render is 384 bytes with priors at 256/264; compute + is 136 bytes with scratch at 64 and priors at 72/80. +- The canonical header contains eight additional timestamp-copy records in + each payload. Canonical render is 448 bytes with priors at 320/328; compute + is 200 bytes with scratch at 128 and priors at 136/144. Its per-command sync, + mirror and exact-prior feature assignments also differ. +- [g15/command.rs](https://github.com/omacom/linux-aurora/blob/7b969982306e1498a8cbe6e5da9bde743acd8fc5/drivers/gpu/drm/asahi/g15/command.rs) + consumes the private structs, not those in the canonical header. Comparing + the latter alone does not qualify this backend. + +The compatibility path recognizes only already-admitted G15S/G15C identities +with one of those two exact feature words, on direct DRM. It normalizes the +features once before VM creation and converts packets at submission. It copies +the shared prefixes, verifies every removed timestamp-copy byte is zero, moves +the complete remaining tail without discarding nonzero fields, and preserves +command headers, dependency barriers, attachments, queue IDs and sync objects. +Kernel validation still checks all unsupported fields and GPU references. + +The caller's command buffer is unchanged. Temporary packet storage lives until +the synchronous submit ioctl returns. Unknown signatures, mixed feature words, +truncated/unrecognized packets, output exhaustion and nonzero copy slots are +rejected by the retained-wire selector/converter. The existing canonical +feature gate is unchanged. No kernel flag, GPU identity gate, VA reservation or firmware check +is bypassed. No feature bits are changed in the kernel. This is compatibility +with these known experimental contracts, not general ABI negotiation. + +`asahi-g15-wire` checks all 65,536 low feature combinations, identity refusals, +both feature normalizations, every current render/compute packet extent, +retained tail/barrier bytes, a mixed attachment/render/compute stream, all input +truncations, output bounds and every removed byte's nonzero refusal. The +existing canonical ABI/admission controls remain in place. + +Both x86_64 and native ARM64 builds passed all 92 Asahi tests. The follow-up +passed reboot, compositor/display and independent GL ES/Vulkan pixel checks +on J516S, J313 and J293. On J516S it worked on both the newer pinned kernel +and the previously working default kernel; the native GET_PARAMS word remained +`0x3e`, with no kernel feature changes. Matched Quake medians were 185.8 and +184.7 FPS respectively. The complete normal lab job remains TESTS_FAILED due +to the recorded OMT checks, despite the specific Mesa subtests passing. +See [the selected hardware evidence](SILICONFOREST-HARDWARE-20261024.json). +J613/J615 revised-layout hardware qualification, full CTS and sustained behavior +remain unqualified. No M3 Air hardware result is inferred from the M1 Air. diff --git a/SILICONFOREST-HARDWARE-20261024.json b/SILICONFOREST-HARDWARE-20261024.json new file mode 100644 index 000000000000..3a82df4cda95 --- /dev/null +++ b/SILICONFOREST-HARDWARE-20261024.json @@ -0,0 +1,321 @@ +{ + "schema": 1, + "recorded_controller_utc": "2026-10-25T01:18:59.679489+00:00", + "tested_source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "host_CI": "https://github.com/chriskearney/siliconforest-mesa/actions/runs/40149043594", + "host_Asahi_suites": { + "x86_64_pass": 92, + "ARM64_pass": 92, + "failed": 0, + "note": "Existing optional FMA oracle subtest remains skipped." + }, + "native_ARM64_build": { + "id": "b1024-180226-304c", + "package_sha256": "627abbd3c7a580cb9071415d688557dd666a22101809d69fd297abf8f03ee396", + "seconds": 399, + "scope": "Single all-GPU ARM64 build; M1 variants change only package/profile/runtime-owner metadata. All seven ELF payloads and symlink targets are byte-identical." + }, + "installed_library_sha256": { + "/usr/lib/libgallium-26.3.0-devel.so": "89b7818b03f34a2450eaa4ea0d1d5adbefe5c51b8aba63f0c9a6892c79fd80a3", + "/usr/lib/libvulkan_asahi.so": "383b593d0d804d56e6f1cbe6c31c3ecc1132b9b69d482956d2b136e925cb0716" + }, + "metadata_derivations": [ + { + "parent_sha256": "627abbd3c7a580cb9071415d688557dd666a22101809d69fd297abf8f03ee396", + "package_sha256": "2982f802f036c03712eb83062cba1c2cf129c735597d476e3d37485482a8073b", + "source_commit": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "native_parent_build": "b1024-180226-304c", + "aarch64_elf_files_byte_identical": 7, + "payload_changes": [ + "usr/share/siliconforest/mesa-runtime.tsv", + "usr/share/siliconforest/mesa.json" + ], + "runtime_llvm_owner": "llvm-libs", + "recompiled": false + }, + { + "parent_sha256": "627abbd3c7a580cb9071415d688557dd666a22101809d69fd297abf8f03ee396", + "package_sha256": "9d8f1b81eb22da079ac252cfd1efccd8252ac4802ce270ec30e9fe31984403fc", + "source_commit": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "native_parent_build": "b1024-180226-304c", + "aarch64_elf_files_byte_identical": 7, + "payload_changes": [ + "usr/share/siliconforest/mesa.json" + ], + "runtime_llvm_owner": "llvm22-libs", + "recompiled": false + } + ], + "hardware": [ + { + "machine": "m3pro", + "board": "apple,j516s", + "boot_id": "f7ade3b9-56fc-4cbb-9496-397779d5d6fc", + "kernel": "7.2.11-mixtape-77648eb77168-g15", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "boot_desktop_and_pixel_readbacks": "pass", + "OpenGL_ES_correct_render_loops": 5701, + "Vulkan_correct_render_loops": 4846, + "wrong_pixel_loops": 0, + "selected_kernel_faults": 0, + "compositor_libraries": { + "/usr/lib/libgallium-26.3.0-devel.so": "89b7818b03f34a2450eaa4ea0d1d5adbefe5c51b8aba63f0c9a6892c79fd80a3" + }, + "displays": [ + { + "name": "eDP-1", + "width": 3456, + "height": 2234, + "refreshRate": 120.0 + }, + { + "name": "DP-1", + "width": 3840, + "height": 2160, + "refreshRate": 59.997 + } + ], + "quake": { + "device": "m3pro", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "kernel": "7.2.11-mixtape-77648eb77168-g15", + "fps": [ + 184.1, + 184.7, + 186.2 + ], + "median_fps": 184.7, + "framebuffer": [ + 1920, + 1080 + ], + "host_fault_count": 0 + }, + "protected_boot_files_unchanged": true, + "runtime_package_unchanged": true, + "installed_after_test": true + }, + { + "machine": "m1air", + "board": "apple,j313", + "boot_id": "61ef895b-67bc-48ec-a5ae-a09add2f60fe", + "kernel": "7.2.11-lab182-205f5e8b20fc-normal", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "boot_desktop_and_pixel_readbacks": "pass", + "OpenGL_ES_correct_render_loops": 7464, + "Vulkan_correct_render_loops": 6643, + "wrong_pixel_loops": 0, + "selected_kernel_faults": 0, + "compositor_libraries": { + "/usr/lib/libgallium-26.3.0-devel.so": "89b7818b03f34a2450eaa4ea0d1d5adbefe5c51b8aba63f0c9a6892c79fd80a3" + }, + "displays": [ + { + "name": "eDP-1", + "width": 2560, + "height": 1600, + "refreshRate": 60.0 + }, + { + "name": "DP-2", + "width": 1920, + "height": 1080, + "refreshRate": 59.94 + } + ], + "quake": { + "device": "m1air", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "kernel": "7.2.11-lab182-205f5e8b20fc-normal", + "fps": [ + 512.8, + 510.2, + 515.2 + ], + "median_fps": 512.8, + "framebuffer": [ + 1920, + 1080 + ], + "host_fault_count": 0 + }, + "protected_boot_files_unchanged": true, + "runtime_package_unchanged": true, + "installed_after_test": true + }, + { + "machine": "m1", + "board": "apple,j293", + "boot_id": "f4b76b7c-270f-47f2-8d6f-99d0882d5cfe", + "kernel": "7.2.11-lab182-205f5e8b20fc-normal", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "boot_desktop_and_pixel_readbacks": "pass", + "OpenGL_ES_correct_render_loops": 7422, + "Vulkan_correct_render_loops": 6642, + "wrong_pixel_loops": 0, + "selected_kernel_faults": 0, + "compositor_libraries": { + "/usr/lib/libgallium-26.3.0-devel.so": "89b7818b03f34a2450eaa4ea0d1d5adbefe5c51b8aba63f0c9a6892c79fd80a3" + }, + "displays": [ + { + "name": "eDP-1", + "width": 2560, + "height": 1600, + "refreshRate": 60.0 + }, + { + "name": "DP-2", + "width": 3840, + "height": 2160, + "refreshRate": 120.0 + } + ], + "quake": { + "device": "m1", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "kernel": "7.2.11-lab182-205f5e8b20fc-normal", + "fps": [ + 490.0, + 490.5, + 486.8 + ], + "median_fps": 490.0, + "framebuffer": [ + 1920, + 1080 + ], + "host_fault_count": 0 + }, + "protected_boot_files_unchanged": true, + "runtime_package_unchanged": true, + "installed_after_test": true + } + ], + "M3_additional_one_shot": { + "kernel": "7.2.11-lab7b969982-2e59", + "kernel_source": "7b969982306e1498a8cbe6e5da9bde743acd8fc5", + "job": "j1024-181011-01ff", + "whole_job_outcome": "tests_failed", + "passed_tests": [ + "boot-health", + "mesa-readback", + "mesa-benchmark", + "mesa-restore" + ], + "quake": { + "device": "m3pro", + "source": "97a65d845f39418aecc693dcaf9dcb14a05849f6", + "kernel": "7.2.11-lab7b969982-2e59", + "fps": [ + 185.8, + 185.7, + 186.7 + ], + "median_fps": 185.8, + "framebuffer": [ + 1920, + 1080 + ], + "host_fault_count": 0 + }, + "OMT": { + "tool": "0.1.13", + "pass": 33, + "fail": 14, + "skip": 26, + "new_vs_historical_baseline": [ + "gpu.driver", + "packages.hardware" + ], + "driver_binding_observed": "/sys/bus/platform/drivers/asahi-g15", + "driver_check_source": "hardware.py:24,145-157 only checks /sys/bus/platform/drivers/asahi", + "package_check_source": "hardware.py:129-136 and system.py:44 use literal mesa/vulkan-asahi package names", + "note": "This is not a whole-lab or full-release PASS. Other OMT failures include GPU-reporting discrepancies despite the independent native GL ES/Vulkan checks and passing GPU benchmarks; those are not declared fixed." + }, + "original_default_kernel_and_Mesa_restored_before_normal_kernel_repeat": true + }, + "benchmark_method": { + "program": "vkQuake 1.36.0", + "executable_sha256": "3661f258b23a4ae66749af5062eab70ea1066ed936b9b7a114cc2c5cba379483", + "demo": "demo1", + "frames": 969, + "runs": 3, + "render_extent": [ + 1920, + 1080 + ], + "each_run_extent_confirmed_from_PNG_header": true, + "vsync": 0, + "MSAA": 0, + "render_scale": 1, + "max_frame_latency": 2, + "warmup_waits": 1000, + "gamma": 0.9, + "contrast": 1.4, + "scope": "Short average-throughput measurements, not frame-time, sustained-power or stutter qualification." + }, + "references": { + "M3_fresh_before": { + "device": "m3pro", + "fps": [ + 151.5, + 152.0, + 152.1 + ], + "median_fps": 152.0, + "framebuffer": [ + 1920, + 1080 + ] + }, + "M1_Air_fresh_before": { + "device": "m1air", + "fps": [ + 505.6, + 515.5, + 502.5 + ], + "median_fps": 505.6, + "framebuffer": [ + 1920, + 1080 + ] + }, + "M1_post_first_reboot": { + "device": "m1", + "fps": [ + 507.0, + 507.1, + 504.4 + ], + "median_fps": 507.0, + "framebuffer": [ + 1920, + 1080 + ] + }, + "M1_initial_session": { + "device": "m1", + "fps": [ + 56.1, + 57.3, + 57.4 + ], + "median_fps": 57.3, + "framebuffer": [ + 1920, + 1080 + ] + }, + "note": "The initial J293 stock-Mesa session was about57 FPS; a per-process new Vulkan driver stayed about57. Rebooted sessions reached507 then490, so this is not attributed to a ninefold Mesa speedup. Its target clock began in1976 before synchronization; controller time and boot IDs identify the actual tests." + }, + "limitations": [ + "No J613 or J615 is available; Scott\u2019s revised Air VA layout still needs physical texture/MSAA/compute and desktop qualification.", + "No full CTS run or sustained stability/performance qualification.", + "M4 and T8122 HAL200 remain unqualified.", + "Kernel/package/installer default enablement and the Omacom target integration branch remain separate work.", + "The M3 remains substantially slower than the M1s in this workload; no memory-readiness root-cause or clock-policy fix is claimed.", + "Automatic rollback helpers were compiled and enabled, then disabled after successful checks; automatic recovery was not exercised." + ] +} diff --git a/SILICONFOREST-REVIEW.md b/SILICONFOREST-REVIEW.md new file mode 100644 index 000000000000..baf549798127 --- /dev/null +++ b/SILICONFOREST-REVIEW.md @@ -0,0 +1,187 @@ +# Mesa source integration review + +## October 24 integration candidate + +The update merges Aurora `aurora-wip` at +`4911479bf988ce88ec0889ed0378352a0bb0fae2` and Scott Jones's draft +[PR71](https://github.com/aurora-silicon/mesa/pull/71) at +`0163e7fa96f4c54f2fb72e6053b2aaa22446a44d`. Both remain original ancestry, +with original author identities. There were 214 upstream-only commits and 33 +downstream-only commits before integration; these counts include merges and +maintenance, not 214 missing M3 driver fixes. + +- Retain downstream placed-mapping ownership, fixed-address drm-shim behavior, + the checked configurable geometry heap, and Zink ordering fixes. Equivalent + upstream RT fixture sequencing and NULL XFB counter handling replace the old + implementations without dropping their regression coverage. +- Update the known-collision ABI gate for Aurora's unified high feature bits + and timestamp-copy payloads. The checked 18 wire facts match kernel + `7b969982306e1498a8cbe6e5da9bde743acd8fc5`'s canonical header. Its retained + G15 backend uses a separate low-bit wire, now handled by the explicit + converter described below. Header equality alone does not qualify a backend. +- T8122's separate runtime reports VM_STATUS and SCHEDULED_QUEUES, without + exact-prior barriers (`m3/m3_drm.rs:217` in the pinned kernel). Give G15G its + own baseline check instead of requiring the Pro/Max/Neo feature pair. Host + drm-shim probes cover its actual feature baseline and reject user binds into + all four T8122 reservations; no GPU submission is performed. +- Keep M4 admission disabled even though the upstream snapshot contains M4 + code. Preserve T6030/T6031/Neo identity checks. T8122 uses its exact supported + firmware/runtime contract without a Mesa environment opt-in, as requested by + the owner. The obsolete variable being unset, `0` or `1` does not change + admission. Kernel and packaging defaults remain separate work. +- Keep all four T8122 runtime reservations and the below-2^39 heap/alias cap. + The updated layout has host tests, but Scott's earlier hardware results used + a different layout. J613 texture/MSAA/compute and desktop checks remain due; + J615 and HAL200 are not qualified by those earlier results. +- GCC 16 at `-O2` exposed a nested pNext compression rejection regression. + Copying each header's type and next pointer through untyped storage, plus + copying the external-memory payload, preserves all 3,359 policy checks; + neither the policy nor the failing assertion is relaxed. +- Host fixtures now follow the integrated policies: G15G wide CDM barriers + are positive cases, while actual M4 device admission is refused without + removing offline compiler capability coverage. The inherited image-store + regression compared whole G17P/G16G binaries, including unrelated register + copies and scheduling. It now compares the single image-write instruction + and independently checks the float/integer data bit. No production compiler + change is needed; a deliberate float-as-integer mutation must fail the test. +- Preserve this fork's assistant policy; do not import Aurora's workflow that + rewrites it. Historical compatibility branches and private-source exclusions + are unchanged. + +The later Aurora code includes native render-pass/depth-store improvements, +query-progress and upload-reuse work, compiler fixes, and the unified kernel +UAPI. No FPS gain is claimed without a matched hardware benchmark. Full CTS, +M1/M2/M3 hardware regression tests and installing a system package remain +separate from host compilation and drm-shim validation. + +## Main integration + +The starting point is the current 26.3 development tree, rather than an older +26.1 source tree with every later branch applied over it. + +| Work | Exact source | Decision | +| --- | --- | --- | +| DJ Neo / AGX3b | `aurora-silicon/mesa:agx3b`, `dba15302aa0554b52ec6ca5103bd0391035e0fdc` | Preserved as ancestry of the native M3 source; includes DJ's merged PR12–22 work | +| Eryk M3 Pro | [PR23](https://github.com/aurora-silicon/mesa/pull/23), `cf8ec613be202d8bfc5440e61e9aa6c60700fad7` | Main foundation; 39 commits after DJ's pinned head | +| Naeem M3 Max | [PR25](https://github.com/aurora-silicon/mesa/pull/25), `aab698d2ef34e2aef38ba4d2bfcfa3abc5ded4c5` | Merged as original ancestry; four unique commits, preserving all nine later Eryk commits missing from this fork | +| Joshua null transform-feedback counters | [omacom PR10](https://github.com/omacom/mesa/pull/10), `b87e7456cdbb7abdea2f360cdcba0e2a56316f3f` | Cherry-picked with provenance; no dereference of a NULL counter array | +| Eryk/Mike/Ryan Zink protections | [PR7](https://github.com/aurora-silicon/mesa/pull/7), `53a09d65633f1e6d6cc26bf851c16f63fcec2060`, `02c37f31ded86dd39e721dfccc8b43668aecb3fb` | Imported ordered-access history, combined barrier masks, depth-unbind transition, regression fixture and fast-path follow-up | +| Joshua placed-memory review | [omacom PR8](https://github.com/omacom/mesa/pull/8), `72c18d4deb9440c839ad2fb35b0537fd993915e0`, `f91b6f40b3c6c529fc523c3339060e0af165762f`, `ddfb4cf114a6e72b690581ff6fb2fe8447d11ffa` | Adapted missing range/result/cache checks while retaining the base's newer independent mappings for aliased imports | + +The Zink integration preserves the source checkpoint's attribution to Mike +Blumenkrantz (`b448ad053f2ce190a5b6b2d27b30dcbf3d45ec7d` / +`6ff2d4aa9da581e3c5f9fdaa4b51416b116d5ace`) and Eryk +(`53a363032ed040c87e4ff1d97876bfd00c7e2424`). The full discovery snapshot retains +public PR history alongside the new integration commits. + +## Adversarial findings and treatment + +1. **A newer branch name was not a superset.** Naeem's branch diverged before + nine Eryk correctness fixes: staging-bank/read hazards, cube texture indices, + half-source square root, GL scratch word packing, multisampled window + buffers, compute variant reuse, border-depth comparison and tile-load masks. + Merging into Eryk's current head retained these instead of replacing the tree + with Naeem's snapshot. +2. **Known kernel ABI collision.** The maintained kernel and the experimental + native kernel assign different meanings to bits 3–8 and 10–15. Render and + compute payloads also differ by timestamp-copy fields. A GPU identity check + alone is insufficient. Main requires the native per-command-sync and exact + prior-barrier contract. The physical integration follow-up also supports + Omacom's retained G15S/G15C `0x3e`/`0xbe` wire through an explicit feature + and packet converter; it never passes canonical packets to that backend. + See [the retained-wire contract](SILICONFOREST-G15-WIRE.md). + CPU tests exercise missing and conflicting + feature bits. This does not prove compatibility with arbitrary kernels that + fabricate the same feature word. +3. **Blind cherry-picking regressed newer implementations.** Thomas Glanzmann's + [plane-offset fix](https://github.com/aurora-silicon/mesa/pull/10), + `ba289e643e0b361747988280a459b73c34c2cad9`, is already covered by the base's + `offset_B` handling plus overflow, row-pitch, overlap and binding validation. + Its older implementation was not reapplied. The production image-layout + tests are included in quick checks and the complete Asahi suite. +4. **Placed mappings needed a selective port.** The base already tracks mapped + lengths and gives imported memory objects independent mappings. Replacing + that with PR8 would remove working alias isolation. The adaptation instead + adds runtime allocation/BO bounds, a runtime result-address check, protection + against moving a shared mapping on backends without independent mappings, + and release of a placed mapping before returning its BO to the cache. + A NULL/already-unmapped object does no reserve mmap. Physical Vulkan CTS and + virtio execution remain unqualified. +5. **Capture/replay changes are not interchangeable.** Joshua's + [omacom PR9](https://github.com/omacom/mesa/pull/9), + `11ae82d8d8c379c2ae895806b4409537c5ceb25b`, introduces a separate 4-GiB range. + The native base already has a separate replay heap reserved after firmware + and alias holes. Replacing the allocator with PR9 would discard those holes. + Its AGX2-specific extension/error classification still needs a dedicated port + and is held; this repository does not claim that M1/M2 capture/replay issue is + resolved by the native implementation. +6. **The reported compression failure was not reproduced.** The current exact + compression-policy source passes 3,035 host checks. No policy was weakened + and no test disabled to turn an older reported 33/34 result green. +7. **Feature exposure stays narrow.** G15C does not gain unsupported ray-query + advertisement. Neo sparse aliasing/strict residency restrictions remain. + No broad hardware-admission switch, known-bad barrier simplification, or + forced compiler generation was added. + +8. **The full host run exposed inherited test and shim defects.** The compute + wire assertion still described an older 88-byte packet; it now checks the + actual 136-byte payload and the appended field offsets. The RT fixture read + a length in the same C argument list that an encoder modified it; reading + through a pointer inside the assertion sequences those operations without + changing expected bytes. All 611 checks remain. The generic drm-shim mmap + wrapper dropped the requested address, making placed mappings try address + zero; it now forwards that address. All 36 Asahi suites and the four host + Vulkan regression profiles pass, including Vulkan validation on the latter. + +## Experimental and held work + +| Source | Treatment and reason | +| --- | --- | +| Newer private M5 HAL300 research | Kept local at the owner's instruction. No private-source snapshot or runnable M5 claim is published here. | +| DJ public `m5-agx-g15-g17-failclosed`, `068c165a0c83cab4e4c6e9a3c89f63f7a4fa0c2c` | Preserved on `experimental/m5-recognition` and as an exact source tag. Recognition/encoder research remains fail-closed, not an active M5 driver. | +| Eryk M4, `08b19ec3a2e422a7252fdfe77c185450fccf86da` | Preserved on `experimental/m4` with original qualification evidence; no new hardware claim. | +| Personal Air/legacy/older Pro/Max sources | Separate named profiles; firmware and kernel contracts differ from main. Only policy/branch notices and removal of the obsolete inherited macOS workflow differ at their new tips. | +| Joshua omacom PR3–6 | Source snapshots retained. Latest PR6 `f144c7949b7d960f26677b671341d5a123057ddf` reports 55 regressions over 3,253,584 cases. A narrow later pass does not qualify the complete performance stack. Not merged. | +| Joshua PR11 `44841202b4fd041fc29b6ff77f585d4df6e70dd7` | Depends on the above performance stack; retained for review, not applied standalone or enabled. | +| Official MR44475 phi shuffling, `e22cd9bd50daa4671b41a81ee72c8238a0604a8f` | Examined. Main has the newer parallel-phi implementation that snapshots original destinations and whole vector ranges. The older one-line reverse-walk fix is not a drop-in replacement. | +| Official MR44041 lighter CDM barriers | Retained for review. It removes undocumented barrier bits and does not establish equivalent cache guarantees for the merged native GPU paths. | +| Official MR44932 virtio implicit-sync optimization | Exact candidate head retained. Current external-BO lifetime code differs; do not blindly apply older sync assumptions. | +| Official GL/Vulkan interop MR42872, memory-budget MR40238, SVM MR37668 | Candidate snapshots retained; these are separate features requiring targeted runtime validation, not prerequisites for native M3/Neo source integration. | +| Official Mesa main, `c823a83e8f373a5c36c2b9ed1d7dc98a4f3360ee` | Pinned as a future rebase source. It is 1,335 commits beyond this fork's October 1 base and includes cross-driver/NIR interface changes. Not merged wholesale during this chip-stack integration. | +| Official Asahi fork main, `01ac84e119f468a3267714b0b4a339316a3083f4` | Checked directly; its tip is dated April 2025, so it is not presumed newer than the current Mesa development source. | +| DJ Windows D3DKMT/WC/UMD branches | Preserved in the inventory; not mixed into Linux default behavior. | + +## Review limits + +This is a provenance/graph/dependency review, focused inspection of integration +boundaries and correctness fixes, host compilation and CPU tests. DJ's base alone +changes hundreds of files and includes generated tables and captured fixtures; +this is not a claim that every inherited line has been independently audited. +No M3/Neo/M4/M5 hardware, physical GPU execution, compositor session, firmware +recovery, full Vulkan/OpenGL CTS or game compatibility was tested here. Source +preservation is not a substitute for those checks. + + +## Configurable geometry heap follow-up + +Official [MR44931](https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/44931), +`a2a5472089a029c067a2e3e35adc420643603065`, is adapted in `86e11a3ee2d` with +s0ullight's author credit. The option is `hk_geometry_heap_size_mb`, default +128 MiB, valid range 16–1024 MiB. The implementation keeps the current device +callback, one-time initialization, shader-stage warm-up and BO/map failure +handling. No allocator or native kernel ABI guard is replaced. + +The upstream change adds no per-game profile. An explicit setting such as +`hk_geometry_heap_size_mb=256 your-game` is needed to opt in; this integration +does not establish that a game crash is fixed or that general FPS improves. +The production callback is exercised under ASan/UBSan by the public CPU checker, +including the default, both limits, the 256 MiB override and BO/map failures. +A fresh x86_64 build from this public source tree passed all 36 registered Asahi +tests. The generated option parser rejected invalid/out-of-range environment settings +in 11 direct parser checks. Adversarial review found XML values bypass that +parser range check; `db96168675f` clamps them at allocation to 16–1024 MiB +and statically bounds publication to the GPU u32 fields. The regression uses +the real `poly_heap` declaration. Twelve real XML-parser-to-callback checks +covered negative, zero, in-range and oversized values, including 4096/5000 MiB; +all allocated and published the same bounded size. Removing the clamp fails +the maintained regression. These are host checks, without GPU qualification. diff --git a/SILICONFOREST-SOURCES.json b/SILICONFOREST-SOURCES.json new file mode 100644 index 000000000000..9f8a43b65c05 --- /dev/null +++ b/SILICONFOREST-SOURCES.json @@ -0,0 +1,2870 @@ +{ + "schema_version": 1, + "discovered_on": "2026-10-18", + "repository": "https://github.com/iconidentify/siliconforest-mesa", + "default_branch": "siliconforest/next", + "source_snapshots": [ + { + "repository": "https://github.com/aurora-silicon/mesa", + "source_key": "aurora-native", + "source_kind": "branch", + "source_name": "agx3b", + "commit": "dba15302aa0554b52ec6ca5103bd0391035e0fdc", + "tag": "sources/2026-10-18/aurora-native/agx3b", + "url": "https://github.com/aurora-silicon/mesa/tree/dba15302aa0554b52ec6ca5103bd0391035e0fdc", + "disposition": "snapshot-only; consult integration decisions" + }, + { + "repository": "https://github.com/aurora-silicon/mesa", + "source_key": "aurora-native", + "source_kind": "branch", + "source_name": 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"title": "Draft: asahi: add support for interchange_compressed", + "author": "oliver.bestmann", + "head": "b8c1ab93c911724c26a5724dc2d9863ddf402c3a", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39755", + "updated_at": "2026-07-12T16:57:53.890Z" + }, + { + "number": 38294, + "title": "Draft: util: os_get_option_internal use getenv_s when possible", + "author": "lygstate", + "head": "feb779e89f7464791d466300dd9ef7e06477d3d6", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38294", + "updated_at": "2025-11-13T20:59:14.256Z" + }, + { + "number": 37668, + "title": "asahi: support SVM and cl_ext_buffer_device_address", + "author": "karolherbst", + "head": "d0632ad19c4b3ce4b2f051108089a69d9dac3228", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37668", + "updated_at": "2025-10-24T18:22:58.494Z" + }, + { + "number": 37287, + "title": "src/python: Add a wrapper script for running python", + "author": "dbaker", + "head": "e20bb631838329b1edb3b1d4e8f27529841610f9", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37287", + "updated_at": "2026-05-14T16:56:09.370Z" + }, + { + "number": 31989, + "title": "drm-shim: Add primary node support", + "author": "lcagustini", + "head": "d6fb563a3c7a19faef065421cc2b6f255efc0f36", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31989", + "updated_at": "2025-02-16T20:44:30.145Z" + }, + { + "number": 30451, + "title": "vulkan: Shader objects should default to robustness2", + "author": "gfxstrand", + "head": "5a2341a4337f581be175ca8af942244fb9f1cf8f", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30451", + "updated_at": "2024-07-31T22:25:58.211Z" + }, + { + "number": 29353, + "title": "mesa: Add values to PIPE_CAP_OCCLUSION_QUERY", + "author": "MTCoster", + "head": "71521567d67a8b19c7b05c0e623e4134611c99bb", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29353", + "updated_at": "2024-05-26T09:48:09.709Z" + }, + { + "number": 18294, + "title": "Draft: zink: drop rounding line-width to granularity", + "author": "kusma", + "head": "09ea42c575b24fdc00364cb19ba615387172dfb1", + "url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18294", + "updated_at": "2025-10-14T14:07:24.198Z" + } + ], + "profiles": [ + { + "branch": "experimental/m5-recognition", + "commit": "e4addb3c3ce4099eb6940afc16a69185b2bd5385", + "source_commit": "068c165a0c83cab4e4c6e9a3c89f63f7a4fa0c2c", + "source_ref": "refs/remotes/discovery/dj/m5-agx-g15-g17-failclosed", + "note": "Public DJ M5/G15/G17 recognition and encoder research. Hardware admission remains fail-closed; this is not a runnable M5 driver. Newer private HAL300 work is kept local at the owner's instruction." + }, + { + "branch": "experimental/m4", + "commit": "4a7f7eab1a30f4035b9927601d2ea152c6331c8f", + "source_commit": "08b19ec3a2e422a7252fdfe77c185450fccf86da", + "source_ref": "refs/remotes/discovery/eryk-legacy/m4-asahi-port", + "note": "Eryk's M4 development and qualification evidence. This is a separate, older driver and firmware contract; it is not a universal or release-qualified M4 driver." + }, + { + "branch": "compat/m3-air-hal200", + "commit": "7446b6810fc620f999680841e6a6209f6d0e7101", + "source_commit": "78908f4d18af2274b5df08c4ad9d953c25980b53", + "source_ref": "refs/remotes/discovery/previous/m3/air-hal200", + "note": "Previously maintained M3 Air T8122 HAL200 / macOS 26.6.2 OpenGL profile. This does not provide native Honeykrisp Vulkan. Requires its matching kernel, firmware and m1n1 handoffs." + }, + { + "branch": "compat/m3-legacy", + "commit": "1acd44ee395324c1f8c7af37b3bec5d9ff5d658f", + "source_commit": "59ec4e2e8f0e5c2356ccf2749408c1e472484a5c", + "source_ref": "refs/remotes/discovery/previous/m3/legacy", + "note": "Previously maintained M3 legacy firmware profile. Requires the matching older boot/firmware/kernel contract; it is not interchangeable with the native M3 integration." + }, + { + "branch": "compat/m3-pro-legacy", + "commit": "f7d09448e2ee398047a5b1ab4de13e37be00486d", + "source_commit": "d616d0650d6fa80f72a750a0121442ab917ed6cf", + "source_ref": "refs/remotes/discovery/previous/fix/native-index-offset-integrated-20261013", + "note": "Previously maintained native M3 Pro OpenGL profile on the older Mesa 26.1.4 foundation. Retained for existing boot-stack compatibility; consult the pinned source history before selecting it." + }, + { + "branch": "experimental/m3-max-legacy", + "commit": "71a7843b5553d3c65fbf7d6c4b74fbed101c4bc1", + "source_commit": "ff120e88cfc047b69ed412b2276599e3b2a426de", + "source_ref": "refs/remotes/discovery/previous/m3max/g15c", + "note": "Earlier M3 Max experiments on the legacy Mesa foundation. New work should use the combined native branch with its matched experimental kernel instead." + } + ], + "scope_note": "Finite public-source discovery snapshot, not a claim to have found every private, deleted, unindexed or subsequently published branch. Source snapshots do not imply code approval or hardware qualification.", + "source_policy": "Public-source refs only. Private-source work stays local at the owner's instruction.", + "integration_followups_20261018": [ + { + "source_url": "https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/44931", + "source_commit": "a2a5472089a029c067a2e3e35adc420643603065", + "import_commit": "86e11a3ee2dee9037f7c51500b1dfe60a96dbe0c", + "regression_test_commit": "df1456f7f4a2984087a335ed25ba4fca25205f52", + "hardware_qualified": false, + "review_hardening_commit": "db96168675f5464d5293caf48ed718792b2bed74" + } + ], + "last_integration_update": "2026-10-24", + "integration_followups_20261024": { + "base": "7515336b3dfbe8943b555ffec9817b9ed64379a8", + "aurora_merge": "5323fb87815718ca294ebe3c4f92b56cc18c577e", + "scott_merge": "44fe9cab321168c782babaeb0f035088b574d823", + "kernel_repository": "https://github.com/omacom/linux-aurora", + "kernel_commit": "7b969982306e1498a8cbe6e5da9bde743acd8fc5", + "kernel_header": "include/uapi/drm/asahi_drm.h", + "hardware_qualified": false, + "system_install_performed": false + } +} diff --git a/SILICONFOREST-VALIDATION.json b/SILICONFOREST-VALIDATION.json new file mode 100644 index 000000000000..869a13f48a2e --- /dev/null +++ b/SILICONFOREST-VALIDATION.json @@ -0,0 +1,1446 @@ +{ + "schema_version": 1, + "checked_at_utc": "2026-10-25T00:23:23.505409+00:00", + "source_commit": "aefe5c2dd1525e37e0d329fdf39595dc25abbbcd", + "driver_subtrees": { + "src/asahi": "2732515b947bac01c8917ccb9b0a38d22a9dc63b", + "src/gallium/drivers/asahi": "4e52bf0719cef4c094294aad9174219ab0d4a86a", + "src/gallium/drivers/zink": "035886779f61bacba0c6eb81a891829fc5144960", + "src/drm-shim": "7818081c091bc1a9f8f73b6763ff4671f61b00f9", + "include/drm-uapi/asahi_drm.h": "3260e2f7ba2844413c7dc18dc001b66cafbe1a01" + }, + "host": "x86_64 Linux", + "c_compiler": "GCC 16.2.1 20260810", + "llvm": "22.1.8", + "meson": "1.10.2", + "built": [ + "Asahi and Zink Gallium shared driver", + "Honeykrisp Vulkan shared driver", + "GLX/EGL/GBM", + "tree-matched mesa_clc and asahi_clc including G15G libagx programs", + "Asahi drm-shim", + "all registered Asahi test dependencies" + ], + "build_options": { + "buildtype": "debugoptimized", + "b_ndebug": false, + "gallium_drivers": [ + "asahi", + "zink", + "softpipe" + ], + "vulkan_drivers": [ + "asahi" + ], + "glvnd": false + }, + "asahi_tests": { + "passed": 91, + "failed": 0, + "tests": [ + { + "name": "asahi - mesa:agx2_disasm", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-agx3-packing", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_rt_core", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_traversal", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_rt_gen1_entry", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_null_as", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_hit_commit", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_status", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_position_fetch", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_ray_query_prerequisites", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_wait", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-rt-ift", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-scs-layout", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-chip-admission", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-usc-base-page", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-rt-payload-gen1", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-rt-blas-gen3", + "result": "OK" + }, + { + "name": "asahi - mesa:agx2_python_disasm", + "result": "OK" + }, + { + "name": "asahi - mesa:vbo_robustness", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-rt-bvh", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_terminate", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-rt-envelope", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_execution_allowance", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_memory_budget", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_barrier", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_gen1_query_state", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_root_size", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi_layout_tests", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_query_reset", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_query_program", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_g17p_compression", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_query_copy", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_image_layout_core", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_native_descriptor", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_native_sampler", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_gs_ray_query", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_sampler_bias", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_rt_inlining", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_memory_oom", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_tes_query", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_rt_pipeline_executable", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_sparse_formats", + "result": "OK" + }, + { + "name": "asahi - mesa:libasahi_tests", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_rt_cache_control", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_rt_pipeline_binary", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_rt_on_demand", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_cpu_upload", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_sync_prior", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_host_as", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-native-descriptor", + "result": "OK" + }, + { + "name": "asahi - mesa:hk-g13g-explicit-plane-layout", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_host_as_lifetime", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-texture-crawl", + "result": "OK" + }, + { + "name": "asahi - mesa:hk-g17p-explicit-plane-layout", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_g17p_metadata_grid", + "result": "OK" + }, + { + "name": "asahi - mesa:hk-g17p-compressed-layer-copy", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-vs", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-query", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g15c-gallium-vs", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g15c-gallium-query", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g15s-gallium-vs", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g15s-gallium-query", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-vs", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-query", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-split-pending", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-split-completed", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-pending", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-completed", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-first-ioctl-failure", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-shadow-border", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-prepublication-no-fence", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-stale-output-generation", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-completed-error-fence", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-first-ioctl-partial", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-split-wait-error", + "result": "OK" + }, + { + "name": "asahi - mesa:hk-g17p-compressed-mip-blit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-wait-error", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-publication-probe-error", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-interrupted-wait", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-submit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-submit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-vertex-output-shapes", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-vertex-output-shapes", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-blit-encode", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-blit", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_scs_nir", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-xfb-program", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-xfb-program", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_ray_query", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_as_registry", + "result": "OK" + }, + { + "name": "asahi - mesa:agx_tests", + "result": "OK" + } + ], + "inner_suite_note": "The existing optional NativeFMA.ExactDyadicOracle GTest remains skipped." + }, + "quick_checks": { + "production_test_programs": 5, + "compression_policy_checks": 3359, + "source_tags": 211, + "preserved_compatibility_profiles": 6 + }, + "vulkan_drm_shim": { + "profiles": [ + "g13g", + "g15s", + "g15c", + "g17p", + "g15g variable unset", + "g15g obsolete variable=0", + "g15g obsolete variable=1" + ], + "passed": 7, + "refusal_controls": [ + "g16g with obsolete Air variable=1" + ], + "refusal_controls_passed": 1, + "validation_layer": "VK_LAYER_KHRONOS_validation", + "validation_errors": 0, + "gpu_submissions": 0, + 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mesa:asahi-g17p-submit-retirement-split-pending", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-split-completed", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-pending", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-completed", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-first-ioctl-failure", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-shadow-border", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-prepublication-no-fence", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-stale-output-generation", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-completed-error-fence", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-first-ioctl-partial", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-split-wait-error", + "result": "OK" + }, + { + "name": "asahi - mesa:hk-g17p-compressed-mip-blit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-mixed-wait-error", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-publication-probe-error", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-submit-retirement-interrupted-wait", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-submit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-submit", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-vertex-output-shapes", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-vertex-output-shapes", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-blit-encode", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-blit", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_scs_nir", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g17p-gallium-xfb-program", + "result": "OK" + }, + { + "name": "asahi - mesa:asahi-g13g-gallium-xfb-program", + "result": "OK" + }, + { + "name": "asahi - mesa:agx3_gen1_ray_query", + "result": "OK" + }, + { + "name": "asahi - mesa:hk_as_registry", + "result": "OK" + }, + { + "name": "asahi - mesa:agx_tests", + "result": "OK" + } + ], + "inner_suite_note": "The existing optional NativeFMA.ExactDyadicOracle GTest remains skipped." + }, + "quick_checks": { + "production_test_programs": 5, + "compression_policy_checks": 3359, + "source_tags": 211, + "preserved_compatibility_profiles": 6 + }, + "vulkan_drm_shim": { + "profiles": [ + "g13g", + "g15s", + "g15c", + "g17p", + "g15g opt-in=1" + ], + "passed": 5, + "refusal_controls": [ + "g15g opt-in unset", + "g15g opt-in=0", + "g16g opt-in=1" + ], + "refusal_controls_passed": 3, + "validation_layer": "VK_LAYER_KHRONOS_validation", + "validation_errors": 0, + "gpu_submissions": 0, + "covers": [ + "device and graphics pipeline creation", + "oversized cached BO placed mapping guard preservation", + "reserve unmap and remap", + "free while placed mapped", + "NULL transform feedback counters with valid pipeline and buffer", + "synthetic T8122 feature baseline and four allocator reservations", + "Air opt-in and held M4 device admission" + ] + }, + "kernel_abi": { + "repository": "https://github.com/omacom/linux-aurora", + "commit": "7b969982306e1498a8cbe6e5da9bde743acd8fc5", + "header": "include/uapi/drm/asahi_drm.h", + "matched": true, + "kernel_header": "asahi_drm.h", + "values": { + "params_size": 600, + "params_hal_offset": 596, + "queue_size": 40, + "vm_size": 24, + "submit_size": 40, + "vm_ioctl": 3222824002, + "queue_ioctl": 3223872584, + "submit_ioctl": 1076388938, + "per_command_syncs": 1024, + "vm_status_mirror": 2048, + "prior_barriers": 4096, + "fragment_barriers": 16384, + "ray_query": 32768, + "render_size": 448, + "render_prior_offset": 320, + "compute_size": 200, + "compute_scs_offset": 128, + "compute_prior_offset": 136 + }, + "differences": {}, + "negative_control": { + "repository": "https://github.com/iconidentify/siliconforest-linux", + "commit": "6a421d4e76ff282b414138182fd28597ebf20a18", + "header": "include/uapi/drm/asahi_m3_drm.h", + "rejected": true, + "differences": { + "per_command_syncs": { + "mesa": 1024, + "kernel": 8 + }, + "vm_status_mirror": { + "mesa": 2048, + "kernel": 16 + }, + "prior_barriers": { + "mesa": 4096, + "kernel": 32 + }, + "fragment_barriers": { + "mesa": 16384, + "kernel": 128 + }, + "ray_query": { + "mesa": 32768, + "kernel": 256 + }, + "render_size": { + "mesa": 448, + "kernel": 384 + }, + "render_prior_offset": { + "mesa": 320, + "kernel": 256 + }, + "compute_size": { + "mesa": 200, + "kernel": 136 + }, + "compute_scs_offset": { + "mesa": 128, + "kernel": 64 + }, + "compute_prior_offset": { + "mesa": 136, + "kernel": 72 + } + } + }, + "t8122_feature_baseline_source": "drivers/gpu/drm/asahi/m3/m3_drm.rs Backend::feature_flags at the pinned Aurora commit" + }, + "mutants": [ + { + "name": "gate-open", + "compiled": true, + "returncode": -6, + "killed": true, + "assertion": "gate-open: src/asahi/lib/tests/test-chip-admission.c:236: main: Assertion `!agx_chip_experimental_admitted(AGX_CHIP_G15G)' failed." + }, + { + "name": "air-cap-removed", + "compiled": true, + "returncode": -6, + "killed": true, + "assertion": "air-cap-removed: src/asahi/lib/tests/test-chip-admission.c:254: main: Assertion `start == UINT64_C(0x4000000000) && end == UINT64_C(0x6000000000)' failed." + }, + { + "compiled": true, + "returncode": 1, + "killed": true, + "mutation": "Encode float image writes as integer on both chips" + } + ], + "evidence_sha256": { + "configure.log": "ef6b5c01e3e930591510ffb60863d3c72c76b6c92140bba7507ae6a55e588042", + "build-verified.log": "18d35f0afbb1a8810a1597873655aae9dbcd0b5f40950f80815781b22ddf4536", + "asahi-tests-verified.log": "d3be5588f0d06a05070899fac56032b9b0b1c880cba53a4bad7a0fff0f91503e", + "drm-smoke-verified.log": "59d75250e08ed408699be997b5870fbcfa82c9fd7de03825232c77b3497dca77", + "quick-check-verified.log": "78f4a3ac4a020cbf31466ecc45fae6ff561245ae3ba1cc8157805e0ee14dfd3c", + "kernel-abi.json": "815bdd9bca1fcf4cc0b712bc227b0f7c44ee19a0060cc45f1b041e539f3f8016", + "kernel-abi-negative.json": "c49c7879660d21f27d8d366780dc76fd1004917b41b4276885c3247cac994a46", + "air-mutation-controls.json": "6074d71542829d37093e17e9fc3bc37fa65f6089ddde7e48b462efc4345ecba3", + "compiler-type-mutant.json": "5d031c451a304034edcaeb407d2b3dbc0dd219e79d3b9c84265f917b825a4d6e", + "compiler-type-mutant.log": "3e6de8434f91bcf950847e2a1651a472c28aad48d74d8b7c1973fbdd37fdfb2a" + }, + "hardware_qualified": false, + "system_install_performed": false, + "not_run": [ + "physical Apple GPU execution on this integration", + "AArch64 package build or deployment", + "full OpenGL or Vulkan CTS", + "M1/M2/M3 hardware regressions", + "revised T8122 J613 texture/MSAA/compute/desktop tests", + "T8122 HAL200 and J615 qualification", + "matched Quake FPS benchmark" + ], + "private_sources_in_this_repository": false + } + ], + "mutant_scope": "Earlier controls for unchanged Air cap and image-write compiler code; original run retained under previous_runs. The removed environment gate is no longer a current refusal policy." +} diff --git a/SILICONFOREST-VALIDATION.md b/SILICONFOREST-VALIDATION.md new file mode 100644 index 000000000000..9710dfa14329 --- /dev/null +++ b/SILICONFOREST-VALIDATION.md @@ -0,0 +1,157 @@ +# SiliconForest Mesa validation + +## Retained Omacom G15 wire follow-up + +The first physical J516S attempt of the integration below found that +`omacom/linux-aurora@7b969982306e` still returns the separate G15 `0x3e` +contract, not the canonical high-bit contract. The admission check stopped +before VM creation; the old Mesa and default kernel were restored. The +canonical-header comparison below was insufficient to establish G15 backend +compatibility. + +`agx_g15_wire.c` now selects the exact retained G15S/G15C signatures, normalizes +their feature assignments and converts every hardware packet into the backend's +actual layout. Nonzero timestamp-copy slots and unknown signatures/packets fail +closed. Air, G17, M1/M2 and virtio retain their existing packet paths. See +[the contract and qualification notes](SILICONFOREST-G15-WIRE.md). + +The updated x86_64 and native ARM64 builds pass **92 registered Asahi tests**, including exact +feature-signature, packet/prior/barrier, truncation and timestamp-copy refusal +controls. All three available Macs passed installed-Mesa reboot, compositor, +display and independent OpenGL ES/Vulkan pixel checks at source +`97a65d845f39418aecc693dcaf9dcb14a05849f6`. + +| Machine | Kernel retained after qualification | 1080p Quake median, three runs | +| --- | --- | --- | +| J516S M3 Pro | `7.2.11-mixtape-77648eb77168-g15` | **184.7 FPS** | +| J313 M1 Air | `7.2.11-lab182-205f5e8b20fc-normal` | **512.8 FPS** | +| J293 13-inch M1 | `7.2.11-lab182-205f5e8b20fc-normal` | **490.0 FPS** | + +The exact same seven ARM64 ELF payloads are installed on all three. M1 package +variants change only profile/runtime-owner metadata. All selected pixel loops +were correct and no GPU/DART fault was observed during these checks. The M3 +also passed reboot/readbacks and measured 185.8 FPS on the one-shot kernel built +from `7b969982306e`. That normal lab job remains **TESTS_FAILED**: OMT 0.1.13 +flagged two regressions against its historical 7.1.12 reference, checking only +the `asahi` binding rather than the observed `asahi-g15` binding, and requiring +literal package names replaced by the qualification package. Other OMT GPU +reporting discrepancies are recorded, not declared fixed. No gate was bypassed. + +The M3's fresh pre-upgrade median was 152.0 FPS on its usual kernel; its normal +kernel repeat is about 21.5% faster. These short samples do not isolate every +session effect, qualify sustained behavior, establish a memory-readiness cause, +or remove the substantial gap to M1. The J293's initial 57 FPS session stayed +slow with an isolated new Vulkan library and recovered after reboot; do not +claim a ninefold Mesa speedup. + +The updated Mesa remains installed on each Mac, their original default kernels +and protected boot files are intact, and the qualification timers are removed. +No full CTS or J613/J615 revised-layout qualification is claimed. Details, +source/package hashes, complete samples and limitations are in +[the hardware receipt](SILICONFOREST-HARDWARE-20261024.json). The original +receipts below describe the earlier integration head, not this source change. + +## Earlier October 24 host-only checkpoint + +Tested source: **`aefe5c2dd1525e37e0d329fdf39595dc25abbbcd`**. +Later validation-only documentation does not change the tested driver subtrees. + +| Check | Result | +| --- | --- | +| Asahi/Zink OpenGL, Honeykrisp Vulkan, GLX/EGL/GBM, matched shader tools | Built on x86_64 with GCC 16.2.1, LLVM 22.1.8 and Meson 1.10.2 | +| Complete registered Asahi host suite | **91 passed, 0 failed**; existing optional FMA oracle subtest remains skipped | +| Standalone CPU programs and provenance | **5 passed**, 3,359 compression checks, 211 exact public tags and six preserved compatibility refs | +| Vulkan device/pipeline/placed-map/XFB probes | **7 passed**: G13G, G15S, G15C, G17P and G15G with its obsolete opt-in unset, `0` and `1` | +| Vulkan refusal controls | **1 passed**: held G16G with the obsolete Air opt-in set | +| Khronos validation | **0 errors**, **0 GPU submissions** across those eight probes | +| Unified Aurora kernel contract | **18 wire facts match** `7b969982306e1498a8cbe6e5da9bde743acd8fc5`; old SiliconForest native header rejected with ten differences | +| Deliberate negative mutations | Earlier removed Air address-cap and float-as-integer image-write mutations compile and are caught; unchanged code, original receipts retained | +| Syntax and Git whitespace | Passed | + +The build uses the configuration below with `--buildtype=debugoptimized` and +`-Db_ndebug=false`. It uses private shader-tool dependencies and performs no +system installation. Build warnings are retained in the log; this is not a +warning-free build claim. + +G15G is now admitted without a Mesa environment opt-in for its exact supported +identity and firmware/kernel contract. Kernel and package switch-on is separate. +The G15G drm-shim identity is synthetic. Its baseline features match the Air +runtime's VM_STATUS/SCHEDULED_QUEUES contract; it refuses binds into the four +reserved ranges. It exercises host allocation and pipeline setup without +executing a shader. At that earlier checkpoint, the revised Air layout, +physical M1/M2/M3 regressions, AArch64 package, full CTS, desktop stability and +FPS changes remained untested. That host-only checkpoint changed no kernel, +firmware, m1n1, system package or boot setting. Later hardware work is above. + +The host run exposed stale expectations for G15G wide barriers and held M4 +admission, plus a compiler fixture comparing unrelated chip schedules. The +corrected compiler fixture retains all type/format cases, compares the single +image-write packet, and checks its data-type bit independently; a deliberate +wrong-type compiler mutation fails it. No production compiler change was made. + +Exact tree IDs, pinned sources, evidence hashes and the earlier baseline are in +[SILICONFOREST-VALIDATION.json](SILICONFOREST-VALIDATION.json). + +## October 18 baseline + +Validated source: **`3cca5b305cda31558540dbba86f0074568a4cb27`**. +Later documentation and provenance-helper commits do not change driver source. +Machine-readable results and exact driver subtree IDs are in +[SILICONFOREST-VALIDATION.json](SILICONFOREST-VALIDATION.json). + +| Check | Result | +| --- | --- | +| Asahi/Zink shared Gallium driver, Honeykrisp shared Vulkan driver, GLX/EGL/GBM | Built successfully on x86_64 Linux | +| Tree-matched shader compiler tools and Asahi drm-shim | Built successfully | +| Complete registered Asahi host suite | **36 passed, 0 failed** | +| Quick production CPU test programs | **4 passed**, including **3,035** compression-policy checks | +| Public provenance / compatibility profile validation | **209** exact tags and **6** public source profiles checked | +| Native experimental kernel wire ABI | **18** selected ioctl/layout/feature facts matched | +| Maintained legacy kernel negative control | Rejected with **10** differing facts | +| Host Vulkan device/pipeline/mapping/XFB probes | **4 passed**: G13G, G15S, G15C and G17P drm-shim identities | +| Same Vulkan probes with Khronos validation enabled | **4 passed**, **0 validation errors**, **0 GPU submissions** | +| Build helper shell syntax / ShellCheck, Python syntax, Git whitespace | Passed | + +The host Vulkan probe primes the BO cache with an oversized allocation, maps a +smaller allocation at a reserved address, checks the following guard page, +reserves/remaps it, and frees it while mapped. It also records NULL counter +arrays inside rendering with a bound XFB-capable pipeline and feedback buffer. +It creates and compiles a graphics pipeline but never submits a command buffer. +The embedded shader header is generated from the adjacent GLSL source. + +The build used GCC 16.2.1, LLVM/Clang 22.1.8, Meson 1.10.2, Mako 1.3.10 and +PLY 3.11. Shader compiler dependencies were provided from a private build prefix, +without installing Mesa or changing system packages. Configuration: + +```sh +meson setup BUILD SOURCE \ + -Dgallium-drivers=asahi,zink,softpipe -Dvulkan-drivers=asahi \ + -Dplatforms=x11,wayland -Dglx=dri -Degl=enabled -Dgbm=enabled \ + -Dglvnd=disabled -Dllvm=enabled -Dbuild-tests=true \ + -Dtools=asahi,drm-shim -Dmesa-clc=enabled -Dprecomp-compiler=enabled \ + -Dvideo-codecs= -Dgallium-va=disabled +python3 tools/siliconforest/build-targets.py BUILD +meson test -C BUILD --no-rebuild --suite asahi --print-errorlogs +python3 tools/siliconforest/check.py --check-git +python3 tools/siliconforest/check-kernel-abi.py PATH_TO_SILICONFOREST_LINUX +VK_INSTANCE_LAYERS=VK_LAYER_KHRONOS_validation \ + python3 tools/siliconforest/drm-smoke.py BUILD +``` + +`build-targets.py` includes all registered Asahi test dependencies, including +executables launched through the Python drm-shim wrapper. It does not build or +run unrelated Mesa-wide tests. The shader compiler tools are built from this +source tree, rather than reused from an older Mesa build. + +The stale 88-byte compute assertion was corrected against the actual 136-byte +kernel payload, retaining explicit field-offset checks. The ray-traversal +fixture now reads output lengths after encoding, eliminating an unsequenced C +read/write; all **611** checks and their expected instruction bytes are retained. +The generic drm-shim mmap wrapper now forwards the requested address, enabling +real `MAP_FIXED` mapping coverage instead of accidentally requesting address zero. + +No physical Apple GPU, full OpenGL/Vulkan CTS, compositor, games, firmware +recovery, AArch64 deployment or virtio execution was qualified. The six other +source profiles were preserved, not built or tested by this run. No system Mesa +installation, kernel-option change, m1n1 replacement or reboot was performed. +Private-source work remains local as instructed. diff --git a/src/asahi/clc/asahi_clc.c b/src/asahi/clc/asahi_clc.c index 9be7a82c253f..a1fe94414749 100644 --- a/src/asahi/clc/asahi_clc.c +++ b/src/asahi/clc/asahi_clc.c @@ -25,7 +25,7 @@ #include "util/macros.h" #include -const char *targets[] = {"g13g", "g13x", "g17p", "g15s", "g16g"}; +const char *targets[] = {"g13g", "g13x", "g17p", "g15s", "g15g", "g16g"}; #define foreach_target(target) \ for (const char **target = &targets[0]; \ @@ -38,6 +38,8 @@ target_chip(const char *target) return AGX_CHIP_G17P; else if (!strcmp(target, "g15s")) return AGX_CHIP_G15S; + else if (!strcmp(target, "g15g")) + return AGX_CHIP_G15G; else if (!strcmp(target, "g16g")) return AGX_CHIP_G16G; else if (!strcmp(target, "g13x")) diff --git a/src/asahi/compiler/test/test-native-form-regressions.cpp b/src/asahi/compiler/test/test-native-form-regressions.cpp index c452adce6bb7..358b7aa42287 100644 --- a/src/asahi/compiler/test/test-native-form-regressions.cpp +++ b/src/asahi/compiler/test/test-native-form-regressions.cpp @@ -1055,11 +1055,27 @@ TEST(NativeForms, ImageStoreUsesDataTypeAcrossChipsAndFormats) ASSERT_TRUE(agx_compile_shader_nir(b.shader, &key, &part)); ASSERT_GT(part.info.binary_size, 0u); const uint8_t *code = static_cast(part.binary); - std::vector binary(code, code + part.info.binary_size); + /* Compare the image-write packet, not unrelated register copies + * and scheduling in the two chip profiles. imgwci.ep0 is 16 bytes; + * its fixed opcode bytes are pinned by agx3_tex_encode_image_write_2d. + * This small shader must contain exactly one such instruction. */ + std::vector write; + for (unsigned i = 0; i + AGX3_IMAGE_WRITE_LENGTH <= part.info.binary_size; + i += 2) { + if (code[i] == 0xd7 && code[i + 2] == 0x54) { + ASSERT_TRUE(write.empty()); + write.assign(code + i, code + i + AGX3_IMAGE_WRITE_LENGTH); + } + } + ASSERT_EQ(write.size(), AGX3_IMAGE_WRITE_LENGTH); + /* f70 is the float-versus-integer data bit, encoded at byte 13 bit 5. + * Check the expected type independently of cross-chip equivalence. */ + EXPECT_EQ((write[13] >> 5) & 1, + nir_alu_type_get_base_type(c.type) == nir_type_float); if (reference.empty()) - reference = binary; + reference = write; else - EXPECT_EQ(binary, reference); + EXPECT_EQ(write, reference); free(part.binary); ralloc_free(b.shader); } diff --git a/src/asahi/drm-shim/asahi_noop.c b/src/asahi/drm-shim/asahi_noop.c index a77b64ad9395..ec957799c63a 100644 --- a/src/asahi/drm-shim/asahi_noop.c +++ b/src/asahi/drm-shim/asahi_noop.c @@ -68,7 +68,9 @@ static const struct drm_asahi_params_global params_g13g = { * shader and command-stream paths can be exercised without hardware. */ static const struct drm_asahi_params_global params_g17p = { - .features = DRM_ASAHI_FEATURE_SOFT_FAULTS, + .features = DRM_ASAHI_FEATURE_SOFT_FAULTS | + DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS | + DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS, .gpu_generation = 17, .gpu_variant = 'P', .gpu_revision = 0, @@ -154,14 +156,16 @@ static const struct drm_asahi_params_global params_g15s = { * T6031 / M3 Max: the same G15 generation as T6030 with twice the clusters. * One die, four clusters of ten cores (the 40-core part, every core present), * revision B2 (0x12), AGX3 shaders on the legacy firmware interface, and the - * top GPU clock of the J516C, 1380 MHz. No optional feature is reported, so + * top GPU clock of the J516C, 1380 MHz. Only the native ABI contract bits are + * reported by default, so * the driver takes its baseline submission paths; the ASAHI_SHIM_* feature * switches add bits on top. Submissions go through the same packet rules and * stream gate as G15S, and the same per-VM kernel range is refused for binds. * Select with ASAHI_SHIM_CHIP=g15c. */ static const struct drm_asahi_params_global params_g15c = { - .features = 0, + .features = DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS | + DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS, .gpu_generation = 15, .gpu_variant = 'C', .gpu_revision = 0x12, @@ -181,6 +185,30 @@ static const struct drm_asahi_params_global params_g15c = { .gpu_hal_generation = DRM_ASAHI_GPU_HAL_LEGACY, }; +/* Synthetic G15G contract for host-only device/allocator checks. The feature + * baseline matches Aurora m3_drm.rs; this is not a hardware execution model. */ +static const struct drm_asahi_params_global params_g15g = { + .features = DRM_ASAHI_FEATURE_VM_STATUS | + DRM_ASAHI_FEATURE_SCHEDULED_QUEUES, + .gpu_generation = 15, + .gpu_variant = 'G', + .gpu_revision = 0x20, + .chip_id = 0x8122, + .num_dies = 1, + .num_clusters_total = 1, + .num_cores_per_cluster = 10, + .core_masks = {0x3ff}, + .vm_start = 0x4000, + .vm_end = 0x2ffffff8000ull, + .vm_kernel_min_size = 0x20000000, + .max_commands_per_submission = 64, + .max_attachments = 16, + .max_frequency_khz = 618000, + .command_timestamp_frequency_hz = 1000000000, + .usc_generation = 3, + .gpu_hal_generation = DRM_ASAHI_GPU_HAL_LEGACY, +}; + /* QUEUE_LIMITS (group 2) of the M3 kernel. */ static const struct drm_asahi_queue_limits queue_limits_g15s = { .max_queues = 58, @@ -201,6 +229,8 @@ shim_params(void) return ¶ms_g17p; if (chip && !strcmp(chip, "g15s")) return ¶ms_g15s; + if (chip && !strcmp(chip, "g15g")) + return ¶ms_g15g; if (chip && !strcmp(chip, "g15c")) return ¶ms_g15c; if (chip && !strcmp(chip, "g16g")) @@ -1241,6 +1271,19 @@ asahi_ioctl_vm_bind_unlocked(int fd, unsigned long request, void *arg) return -EINVAL; } + if (params == ¶ms_g15g && + (range_overlaps(start, op->range, UINT64_C(0x7000000000), + UINT64_C(0x1000000000)) || + range_overlaps(start, op->range, UINT64_C(0x10080000000), + UINT64_C(0x80000000)) || + range_overlaps(start, op->range, UINT64_C(0x1000000000), + UINT64_C(0x8000000)) || + range_overlaps(start, op->range, UINT64_C(0x1074000000), + UINT64_C(0x28000)))) { + fprintf(stderr, "shim: gem_bind overlaps a T8122 runtime reservation\n"); + return -EINVAL; + } + if (shim_g15_kernel() && range_overlaps(start, op->range, SHIM_G15S_KERNEL_VA_START, SHIM_G15S_KERNEL_VA_END - diff --git a/src/asahi/genxml/agx3_cmdstream.h b/src/asahi/genxml/agx3_cmdstream.h index 63b329abf611..32b39ed1d2b2 100644 --- a/src/asahi/genxml/agx3_cmdstream.h +++ b/src/asahi/genxml/agx3_cmdstream.h @@ -596,8 +596,8 @@ agx3_cdm_barrier_wide_visibility_grounded(enum agx_chip chip) { /* G15C (M3 Max) is G15S's generation with more clusters and takes the * same forms. */ - return chip == AGX_CHIP_G15S || chip == AGX_CHIP_G15C || - chip == AGX_CHIP_G16G; + return chip == AGX_CHIP_G15G || chip == AGX_CHIP_G15S || + chip == AGX_CHIP_G15C || chip == AGX_CHIP_G16G; } #define AGX3_CDM_BARRIER_WIDE_VISIBILITY UINT32_C(0x0002009e) diff --git a/src/asahi/genxml/tests/test-agx3-packing.c b/src/asahi/genxml/tests/test-agx3-packing.c index 7c80741b5735..22d5c2aece90 100644 --- a/src/asahi/genxml/tests/test-agx3-packing.c +++ b/src/asahi/genxml/tests/test-agx3-packing.c @@ -900,6 +900,7 @@ test_agx3_cdm_barrier(void) /* The wide-visibility form: the G15 parts on the native path and G16G * pack and decode it; other chips refuse it in both directions. */ const enum agx_chip wide[] = { + AGX_CHIP_G15G, AGX_CHIP_G15S, AGX_CHIP_G15C, AGX_CHIP_G16G, @@ -921,7 +922,6 @@ test_agx3_cdm_barrier(void) } const enum agx_chip narrow[] = { - AGX_CHIP_G15G, AGX_CHIP_G15D, AGX_CHIP_G17P, }; diff --git a/src/asahi/lib/agx3_cdm_direct_launch_semantic_core.c b/src/asahi/lib/agx3_cdm_direct_launch_semantic_core.c index 9f69d3c7ecd1..f1cd82447ac2 100644 --- a/src/asahi/lib/agx3_cdm_direct_launch_semantic_core.c +++ b/src/asahi/lib/agx3_cdm_direct_launch_semantic_core.c @@ -153,8 +153,8 @@ agx3_cdm_direct_dimension_word(uint8_t dimensions, uint32_t *word) static bool agx3_cdm_direct_g15x_bit31_allowed(enum agx_chip chip) { - return chip == AGX_CHIP_G15S || chip == AGX_CHIP_G15C || - chip == AGX_CHIP_G15D; + return chip == AGX_CHIP_G15G || chip == AGX_CHIP_G15S || + chip == AGX_CHIP_G15C || chip == AGX_CHIP_G15D; } bool diff --git a/src/asahi/lib/agx_chip.c b/src/asahi/lib/agx_chip.c index 975de1c47ce1..1cf859a0a99f 100644 --- a/src/asahi/lib/agx_chip.c +++ b/src/asahi/lib/agx_chip.c @@ -257,6 +257,7 @@ agx_chip_driver_supported(enum agx_chip chip) agx_chip_sampler_generation(chip) == AGX_SAMPLER_GENERATION_GEN4_HAL200 && agx_chip_submission_model(chip) == AGX_SUBMISSION_MODEL_DUAL; + case AGX_CHIP_G15G: case AGX_CHIP_G15S: case AGX_CHIP_G15C: return agx_chip_command_stream_generation(chip) == @@ -282,7 +283,8 @@ agx_params_driver_supported(const struct drm_asahi_params_global *params) return false; const enum agx_chip chip = agx_chip_from_params(params); - if (!agx_chip_driver_supported(chip)) + if (!agx_chip_driver_supported(chip) || params->chip_id == 0x6040 || + params->chip_id == 0x8132) return false; switch (chip) { @@ -298,6 +300,14 @@ agx_params_driver_supported(const struct drm_asahi_params_global *params) params->usc_generation == AGX_ISA_AGX3 && params->gpu_hal_generation == DRM_ASAHI_GPU_HAL_200; } + case AGX_CHIP_G15G: + /* T8122/M3: one die, one cluster, AGX3 shaders on the legacy firmware + * interface (14.8.3), through the kernel's T8122 runtime. The exact + * identity/runtime checks apply without a Mesa environment opt-in. */ + return params->chip_id == 0x8122 && params->num_dies == 1 && + params->num_clusters_total == 1 && + params->usc_generation == AGX_ISA_AGX3 && + params->gpu_hal_generation == DRM_ASAHI_GPU_HAL_LEGACY; case AGX_CHIP_G15S: /* T6030/M3 Pro: one die, two clusters, AGX3 shaders on the legacy * (pre-HAL200) firmware interface. */ @@ -323,6 +333,33 @@ agx_params_driver_supported(const struct drm_asahi_params_global *params) } } +/* G15G uses the separately admitted T8122 runtime: its baseline advertises + * VM_STATUS and SCHEDULED_QUEUES, not exact-prior barriers. Other native + * profiles use the unified high-bit prior-command contract. Refuse a known + * mismatch before VM creation; these checks are not general ABI negotiation. + */ +bool +agx_params_native_kernel_abi_supported( + const struct drm_asahi_params_global *params) +{ + if (!params) + return false; + + const enum agx_chip chip = agx_chip_from_params(params); + if (!agx_chip_native_agx3(chip)) + return true; + + if (chip == AGX_CHIP_G15G) { + const uint64_t required = DRM_ASAHI_FEATURE_VM_STATUS | + DRM_ASAHI_FEATURE_SCHEDULED_QUEUES; + return (params->features & required) == required; + } + + const uint64_t required = DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS | + DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS; + return (params->features & required) == required; +} + const char * agx_chip_exact_product_name(enum agx_chip chip) { diff --git a/src/asahi/lib/agx_chip.h b/src/asahi/lib/agx_chip.h index 79e351398db0..ed8698de3446 100644 --- a/src/asahi/lib/agx_chip.h +++ b/src/asahi/lib/agx_chip.h @@ -172,8 +172,9 @@ enum agx_submission_model { static inline bool agx_chip_native_agx3(enum agx_chip chip) { - return chip == AGX_CHIP_G15S || chip == AGX_CHIP_G15C || - chip == AGX_CHIP_G16G || chip == AGX_CHIP_G17P; + return chip == AGX_CHIP_G15G || chip == AGX_CHIP_G15S || + chip == AGX_CHIP_G15C || chip == AGX_CHIP_G16G || + chip == AGX_CHIP_G17P; } /* The chip whose record encodings GPU-generated (libagx) command-stream @@ -340,7 +341,8 @@ agx_chip_has_native_render_context(enum agx_chip chip) static inline bool agx_chip_native_indirect_compute(enum agx_chip chip) { - return chip == AGX_CHIP_G17P || chip == AGX_CHIP_G15S || + return chip == AGX_CHIP_G17P || chip == AGX_CHIP_G15G || + chip == AGX_CHIP_G15S || chip == AGX_CHIP_G15C || chip == AGX_CHIP_G16G; } @@ -423,7 +425,8 @@ agx_chip_explicit_robust_image_bounds(enum agx_chip chip) static inline bool agx_chip_native_imageblock(enum agx_chip chip) { - return chip == AGX_CHIP_G17P || chip == AGX_CHIP_G15S || + return chip == AGX_CHIP_G17P || chip == AGX_CHIP_G15G || + chip == AGX_CHIP_G15S || chip == AGX_CHIP_G15C || chip == AGX_CHIP_G16G; } @@ -530,6 +533,10 @@ bool agx_chip_driver_supported(enum agx_chip chip); bool agx_params_driver_supported( const struct drm_asahi_params_global *params); +/* Reject the known incompatible pre-unification native kernel contract. */ +bool agx_params_native_kernel_abi_supported( + const struct drm_asahi_params_global *params); + /* Exact product name when the chip identity maps to one unambiguous SoC. * Variant letters are not marketing tiers: notably, G17P is A18 Pro rather * than an M5 variant. Returns NULL when one chip identity spans products. */ diff --git a/src/asahi/lib/agx_device.c b/src/asahi/lib/agx_device.c index de4a33a8ffb4..230b3488a459 100644 --- a/src/asahi/lib/agx_device.c +++ b/src/asahi/lib/agx_device.c @@ -23,6 +23,7 @@ #include "agx_bo.h" #include "agx_compile.h" #include "agx_device_virtio.h" +#include "agx_g15_wire.h" #include "agx_scratch.h" #include "decode.h" #include "glsl_types.h" @@ -716,6 +717,36 @@ static int agx_submit(struct agx_device *dev, struct drm_asahi_submit *submit, struct agx_submit_virt *virt) { + if (dev->g15_legacy_wire) { + /* Preserve the caller's command buffer and syncs. The kernel reads + * this temporary command buffer synchronously during the ioctl. */ + if (!submit->cmdbuf_size || submit->cmdbuf_size > (4u << 20)) { + errno = EINVAL; + return -1; + } + void *wire = malloc(submit->cmdbuf_size); + if (!wire) { + errno = ENOMEM; + return -1; + } + size_t size; + bool ok = agx_g15_wire_pack((void *)(uintptr_t)submit->cmdbuf, + submit->cmdbuf_size, wire, + submit->cmdbuf_size, &size); + if (!ok) { + free(wire); + errno = EINVAL; + return -1; + } + struct drm_asahi_submit packed = *submit; + packed.cmdbuf = (uintptr_t)wire; + packed.cmdbuf_size = size; + int ret = drmIoctl(dev->fd, DRM_IOCTL_ASAHI_SUBMIT, &packed); + int saved_errno = errno; + free(wire); + errno = saved_errno; + return ret; + } return drmIoctl(dev->fd, DRM_IOCTL_ASAHI_SUBMIT, submit); } @@ -884,6 +915,14 @@ agx_open_device(void *memctx, struct agx_device *dev) dev->chip = agx_chip_from_params(&dev->params); + uint64_t normalized_features; + dev->g15_legacy_wire = false; + if (!dev->is_virtio && + agx_g15_wire_features(&dev->params, &normalized_features)) { + dev->g15_legacy_wire = true; + dev->params.features = normalized_features; + } + /* * Recognition, shader codegen, descriptors and the command stream are * independently versioned. A part is usable only once every required axis @@ -934,6 +973,15 @@ agx_open_device(void *memctx, struct agx_device *dev) goto fail; } + if (!agx_params_native_kernel_abi_supported(&dev->params)) { + fprintf(stderr, + "Incompatible native AGX3 kernel contract (features %#llx); " + "use the kernel matched to this Mesa build; see its " + "compatibility documentation\n", + (unsigned long long)dev->params.features); + goto fail; + } + /* The M4 Pro runs as G17P too; it takes the M-series name below. */ const char *product = dev->params.chip_id == 0x8140 ? agx_chip_exact_product_name(dev->chip) @@ -1044,6 +1092,9 @@ agx_open_device(void *memctx, struct agx_device *dev) } uint64_t shader_size = 0x100000000ull; + /* T8122: only the lower half of the 2^40 window is free. */ + if (dev->chip == AGX_CHIP_G15G) + shader_size = AGX_T8122_RUNTIME_WINDOW_HIGH - dev->shader_base; /* * Where the user heap goes relative to the USC window. @@ -1121,9 +1172,10 @@ agx_open_device(void *memctx, struct agx_device *dev) /* G17P is bounded by the narrower of the compact VDM aperture and the * absolute USC texture/sampler table pointer, both of which sit below the - * USC window. Other chips retain the kernel-reported user limit. */ + * USC window, and T8122 additionally by its runtime's reservation. Other + * chips retain the kernel-reported user limit. */ const uint64_t user_limit = - heap_below_usc ? AGX_G17P_USER_LIMIT : vm_create.kernel_start; + agx_va_user_limit(dev->chip, heap_below_usc, vm_create.kernel_start); uint64_t user_size = user_limit - user_start; int ret = dev->ops.simple_ioctl(dev, DRM_IOCTL_ASAHI_VM_CREATE, &vm_create); @@ -1211,6 +1263,16 @@ agx_open_device(void *memctx, struct agx_device *dev) } if (agx_chip_native_agx3(dev->chip)) initialized |= AGX_INIT_ALIAS_HEAP; + /* The compact alias heap starts inside the T8122 runtime USC base; keep + * out of it (the rest of that range is already outside the heap). */ + if (dev->chip == AGX_CHIP_G15G && + !util_vma_heap_alloc_addr(&dev->g17p_vdm_alias_heap, + AGX_G17P_VDM_ALIAS_BASE, + AGX_G17P_VDM_ALIAS_RESERVED_START - + AGX_G17P_VDM_ALIAS_BASE)) { + fprintf(stderr, "Failed to reserve the T8122 runtime USC base\n"); + goto fail; + } if (!agx_va_reserve_runtime_graph_hole( dev->chip, &dev->main_heap, user_start, user_size, @@ -1244,6 +1306,9 @@ agx_open_device(void *memctx, struct agx_device *dev) dev->libagx_programs = libagx_g13g; } else if (dev->chip == AGX_CHIP_G17P) { dev->libagx_programs = libagx_g17p; + } else if (dev->chip == AGX_CHIP_G15G) { + /* Its own build: G15G needs the scheduling stalls G15S does not. */ + dev->libagx_programs = libagx_g15g; } else if (dev->chip == AGX_CHIP_G15S || dev->chip == AGX_CHIP_G15C) { /* G15C executes the same AGX3B encoding as G15S with no extra * scheduling rules, so it runs the G15S build of the programs. */ diff --git a/src/asahi/lib/agx_device.h b/src/asahi/lib/agx_device.h index 320cdcc0f8aa..346ff65a8682 100644 --- a/src/asahi/lib/agx_device.h +++ b/src/asahi/lib/agx_device.h @@ -155,6 +155,7 @@ struct agx_device { char name[64]; struct drm_asahi_params_global params; + bool g15_legacy_wire; bool is_virtio; /* Native DRM 0.2 added the four render resource-specifier high dwords. * Stock 0.0 kernels do not consume an oversized render packet's tail. */ diff --git a/src/asahi/lib/agx_g15_wire.c b/src/asahi/lib/agx_g15_wire.c new file mode 100644 index 000000000000..496bcea207bb --- /dev/null +++ b/src/asahi/lib/agx_g15_wire.c @@ -0,0 +1,121 @@ +/* SPDX-License-Identifier: MIT */ +#include "agx_g15_wire.h" +#include "agx_chip.h" +#include "drm-uapi/asahi_drm.h" +#include + +/* Public contract: omacom/linux-aurora@7b969982306e, g15/wire.rs. + * Its render/compute prefixes end at 256/64, while canonical packets insert + * eight timestamp-copy records at those offsets. All remaining fields move + * by 64 bytes. Never reinterpret feature bits without also converting every + * hardware command. Air/G17 and virtio continue using the canonical wire. */ +_Static_assert(sizeof(struct drm_asahi_cmd_header) == 8, "command header"); +_Static_assert(sizeof(struct drm_asahi_cmd_render) == 320, "render base"); +_Static_assert(offsetof(struct drm_asahi_cmd_render, ts_frag_end_copies) == 256, + "render timestamp copies"); +_Static_assert(offsetof(struct drm_asahi_cmd_render_with_prior, prior_vdm) == 320, + "canonical render prior"); +_Static_assert(sizeof(struct drm_asahi_cmd_render_with_ray_query) == 448, + "canonical render extension"); +_Static_assert(sizeof(struct drm_asahi_cmd_compute) == 128, "compute base"); +_Static_assert(offsetof(struct drm_asahi_cmd_compute, ts_end_copies) == 64, + "compute timestamp copies"); +_Static_assert(offsetof(struct drm_asahi_cmd_compute_with_prior, scs_layout) == 128, + "canonical compute scratch"); +_Static_assert(sizeof(struct drm_asahi_cmd_compute_with_prior) == 200, + "canonical compute extension"); + +bool +agx_g15_wire_features(const struct drm_asahi_params_global *p, uint64_t *features) +{ + if (!p || !features || !agx_params_driver_supported(p)) + return false; + + enum agx_chip chip = agx_chip_from_params(p); + if (chip != AGX_CHIP_G15S && chip != AGX_CHIP_G15C) + return false; + + /* Exact signatures from feature_word(false/true) in g15/wire.rs. In + * particular, canonical bits 3..9 must not leak into normalized features. */ + if (p->features != UINT64_C(0x3e) && p->features != UINT64_C(0xbe)) + return false; + + *features = DRM_ASAHI_FEATURE_VM_STATUS | + DRM_ASAHI_FEATURE_INDEPENDENT_QUEUES | + DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS | + DRM_ASAHI_FEATURE_VM_STATUS_MIRROR | + DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS; + if (p->features & UINT64_C(0x80)) + *features |= DRM_ASAHI_FEATURE_FRAGMENT_BARRIERS; + return true; +} + +bool +agx_g15_wire_pack(const void *input, size_t input_size, + void *output, size_t output_capacity, size_t *output_size) +{ + if (!input || !output || !output_size || !input_size) + return false; + + const uint8_t *src = input; + uint8_t *dst = output; + size_t in = 0, out = 0; + while (in < input_size) { + struct drm_asahi_cmd_header h; + if (input_size - in < sizeof(h)) + return false; + memcpy(&h, src + in, sizeof(h)); + in += sizeof(h); + size_t size = h.size, prefix = 0; + if (size > input_size - in || size % 8) + return false; + + switch (h.cmd_type) { + case DRM_ASAHI_CMD_RENDER: + if (size != sizeof(struct drm_asahi_cmd_render) && + size != sizeof(struct drm_asahi_cmd_render_with_prior) && + size != sizeof(struct drm_asahi_cmd_render_with_ray_query)) + return false; + prefix = 256; + break; + case DRM_ASAHI_CMD_COMPUTE: + if (size != sizeof(struct drm_asahi_cmd_compute) && + size != sizeof(struct drm_asahi_cmd_compute_with_prior)) + return false; + prefix = 64; + break; + case DRM_ASAHI_SET_VERTEX_ATTACHMENTS: + case DRM_ASAHI_SET_FRAGMENT_ATTACHMENTS: + case DRM_ASAHI_SET_COMPUTE_ATTACHMENTS: + if (size % sizeof(struct drm_asahi_attachment)) + return false; + break; + default: + return false; + } + + if (prefix) { + for (size_t i = prefix; i < prefix + 64; ++i) { + if (src[in + i]) + return false; + } + h.size -= 64; + } + if (output_capacity - out < sizeof(h) || + output_capacity - out - sizeof(h) < h.size) + return false; + memcpy(dst + out, &h, sizeof(h)); + out += sizeof(h); + if (prefix) { + memcpy(dst + out, src + in, prefix); + memcpy(dst + out + prefix, src + in + prefix + 64, + size - prefix - 64); + } else { + memcpy(dst + out, src + in, size); + } + in += size; + out += h.size; + } + *output_size = out; + return true; +} diff --git a/src/asahi/lib/agx_g15_wire.h b/src/asahi/lib/agx_g15_wire.h new file mode 100644 index 000000000000..f45ec17a1931 --- /dev/null +++ b/src/asahi/lib/agx_g15_wire.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: MIT */ +#ifndef AGX_G15_WIRE_H +#define AGX_G15_WIRE_H + +#include +#include +#include + +struct drm_asahi_params_global; + +/* Omacom's retained G15 backend uses the Mesa-751 wire, not the canonical + * header's feature assignments or timestamp-copy slots. Identify only its + * exact supported parameter signatures, before VM creation. */ +bool agx_g15_wire_features(const struct drm_asahi_params_global *params, + uint64_t *features); + +/* Convert canonical packets into that wire in a separate output buffer. + * Removed timestamp-copy slots must be zero. Unknown/truncated packets fail; + * the caller must not submit the output on failure. No GPU access occurs. */ +bool agx_g15_wire_pack(const void *input, size_t input_size, + void *output, size_t output_capacity, size_t *output_size); + +#endif diff --git a/src/asahi/lib/agx_va_runtime_hole.h b/src/asahi/lib/agx_va_runtime_hole.h index df961c7d8098..49170dc8ce5f 100644 --- a/src/asahi/lib/agx_va_runtime_hole.h +++ b/src/asahi/lib/agx_va_runtime_hole.h @@ -15,6 +15,17 @@ #define AGX_G17_RUNTIME_GRAPH_VA_START UINT64_C(0x7000000000) #define AGX_G17_RUNTIME_GRAPH_VA_END UINT64_C(0x7100000000) +/* The T8122 (M3, G15G) kernel runtime reserves, in every VM, the top half of + * the 2^40 USC window, 0x7000000000 up to 0x8000000000, its own USC base at + * 0x1000000000-0x1008000000 and 0x1074000000-0x1074028000. A bind that touches + * one fails with EINVAL. These mirror Runtime::new_vm in + * drivers/gpu/drm/asahi/m3/m3_runtime.rs as of omacom/linux-aurora 4888ad0a0f + * (merged in be6381f9d2) by hand, until the kernel reports them. */ +#define AGX_T8122_RUNTIME_WINDOW_HIGH UINT64_C(0x10080000000) +#define AGX_T8122_RUNTIME_WINDOW_END UINT64_C(0x10100000000) +#define AGX_T8122_RUNTIME_RESERVED_START UINT64_C(0x7000000000) +#define AGX_T8122_RUNTIME_RESERVED_END UINT64_C(0x8000000000) + /* T8140's channel-owned AXFB aliases are installed by the kernel in * every render-capable client root. This range falls inside G17P's 4-GiB USC * heap, so userspace must remove it from the allocator before creating any @@ -86,6 +97,21 @@ (AGX_G17P_VDM_ALIAS_SIZE - \ (AGX_G17P_VDM_ALIAS_RESERVED_END - AGX_G17P_VDM_ALIAS_RESERVED_START)) +/* The exclusive top of the main heap and its sparse alias. Native AGX3 chips + * keep the heap below the USC window, bounded by the absolute 36-bit-shr(3) + * USC Texture/Sampler field (2^39) and, on G17P, the compact VDM aperture. On + * T8122 (G15G) it also stops below the runtime's 0x7000000000 reservation, + * which leaves the heap [0x4000000000, 0x5000000000) and its alias + * [0x5000000000, 0x6000000000). Other chips keep the kernel's limit. */ +static inline uint64_t +agx_va_user_limit(enum agx_chip chip, bool heap_below_usc, uint64_t kernel_start) +{ + if (!heap_below_usc) + return kernel_start; + return chip == AGX_CHIP_G15G ? AGX_T8122_RUNTIME_RESERVED_START + : AGX_G17P_USER_LIMIT; +} + /* * Reduce the kernel-reported user VA window to the power-of-two window the * driver actually allocates from, and derive the address bit that tells a diff --git a/src/asahi/lib/meson.build b/src/asahi/lib/meson.build index b416aa717e6c..a461fe7c3bac 100644 --- a/src/asahi/lib/meson.build +++ b/src/asahi/lib/meson.build @@ -34,6 +34,7 @@ libasahi_lib_files = files( 'agx_bo.c', 'agx_border.c', 'agx_chip.c', + 'agx_g15_wire.c', 'agx_device.c', 'agx_bytes.h', 'agx_linker.c', @@ -188,6 +189,17 @@ libasahi_lib = static_library( ) if with_tests + test('asahi-g15-wire', + executable('asahi-g15-wire', + files('tests/test-g15-wire.c'), + include_directories : [inc_include, inc_src, inc_asahi], + dependencies : [idep_agx_pack, idep_mesautil], + link_with : [libasahi_lib], + c_args : [c_msvc_compat_args], + gnu_symbol_visibility : 'hidden', + ), + suite : ['asahi'], + ) foreach rt_test : ['rt-bvh', 'rt-ift', 'scs-layout'] test('asahi-' + rt_test, executable('asahi-' + rt_test, diff --git a/src/asahi/lib/tests/test-chip-admission.c b/src/asahi/lib/tests/test-chip-admission.c index fa958f3db9c6..532be1c49646 100644 --- a/src/asahi/lib/tests/test-chip-admission.c +++ b/src/asahi/lib/tests/test-chip-admission.c @@ -7,9 +7,12 @@ #undef NDEBUG #include +#include #include #include "agx_chip.h" +#include "agx_va_runtime_hole.h" +#include "util/macros.h" static struct drm_asahi_params_global g15_params(char variant, uint32_t chip_id, uint32_t clusters) @@ -30,6 +33,29 @@ g15_params(char variant, uint32_t chip_id, uint32_t clusters) return params; } +static bool +overlaps(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1) +{ + return a0 < b1 && b0 < a1; +} + +/* The main heap and sparse alias agx_open_device derives for a native chip + * below the USC window (the same split and halving). */ +static void +native_user_window(enum agx_chip chip, uint64_t *start, uint64_t *end) +{ + const uint64_t limit = agx_va_user_limit(chip, true, UINT64_C(0x2f7ffff8000)); + uint64_t base = MAX2(UINT64_C(0x100000000), AGX_G17P_USER_LIMIT / 2); + uint64_t size = limit - base; + + assert(agx_va_split_user_window(base, size, &base, &size)); + while (size > 0 && base + 2 * size > limit) + size /= 2; + assert(size > 0); + *start = base; + *end = base + 2 * size; +} + static void check_native_g15(enum agx_chip chip) { @@ -46,11 +72,10 @@ main(void) { check_native_g15(AGX_CHIP_G15S); check_native_g15(AGX_CHIP_G15C); + check_native_g15(AGX_CHIP_G15G); /* The other M3 parts stay off the native path. */ - assert(!agx_chip_native_agx3(AGX_CHIP_G15G)); assert(!agx_chip_native_agx3(AGX_CHIP_G15D)); - assert(!agx_chip_driver_supported(AGX_CHIP_G15G)); assert(!agx_chip_driver_supported(AGX_CHIP_G15D)); /* T6030 and T6031 are each admitted with their own identity only. */ @@ -94,13 +119,51 @@ main(void) bad.num_clusters_total = 4; assert(!agx_params_driver_supported(&bad)); + /* The same GPU identity must not admit the incompatible legacy payloads. */ + assert(!agx_params_native_kernel_abi_supported(NULL)); + assert(!agx_params_native_kernel_abi_supported(&g15s)); + const uint64_t native = DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS | + DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS; + g15s.features = native; + g15c.features = native; + assert(agx_params_native_kernel_abi_supported(&g15s)); + assert(agx_params_native_kernel_abi_supported(&g15c)); + /* Extra advertised capabilities do not change this packet contract. */ + for (unsigned bit = 3; bit <= 16; ++bit) { + bad = g15c; + bad.features |= UINT64_C(1) << bit; + assert(agx_params_native_kernel_abi_supported(&bad)); + } + bad = g15c; + bad.features = (UINT64_C(1) << 3) | (UINT64_C(1) << 5); + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad = g15c; + bad.features &= ~DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS; + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad.features = DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS; + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad = (struct drm_asahi_params_global){ + .gpu_generation = 17, .gpu_variant = 'P', .num_clusters_total = 1, + .chip_id = 0x8140, .num_dies = 1, .usc_generation = 3, + .gpu_hal_generation = DRM_ASAHI_GPU_HAL_200, .features = native, + }; + assert(agx_params_driver_supported(&bad)); + assert(agx_params_native_kernel_abi_supported(&bad)); + bad.features = UINT64_C(0xfc00) | native; + assert(agx_params_native_kernel_abi_supported(&bad)); + bad.features = (UINT64_C(1) << 3) | (UINT64_C(1) << 5); + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad = (struct drm_asahi_params_global){ + .gpu_generation = 13, .gpu_variant = 'G', .num_clusters_total = 1, + }; + assert(agx_params_native_kernel_abi_supported(&bad)); /* The M4 Pro (T6040, G16S, AGX3, HAL200) runs as G17P with its two * clusters; other G16S identities stay G16S and unsupported. */ struct drm_asahi_params_global t6040 = g15_params('S', 0x6040, 2); t6040.gpu_generation = 16; t6040.gpu_hal_generation = DRM_ASAHI_GPU_HAL_200; assert(agx_chip_from_params(&t6040) == AGX_CHIP_G17P); - assert(agx_params_driver_supported(&t6040)); + assert(!agx_params_driver_supported(&t6040)); bad = t6040; bad.num_clusters_total = 3; @@ -121,6 +184,73 @@ main(void) assert(agx_chip_usc_helper_table_slots(AGX_CHIP_G17P, 6) == 6); assert(agx_chip_usc_helper_table_slots(AGX_CHIP_G17P, 10) == 10); + struct drm_asahi_params_global m4 = t6040; + m4.gpu_variant = 'G'; + m4.chip_id = 0x8132; + m4.num_clusters_total = 1; + assert(agx_chip_driver_supported(AGX_CHIP_G16G)); + assert(!agx_params_driver_supported(&m4)); + + /* T8122 (G15G) is admitted by default for its exact identity and + * supported legacy firmware/kernel contract. */ + struct drm_asahi_params_global g15g = g15_params('G', 0x8122, 1); + assert(agx_chip_from_params(&g15g) == AGX_CHIP_G15G); + assert(agx_params_driver_supported(&g15g)); + assert(!agx_params_native_kernel_abi_supported(&g15g)); + /* m3_drm.rs Backend::feature_flags: the Air runtime does not advertise + * PER_COMMAND_INPUT_SYNCS or EXACT_PRIOR_BARRIERS. */ + g15g.features = DRM_ASAHI_FEATURE_VM_STATUS | + DRM_ASAHI_FEATURE_SCHEDULED_QUEUES; + assert(agx_params_native_kernel_abi_supported(&g15g)); + bad = g15g; + bad.features &= ~DRM_ASAHI_FEATURE_VM_STATUS; + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad = g15g; + bad.features &= ~DRM_ASAHI_FEATURE_SCHEDULED_QUEUES; + assert(!agx_params_native_kernel_abi_supported(&bad)); + bad = g15g; + bad.features |= DRM_ASAHI_FEATURE_COMPUTE_WIDE_VISIBILITY; + assert(agx_params_native_kernel_abi_supported(&bad)); + bad = g15g; + bad.features = (UINT64_C(1) << 3) | (UINT64_C(1) << 5); + assert(!agx_params_native_kernel_abi_supported(&bad)); + + bad = g15g; + bad.chip_id = 0x6030; + assert(!agx_params_driver_supported(&bad)); + + bad = g15g; + bad.num_clusters_total = 2; + assert(!agx_params_driver_supported(&bad)); + + bad = g15g; + bad.gpu_hal_generation = DRM_ASAHI_GPU_HAL_200; + assert(!agx_params_driver_supported(&bad)); + + bad = g15g; + bad.usc_generation = 2; + assert(!agx_params_driver_supported(&bad)); + + /* T8122 (G15G): the heap and its sparse alias stay below 2^39, the + * absolute USC Texture/Sampler bound, and clear of every per-VM + * reservation of the kernel's T8122 runtime. */ + uint64_t start, end; + native_user_window(AGX_CHIP_G15G, &start, &end); + assert(start == UINT64_C(0x4000000000) && end == UINT64_C(0x6000000000)); + assert(end <= UINT64_C(1) << 39); + assert(!overlaps(start, end, AGX_T8122_RUNTIME_RESERVED_START, + AGX_T8122_RUNTIME_RESERVED_END)); + assert(!overlaps(start, end, UINT64_C(0x1000000000), + UINT64_C(0x1008000000))); + assert(!overlaps(start, end, UINT64_C(0x1074000000), + UINT64_C(0x1074028000))); + assert(!overlaps(start, end, AGX_T8122_RUNTIME_WINDOW_HIGH, + AGX_T8122_RUNTIME_WINDOW_END)); + + /* G15S keeps the G17P-derived limit, and non-native chips the kernel's. */ + assert(agx_va_user_limit(AGX_CHIP_G15S, true, 1) == AGX_G17P_USER_LIMIT); + assert(agx_va_user_limit(AGX_CHIP_G13G, false, 1234) == 1234); + printf("chip admission: ok\n"); return 0; } diff --git a/src/asahi/lib/tests/test-chip.cpp b/src/asahi/lib/tests/test-chip.cpp index 7b7539b9151a..bf6798699907 100644 --- a/src/asahi/lib/tests/test-chip.cpp +++ b/src/asahi/lib/tests/test-chip.cpp @@ -20,11 +20,14 @@ g16g_params() return params; } -TEST(AGXChip, G16GRequiresExactKernelContract) +TEST(AGXChip, G16GAdmissionHeldForHardwareQualification) { const drm_asahi_params_global valid = g16g_params(); ASSERT_EQ(agx_chip_from_params(&valid), AGX_CHIP_G16G); - ASSERT_TRUE(agx_params_driver_supported(&valid)); + /* Retain compiler capability coverage, but this M3 update does not + * qualify an M4 device for opening. */ + ASSERT_TRUE(agx_chip_driver_supported(AGX_CHIP_G16G)); + ASSERT_FALSE(agx_params_driver_supported(&valid)); EXPECT_FALSE(agx_params_driver_supported(nullptr)); for (unsigned field = 0; field < 7; ++field) { diff --git a/src/asahi/lib/tests/test-g15-wire.c b/src/asahi/lib/tests/test-g15-wire.c new file mode 100644 index 000000000000..4079d278ddc0 --- /dev/null +++ b/src/asahi/lib/tests/test-g15-wire.c @@ -0,0 +1,126 @@ +/* SPDX-License-Identifier: MIT */ +#undef NDEBUG +#include "agx_g15_wire.h" +#include "agx_chip.h" +#include "drm-uapi/asahi_drm.h" +#include +#include +#include + +static void +check_features(void) +{ + struct drm_asahi_params_global p = { + .gpu_generation = 15, .gpu_variant = 'S', .chip_id = 0x6030, + .num_dies = 1, .num_clusters_total = 2, .usc_generation = 3, + .gpu_hal_generation = 0, + }; + uint64_t f; + for (unsigned i = 0; i < 65536; ++i) { + p.features = i; + bool ok = agx_g15_wire_features(&p, &f); + assert(ok == (i == 0x3e || i == 0xbe)); + if (ok) { + assert(f == (i == 0x3e ? 0x1c06 : 0x5c06)); + struct drm_asahi_params_global normalized = p; + normalized.features = f; + assert(agx_params_native_kernel_abi_supported(&normalized)); + } + } + p.features = 0x3e; + p.gpu_variant = 'C'; p.chip_id = 0x6031; p.num_clusters_total = 4; + assert(agx_g15_wire_features(&p, &f)); + struct drm_asahi_params_global bad = p; + bad.chip_id = 0x6030; assert(!agx_g15_wire_features(&bad, &f)); + bad = p; bad.num_dies = 2; assert(!agx_g15_wire_features(&bad, &f)); + bad = p; bad.usc_generation = 2; assert(!agx_g15_wire_features(&bad, &f)); + bad = p; bad.gpu_hal_generation = 200; assert(!agx_g15_wire_features(&bad, &f)); + bad = p; bad.gpu_variant = 'G'; bad.chip_id = 0x8122; + bad.num_clusters_total = 1; assert(!agx_g15_wire_features(&bad, &f)); + bad = p; bad.features |= UINT64_C(1) << 40; + assert(!agx_g15_wire_features(&bad, &f)); + assert(!agx_g15_wire_features(NULL, &f)); + assert(!agx_g15_wire_features(&p, NULL)); +} + +static void +check_packet(unsigned type, size_t size, size_t prefix) +{ + unsigned char source[512] = {0}, saved[512], output[514]; + struct drm_asahi_cmd_header h = { + .cmd_type = type, .size = size, .vdm_barrier = 7, .cdm_barrier = 11, + }; + memcpy(source, &h, sizeof(h)); + for (unsigned i = 0; i < size; ++i) { + if (i < prefix || i >= prefix + 64) + source[8 + i] = (i * 73 + 5) & 255; + } + memcpy(saved, source, sizeof(source)); + memset(output, 0xaa, sizeof(output)); + size_t n = 0; + assert(agx_g15_wire_pack(source, size + 8, output + 1, size + 8, &n)); + assert(n == size + 8 - 64); + assert(!memcmp(saved, source, sizeof(source))); + assert(output[0] == 0xaa && output[n + 1] == 0xaa); + struct drm_asahi_cmd_header got; + memcpy(&got, output + 1, sizeof(got)); + assert(got.cmd_type == type && got.size == size - 64); + assert(got.vdm_barrier == 7 && got.cdm_barrier == 11); + assert(!memcmp(output + 9, source + 8, prefix)); + assert(!memcmp(output + 9 + prefix, source + 8 + prefix + 64, + size - prefix - 64)); + /* The public Rust wire places render priors at 256/264, compute scratch + * at 64 and priors at 72/80. Sentinels above cover those exact bytes, + * including extension tails; no nonzero field may be discarded. */ + assert(!agx_g15_wire_pack(source, size + 8, output, n - 1, &n)); + for (unsigned i = 0; i < 64; ++i) { + source[8 + prefix + i] = 1; + assert(!agx_g15_wire_pack(source, size + 8, output, sizeof(output), &n)); + source[8 + prefix + i] = 0; + } + for (unsigned i = 1; i < size + 8; ++i) + assert(!agx_g15_wire_pack(source, i, output, sizeof(output), &n)); +} + +static void +check_stream(void) +{ + unsigned char src[1024] = {0}, dst[1024] = {0}; + struct drm_asahi_cmd_header h[3] = { + {DRM_ASAHI_SET_COMPUTE_ATTACHMENTS, 24, 0xffff, 0xffff}, + {DRM_ASAHI_CMD_RENDER, 336, 0xffff, 0xffff}, + {DRM_ASAHI_CMD_COMPUTE, 200, 1, 0}, + }; + size_t in = 0; + for (unsigned i = 0; i < 3; ++i) { + memcpy(src + in, &h[i], 8); + if (!i) memset(src + in + 8, 0x5a, 24); + in += 8 + h[i].size; + } + size_t n; + assert(agx_g15_wire_pack(src, in, dst, sizeof(dst), &n)); + assert(n == in - 128); + assert(!memcmp(src, dst, 32)); + struct drm_asahi_cmd_header c; + memcpy(&c, dst + 32, 8); assert(c.cmd_type == 0 && c.size == 272); + memcpy(&c, dst + 312, 8); assert(c.cmd_type == 1 && c.size == 136); + assert(c.vdm_barrier == 1 && c.cdm_barrier == 0); + src[0] = 99; assert(!agx_g15_wire_pack(src, in, dst, sizeof(dst), &n)); + src[0] = 2; src[2] = 8; + assert(!agx_g15_wire_pack(src, in, dst, sizeof(dst), &n)); + assert(!agx_g15_wire_pack(src, 0, dst, sizeof(dst), &n)); + assert(!agx_g15_wire_pack(NULL, in, dst, sizeof(dst), &n)); +} + +int main(void) +{ + check_features(); + check_packet(DRM_ASAHI_CMD_RENDER, 320, 256); + check_packet(DRM_ASAHI_CMD_RENDER, 336, 256); + check_packet(DRM_ASAHI_CMD_RENDER, 448, 256); + check_packet(DRM_ASAHI_CMD_COMPUTE, 128, 64); + check_packet(DRM_ASAHI_CMD_COMPUTE, 200, 64); + check_stream(); + puts("G15 retained-wire feature and packet controls passed"); + return 0; +} diff --git a/src/asahi/vulkan/hk_cmd_draw.c b/src/asahi/vulkan/hk_cmd_draw.c index 1d641c701df7..44033be3d129 100644 --- a/src/asahi/vulkan/hk_cmd_draw.c +++ b/src/asahi/vulkan/hk_cmd_draw.c @@ -37,6 +37,7 @@ #include "hk_entrypoints.h" #include "hk_image.h" #include "hk_image_view.h" +#include "hk_instance.h" #include "hk_agx3_ioto_program_core.h" #include "hk_g17p_ppp_indices.h" #include "hk_g17p_full_frame_scissor.h" @@ -4202,10 +4203,17 @@ static void hk_init_heap(const void *data) { struct hk_device *dev = (struct hk_device *)data; + struct hk_instance *instance = + hk_physical_device_instance(hk_device_physical(dev)); perf_debug_dev(&dev->dev, "Allocating heap"); - size_t size = 128 * 1024 * 1024; + /* XML drirc values bypass the option parser's environment range checks. + * Bound them before allocation: poly_heap.size and draw ranges are u32. + */ + STATIC_ASSERT(UINT64_C(1024) * 1024 * 1024 <= UINT32_MAX); + unsigned mb = CLAMP(instance->drirc.misc.geometry_heap_size_mb, 16, 1024); + size_t size = (size_t)mb * 1024 * 1024; struct agx_bo *heap = agx_bo_create(&dev->dev, size, 0, 0, "Geometry heap"); if (!heap) @@ -4228,8 +4236,9 @@ hk_init_heap(const void *data) } /* - * Allocating the geometry heap is a 128 MB agx_bo_create(), measured at 15.5 ms - * on G17P: the kernel has to find and zero the pages. Every consumer of the + * Allocating the configured geometry heap requires agx_bo_create(): the kernel + * finds and zeroes the pages. The default 128 MiB allocation measured 15.5 ms + * on G17P. Every consumer of the * heap is reached from a draw, so leaving the allocation to util_call_once() * put those 15.5 ms inside the first vkCmdDraw() that used geometry or * tessellation -- a stall in the middle of a render pass, and ~150x the cost of diff --git a/src/asahi/vulkan/hk_device_memory.c b/src/asahi/vulkan/hk_device_memory.c index a8f70e251f26..35fdcae4c706 100644 --- a/src/asahi/vulkan/hk_device_memory.c +++ b/src/asahi/vulkan/hk_device_memory.c @@ -308,6 +308,11 @@ hk_FreeMemory(VkDevice device, VkDeviceMemory _mem, * the BO; an owned one belongs to this object alone. */ if (mem->map_owned) agx_bo_unmap_owned(mem->bo, mem->map, mem->map_size); + else if (mem->map && mem->map_placed) { + dev->dev.ops.bo_munmap(&dev->dev, mem->bo); + mem->bo->_map = NULL; + mem->bo->_map_size = 0; + } agx_bo_unreference(&dev->dev, mem->bo); @@ -362,6 +367,22 @@ hk_MapMemory2KHR(VkDevice device, const VkMemoryMapInfoKHR *pMemoryMapInfo, "Memory object already mapped."); } + if (fixed_addr && (offset != 0 || size != mem->vk.size || + mem->vk.size > mem->bo->size)) { + *ppData = NULL; + return vk_errorf(dev, VK_ERROR_MEMORY_MAP_FAILED, + "A placed mapping must cover exactly the allocation."); + } + + /* A backend unable to create independent mappings must not relocate a + * mapping that another imported memory object may still be using. */ + if (fixed_addr && !dev->dev.ops.bo_mmap_independent && mem->bo->_map && + p_atomic_read(&mem->bo->refcnt) > 1) { + *ppData = NULL; + return vk_errorf(dev, VK_ERROR_MEMORY_MAP_FAILED, + "Cannot relocate a shared mapping on this backend."); + } + /* Bound a placed mapping by the memory object, not the BO: the BO cache * may have handed us one up to twice as large, and the application has * reserved only mem->vk.size at this address. @@ -386,7 +407,22 @@ hk_MapMemory2KHR(VkDevice device, const VkMemoryMapInfoKHR *pMemoryMapInfo, mem->bo->uapi_handle); } - assert(!fixed_addr || mem->map == fixed_addr); + if (fixed_addr && mem->map != fixed_addr) { + if (mem->map_owned) + agx_bo_unmap_owned(mem->bo, mem->map, mem->map_size); + else { + dev->dev.ops.bo_munmap(&dev->dev, mem->bo); + mem->bo->_map = NULL; + mem->bo->_map_size = 0; + } + mem->map = NULL; + mem->map_owned = false; + mem->map_size = 0; + *ppData = NULL; + return vk_errorf(dev, VK_ERROR_MEMORY_MAP_FAILED, + "Placed mapping returned an unexpected address."); + } + mem->map_placed = fixed_addr != NULL; *ppData = mem->map + offset; return VK_SUCCESS; @@ -398,7 +434,7 @@ hk_UnmapMemory2KHR(VkDevice device, { VK_FROM_HANDLE(hk_device_memory, mem, pMemoryUnmapInfo->memory); - if (mem == NULL) + if (mem == NULL || mem->map == NULL) return VK_SUCCESS; if (mem->map_owned) { @@ -418,6 +454,7 @@ hk_UnmapMemory2KHR(VkDevice device, mem->map = NULL; mem->map_size = 0; mem->map_owned = false; + mem->map_placed = false; return VK_SUCCESS; } @@ -446,6 +483,7 @@ hk_UnmapMemory2KHR(VkDevice device, } mem->map = NULL; + mem->map_placed = false; return VK_SUCCESS; } diff --git a/src/asahi/vulkan/hk_device_memory.h b/src/asahi/vulkan/hk_device_memory.h index f492013b9d4a..64b6e7da8261 100644 --- a/src/asahi/vulkan/hk_device_memory.h +++ b/src/asahi/vulkan/hk_device_memory.h @@ -32,6 +32,7 @@ struct hk_device_memory { * BO's shared one: the BO may be aliased by other memory objects. */ size_t map_size; bool map_owned; + bool map_placed; }; VK_DEFINE_NONDISP_HANDLE_CASTS(hk_device_memory, vk.base, VkDeviceMemory, diff --git a/src/asahi/vulkan/hk_drirc_gen.py b/src/asahi/vulkan/hk_drirc_gen.py index f961899f123f..79be73a00a06 100644 --- a/src/asahi/vulkan/hk_drirc_gen.py +++ b/src/asahi/vulkan/hk_drirc_gen.py @@ -16,8 +16,12 @@ def declare_options(): import drirc_gen B = drirc_gen.DrircBool + I = drirc_gen.DrircInt misc_options = [ + I("hk_geometry_heap_size_mb", 128, 16, 1024, + "Size in MiB of the tessellation/geometry-shader scratch heap", + c_name="geometry_heap_size_mb"), B("hk_disable_border_emulation", False, "Disable custom border colour emulation", c_name="disable_border_emulation"), diff --git a/src/asahi/vulkan/hk_g17p_compression.h b/src/asahi/vulkan/hk_g17p_compression.h index 2a2675658024..de4f12a2fe04 100644 --- a/src/asahi/vulkan/hk_g17p_compression.h +++ b/src/asahi/vulkan/hk_g17p_compression.h @@ -7,6 +7,7 @@ #include "hk_g17p_meta_copy_core.h" #include "vulkan/vulkan_core.h" #include +#include #include /* G17P lossless compression policy. @@ -139,14 +140,20 @@ hk_g17p_compression_eligible(enum agx_chip chip, unsigned plane, * copy: the chain's structures have other types, and Mesa builds with * strict aliasing (gcc -O2 dropped the stores of a stack chain). */ for (const void *next = info->pNext; next;) { - VkBaseInStructure ext; - memcpy(&ext, next, sizeof(ext)); - if (ext.sType == VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO && - ((const VkExternalMemoryImageCreateInfo *)next)->handleTypes) + VkStructureType type; + const void *following; + memcpy(&type, next, sizeof(type)); + memcpy(&following, (const char *)next + offsetof(VkBaseInStructure, pNext), + sizeof(following)); + if (type == VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO) { + VkExternalMemoryImageCreateInfo external; + memcpy(&external, next, sizeof(external)); + if (external.handleTypes) + return false; + } + if (type == HK_G17P_WSI_IMAGE_CREATE_INFO_MESA) return false; - if (ext.sType == HK_G17P_WSI_IMAGE_CREATE_INFO_MESA) - return false; - next = ext.pNext; + next = following; } VkImageCreateFlags allowed_flags = diff --git a/src/asahi/vulkan/hk_shader.c b/src/asahi/vulkan/hk_shader.c index 9c6a62e5ad1a..4ddaaf778ca2 100644 --- a/src/asahi/vulkan/hk_shader.c +++ b/src/asahi/vulkan/hk_shader.c @@ -4206,9 +4206,9 @@ hk_shader_binary_cache_finish(struct hk_device *dev) } /* - * A draw that runs geometry or tessellation allocates the 128 MB geometry heap, - * and until now that allocation was reached only from inside vkCmdDraw(). It - * costs 15.5 ms on G17P, so the first such draw in a process paid a 15.5 ms + * A draw that runs geometry or tessellation needs the configured geometry heap. + * The default 128 MiB allocation measured 15.5 ms on G17P when reached only + * from inside vkCmdDraw(), so the first such draw in a process paid a 15.5 ms * stall mid-render-pass while every later draw with the same shaders cost * ~110 us. The heap depends on nothing but the device, so pull it forward to * the creation of the stage that will need it -- a creation-time allocation is diff --git a/src/drm-shim/device.c b/src/drm-shim/device.c index 7df590027680..ad3061f3ab6f 100644 --- a/src/drm-shim/device.c +++ b/src/drm-shim/device.c @@ -443,7 +443,7 @@ drm_shim_init_iomem_region(off64_t offset, size_t size, * fd. */ void * -drm_shim_mmap(struct shim_fd *shim_fd, size_t length, int prot, int flags, +drm_shim_mmap(struct shim_fd *shim_fd, void *addr, size_t length, int prot, int flags, int fd, off64_t offset) { if (shim_device.iomem_region.mmap && @@ -465,5 +465,5 @@ drm_shim_mmap(struct shim_fd *shim_fd, size_t length, int prot, int flags, /* The offset we pass to mmap must be aligned to the page size */ assert((bo->mem_addr & (shim_page_size - 1)) == 0); - return mmap(NULL, length, prot, flags, shim_device.mem_fd, bo->mem_addr); + return mmap(addr, length, prot, flags, shim_device.mem_fd, bo->mem_addr); } diff --git a/src/drm-shim/drm_shim.c b/src/drm-shim/drm_shim.c index 82e45a95c67c..3a01ef538166 100644 --- a/src/drm-shim/drm_shim.c +++ b/src/drm-shim/drm_shim.c @@ -857,7 +857,7 @@ mmap(void *addr, size_t length, int prot, int flags, int fd, off_t offset) struct shim_fd *shim_fd = drm_shim_fd_lookup(fd); if (shim_fd) - return drm_shim_mmap(shim_fd, length, prot, flags, fd, offset); + return drm_shim_mmap(shim_fd, addr, length, prot, flags, fd, offset); return real_mmap(addr, length, prot, flags, fd, offset); } @@ -869,7 +869,7 @@ mmap64(void* addr, size_t length, int prot, int flags, int fd, off64_t offset) struct shim_fd *shim_fd = drm_shim_fd_lookup(fd); if (shim_fd) - return drm_shim_mmap(shim_fd, length, prot, flags, fd, offset); + return drm_shim_mmap(shim_fd, addr, length, prot, flags, fd, offset); return real_mmap64(addr, length, prot, flags, fd, offset); } diff --git a/src/drm-shim/drm_shim.h b/src/drm-shim/drm_shim.h index b44138d33067..47a486f77618 100644 --- a/src/drm-shim/drm_shim.h +++ b/src/drm-shim/drm_shim.h @@ -106,7 +106,7 @@ void drm_shim_fd_register(int fd, struct shim_fd *shim_fd); void drm_shim_fd_unregister(int fd); struct shim_fd *drm_shim_fd_lookup(int fd); int drm_shim_ioctl(int fd, unsigned long request, void *arg); -void *drm_shim_mmap(struct shim_fd *shim_fd, size_t length, int prot, int flags, +void *drm_shim_mmap(struct shim_fd *shim_fd, void *addr, size_t length, int prot, int flags, int fd, off64_t offset); int drm_shim_bo_init(struct shim_bo *bo, size_t size); diff --git a/tools/siliconforest/build-targets.py b/tools/siliconforest/build-targets.py new file mode 100644 index 000000000000..bb6bc6b83b56 --- /dev/null +++ b/tools/siliconforest/build-targets.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Build the Apple driver outputs and Asahi host tests, not other drivers' tests.""" +import json +import os +from pathlib import Path +import subprocess +import sys + +build = Path(sys.argv[1]).resolve() +info = build / 'meson-info' +outputs = set() +dependencies = set() +for test in json.loads((info / 'intro-tests.json').read_text()): + if any(suite == 'asahi' or suite.endswith(':asahi') for suite in test['suite']): + dependencies.update(test.get('depends', [])) + executable = Path(test['cmd'][0]) + if executable.is_relative_to(build): + outputs.add(str(executable.relative_to(build))) +required = {'vulkan_asahi', 'asahi_noop_drm_shim', 'GL', 'EGL', 'gbm', + 'asahi_icd.x86_64.json', 'asahi_devenv_icd.x86_64.json'} +seen = set() +for target in json.loads((info / 'intro-targets.json').read_text()): + name = target['name'] + if target['id'] in dependencies or name in required or name.startswith('gallium-') or (name.startswith('asahi') and 'icd.' in name): + seen.add(name) + outputs.update(str(Path(filename).relative_to(build)) for filename in target['filename']) +# ICD architecture varies for cross/native AArch64 builds. +assert required - {'asahi_icd.x86_64.json', 'asahi_devenv_icd.x86_64.json'} <= seen, seen +jobs = int(os.environ.get('JOBS', '8')) +assert jobs > 0 +subprocess.run(['ninja', '-C', str(build), '-j', str(jobs), *sorted(outputs)], check=True) diff --git a/tools/siliconforest/build.sh b/tools/siliconforest/build.sh new file mode 100755 index 000000000000..7c2971027c4b --- /dev/null +++ b/tools/siliconforest/build.sh @@ -0,0 +1,14 @@ +#!/usr/bin/env bash +# SPDX-License-Identifier: MIT +set -euo pipefail +sf_mesa_source=$(cd -- "$(dirname -- "${BASH_SOURCE[0]}")/../.." && pwd) +sf_mesa_build=${1:-"$sf_mesa_source/../siliconforest-mesa-build"} +sf_mesa_meson=${MESON:-meson} +"$sf_mesa_meson" setup "$sf_mesa_build" "$sf_mesa_source" \ + -Dgallium-drivers=asahi,zink,softpipe -Dvulkan-drivers=asahi \ + -Dplatforms=x11,wayland -Dglx=dri -Degl=enabled -Dgbm=enabled \ + -Dglvnd=disabled -Dllvm=enabled -Dbuild-tests=true \ + -Dtools=asahi,drm-shim -Dmesa-clc=enabled -Dprecomp-compiler=enabled \ + -Dvideo-codecs= -Dgallium-va=disabled +python3 "$sf_mesa_source/tools/siliconforest/build-targets.py" "$sf_mesa_build" +"$sf_mesa_meson" test -C "$sf_mesa_build" --no-rebuild --suite asahi --print-errorlogs diff --git a/tools/siliconforest/check-kernel-abi.py b/tools/siliconforest/check-kernel-abi.py new file mode 100644 index 000000000000..647b5358b6f1 --- /dev/null +++ b/tools/siliconforest/check-kernel-abi.py @@ -0,0 +1,65 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Compare native Mesa wire layouts with a pinned Aurora or SiliconForest header.""" +import argparse +import json +import os +from pathlib import Path +import shlex +import subprocess +import sys +import tempfile + +root = Path(__file__).resolve().parents[2] +parser = argparse.ArgumentParser(description=__doc__) +parser.add_argument('kernel', type=Path) +parser.add_argument('--header', choices=['asahi_drm.h', 'asahi_m3_drm.h'], + help='select a contract explicitly when both headers exist') +args = parser.parse_args() +kernel = args.kernel.resolve() +header = args.header or ('asahi_drm.h' if + (kernel / 'include/uapi/drm/asahi_drm.h').is_file() else 'asahi_m3_drm.h') +common = { + 'params_size': 'sizeof(struct drm_asahi_params_global)', + 'params_hal_offset': 'offsetof(struct drm_asahi_params_global, gpu_hal_generation)', + 'queue_size': 'sizeof(struct drm_asahi_queue_create)', + 'vm_size': 'sizeof(struct drm_asahi_vm_create)', + 'submit_size': 'sizeof(struct drm_asahi_submit)', + 'vm_ioctl': 'DRM_IOCTL_ASAHI_VM_CREATE', + 'queue_ioctl': 'DRM_IOCTL_ASAHI_QUEUE_CREATE', + 'submit_ioctl': 'DRM_IOCTL_ASAHI_SUBMIT', + 'per_command_syncs': 'DRM_ASAHI_FEATURE_PER_COMMAND_INPUT_SYNCS', + 'vm_status_mirror': 'DRM_ASAHI_FEATURE_VM_STATUS_MIRROR', + 'prior_barriers': 'DRM_ASAHI_FEATURE_EXACT_PRIOR_BARRIERS', + 'fragment_barriers': 'DRM_ASAHI_FEATURE_FRAGMENT_BARRIERS', + 'ray_query': 'DRM_ASAHI_FEATURE_RENDER_RAY_QUERY', +} +mesa = dict(common, render_size='sizeof(struct drm_asahi_cmd_render_with_ray_query)', + render_prior_offset='offsetof(struct drm_asahi_cmd_render_with_prior, prior_vdm)', + compute_size='sizeof(struct drm_asahi_cmd_compute_with_prior)', + compute_scs_offset='offsetof(struct drm_asahi_cmd_compute_with_prior, scs_layout)', + compute_prior_offset='offsetof(struct drm_asahi_cmd_compute_with_prior, prior_vdm)') +native = dict(common, render_size='sizeof(struct drm_asahi_cmd_render)', + render_prior_offset='offsetof(struct drm_asahi_cmd_render, prior_vdm)', + compute_size='sizeof(struct drm_asahi_cmd_compute)', + compute_scs_offset='offsetof(struct drm_asahi_cmd_compute, scs_layout)', + compute_prior_offset='offsetof(struct drm_asahi_cmd_compute, prior_vdm)') + +def compile_and_run(directory, name, header, includes, fields): + source = Path(directory) / (name + '.c') + binary = Path(directory) / name + body = '\n'.join(f'printf("{key} %llu\\n", (unsigned long long)({expr}));' + for key, expr in fields.items()) + source.write_text('#define __user\n#include \n#include \n#include "' + header + '"\nint main(void) {\n' + body + '\nreturn 0; }\n') + subprocess.run(shlex.split(os.environ.get('CC', 'cc')) + ['-std=c11', '-Werror'] + + ['-I' + str(path) for path in includes] + + [str(source), '-o', str(binary)], check=True) + return {key: int(value) for key, value in + (line.split() for line in subprocess.check_output([binary], text=True).splitlines())} + +with tempfile.TemporaryDirectory(prefix='siliconforest-abi-') as directory: + a = compile_and_run(directory, 'mesa', 'drm-uapi/asahi_drm.h', [root / 'include'], mesa) + b = compile_and_run(directory, 'kernel', header, [kernel / 'include/uapi/drm'], native) + differences = {key: {'mesa': a[key], 'kernel': b[key]} for key in a if a[key] != b[key]} + print(json.dumps({'matched': not differences, 'kernel_header': header, 'values': a, 'differences': differences}, indent=2)) + raise SystemExit(bool(differences)) diff --git a/tools/siliconforest/check.py b/tools/siliconforest/check.py new file mode 100755 index 000000000000..19028639481b --- /dev/null +++ b/tools/siliconforest/check.py @@ -0,0 +1,69 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Run production CPU checks without a GPU or a Mesa build directory.""" +import argparse +import json +import os +from pathlib import Path +import re +import shlex +import subprocess +import sys +import tempfile + +ROOT = Path(__file__).resolve().parents[2] + +def run(*args): + return subprocess.check_output(args, cwd=ROOT, text=True).strip() + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument('--check-git', action='store_true', + help='also verify every pinned tag and profile in a full clone') + args = parser.parse_args() + data = json.loads((ROOT / 'SILICONFOREST-SOURCES.json').read_text()) + tags = set() + for source in data['source_snapshots']: + assert re.fullmatch(r'[0-9a-f]{40}', source['commit']), source + assert source['tag'] not in tags, source['tag'] + assert source['url'].startswith(('https://github.com/', 'https://gitlab.freedesktop.org/')) + tags.add(source['tag']) + if args.check_git: + assert run('git', 'rev-parse', 'refs/tags/' + source['tag']) == source['commit'] + if args.check_git: + for profile in data['profiles']: + local = subprocess.run(['git', 'rev-parse', '--verify', '--quiet', + 'refs/heads/' + profile['branch']], + cwd=ROOT, text=True, capture_output=True) + actual = local.stdout.strip() if local.returncode == 0 else run( + 'git', 'rev-parse', 'refs/remotes/origin/' + profile['branch']) + assert actual == profile['commit'] + subprocess.run(['git', 'merge-base', '--is-ancestor', profile['source_commit'], profile['commit']], cwd=ROOT, check=True) + paths = run('git', 'diff', '--name-only', profile['source_commit'], profile['commit']).splitlines() + assert set(paths) <= {'AGENTS.md', 'README.md', '.github/workflows/macos.yml'}, paths + cases = [ + ('chip-admission', ['src/asahi/lib/agx_chip.c', + 'src/asahi/lib/agx_va_runtime_hole.c', + 'src/util/vma.c', + 'src/asahi/lib/tests/test-chip-admission.c']), + ('compression', ['src/asahi/vulkan/tests/test-hk-g17p-compression.c']), + ('image-plane-layout', ['src/asahi/vulkan/hk_image_layout_core.c', + 'src/asahi/vulkan/tests/test-hk-image-layout-core.c']), + ('scratch-layout', ['src/asahi/lib/agx_scs_layout.c', + 'src/asahi/lib/tests/test-scs-layout.c']), + ] + cc = shlex.split(os.environ.get('CC', 'cc')) + with tempfile.TemporaryDirectory(prefix='siliconforest-mesa-check-') as directory: + for name, sources in cases: + binary = str(Path(directory) / name) + subprocess.run(cc + ['-std=c11', '-D_POSIX_C_SOURCE=200809L', '-D_DEFAULT_SOURCE', + '-DHAVE_ENDIAN_H', '-O2', '-Wall', '-Wextra', '-Werror', + '-Wno-unused-function', '-Iinclude', '-Isrc', + '-Isrc/asahi/lib', '-Isrc/asahi/vulkan'] + + sources + ['-o', binary], cwd=ROOT, check=True) + subprocess.run([binary], check=True) + subprocess.run([sys.executable, str(ROOT / 'tools/siliconforest/test-geometry-heap.py')], check=True) + print(f'{len(tags)} source records and {len(cases) + 1} production CPU test programs passed') + +if __name__ == '__main__': + main() diff --git a/tools/siliconforest/drm-smoke.py b/tools/siliconforest/drm-smoke.py new file mode 100644 index 000000000000..10e963ea1d1d --- /dev/null +++ b/tools/siliconforest/drm-smoke.py @@ -0,0 +1,45 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Exercise host driver setup and mappings through drm-shim, without GPU submits.""" +import os +from pathlib import Path +import shlex +import subprocess +import sys +import tempfile + +root = Path(__file__).resolve().parents[2] +build = Path(sys.argv[1]).resolve() +shim = build / 'src/asahi/drm-shim/libasahi_noop_drm_shim.so' +icds = list((build / 'src/asahi/vulkan').glob('asahi_devenv_icd.*.json')) +assert shim.is_file() and len(icds) == 1, 'Build the driver, development ICD and drm-shim first' +with tempfile.TemporaryDirectory(prefix='siliconforest-vulkan-smoke-') as directory: + binary = str(Path(directory) / 'vulkan-smoke') + subprocess.run(shlex.split(os.environ.get('CC', 'cc')) + + ['-std=c11', '-O2', '-Wall', '-Wextra', '-Werror', + '-I' + str(root / 'include'), + str(root / 'tools/siliconforest/vulkan-smoke.c'), + '-lvulkan', '-ldl', '-o', binary], check=True) + cases = [(chip, None, False) for chip in + ['g13g', 'g15s', 'g15c', 'g17p', 'g15g']] + # The obsolete opt-in variable must not turn a supported Air off. It must + # not admit an unrelated, unqualified GPU either. + cases += [('g15g', '0', False), ('g15g', '1', False), ('g16g', '1', True)] + for chip, old_opt_in, refused in cases: + env = os.environ.copy() + env.update(LD_PRELOAD=str(shim), VK_DRIVER_FILES=str(icds[0]), + ASAHI_SHIM_CHIP=chip, ASAHI_SHIM_G15S_EXPECT_VALID='1') + for key in ['VK_ICD_FILENAMES', 'VK_LOADER_DRIVERS_SELECT', + 'VK_LOADER_DRIVERS_DISABLE', 'ASAHI_M3_EXPERIMENTAL']: + env.pop(key, None) + if old_opt_in is not None: + env['ASAHI_M3_EXPERIMENTAL'] = old_opt_in + print('drm-shim profile:', chip, 'old opt-in:', old_opt_in, + 'expected:', 'refused' if refused else 'admitted', flush=True) + command = [binary] + (['--expect-no-device'] if refused else []) + result = subprocess.run(command, env=env, check=False, timeout=90, + stdout=subprocess.PIPE, stderr=subprocess.STDOUT, text=True) + print(result.stdout, end='', flush=True) + result.check_returncode() + if 'Validation Error:' in result.stdout: + raise RuntimeError('Vulkan validation reported an invalid regression probe') diff --git a/tools/siliconforest/test-geometry-heap.py b/tools/siliconforest/test-geometry-heap.py new file mode 100644 index 000000000000..a18eb636239a --- /dev/null +++ b/tools/siliconforest/test-geometry-heap.py @@ -0,0 +1,73 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: MIT +"""Execute the real heap callback with BO allocation/map failures and drirc sizes.""" +from pathlib import Path +import subprocess +import os +import shlex +import tempfile +repo = Path(__file__).resolve().parents[2] +src = (repo / "src/asahi/vulkan/hk_cmd_draw.c").read_text() +start = src.index("static void\nhk_init_heap(") +callback = src[start:src.index("\n}", start) + 2] +geometry = (repo / "src/poly/geometry.h").read_text() +layout_start = geometry.index("struct poly_heap {") +heap_layout = geometry[layout_start:geometry.index("} PACKED;", layout_start) + len("} PACKED;")] +prefix = r''' +#include +#include +#include +#include +#include +#define HAVE_FUNC_ATTRIBUTE_PACKED 1 +#include "util/macros.h" +#define DEVICE(T) uint64_t +struct hk_instance { struct { struct { int geometry_heap_size_mb; } misc; } drirc; }; +struct hk_physical_device { struct hk_instance *instance; }; +struct va { uint64_t addr; }; +struct agx_bo { struct va *va; }; +HEAP_LAYOUT +_Static_assert(sizeof(struct poly_heap) == 16, "GPU heap layout"); +struct hk_device { int dev; struct { void *heap_bo; } rodata; struct agx_bo *heap; }; +static struct hk_instance instance; +static struct hk_physical_device physical = { &instance }; +static struct va address = { 0x123456780000ULL }; +static struct agx_bo allocation = { &address }; +static struct poly_heap state; +static size_t requested; +static int fail_bo, fail_map, releases; +static struct hk_physical_device *hk_device_physical(struct hk_device *d) { return &physical; } +static struct hk_instance *hk_physical_device_instance(struct hk_physical_device *p) { return p->instance; } +#define perf_debug_dev(...) ((void)0) +static struct agx_bo *agx_bo_create(void *d, size_t size, int a, int b, const char *n) +{ requested = size; return fail_bo ? NULL : &allocation; } +static struct poly_heap *agx_bo_map(void *b) { return fail_map ? NULL : &state; } +static void agx_bo_unreference(void *d, struct agx_bo *b) { assert(b == &allocation); releases++; } +''' +prefix = prefix.replace('HEAP_LAYOUT', heap_layout) +suffix = r''' +int main(void) +{ + const int sizes[] = { INT_MIN, -1, 0, 15, 16, 128, 256, 1024, 1025, 4096, 5000, INT_MAX }; + const unsigned expected_mb[] = { 16, 16, 16, 16, 16, 128, 256, 1024, 1024, 1024, 1024, 1024 }; + for (unsigned i = 0; i < sizeof(sizes) / sizeof(sizes[0]); i++) { + struct hk_device dev = {0}; instance.drirc.misc.geometry_heap_size_mb = sizes[i]; + hk_init_heap(&dev); + assert(dev.heap == &allocation && state.base == address.addr); + assert(requested == (size_t)expected_mb[i] * 1024 * 1024 && state.size == requested); + assert(state.bottom == 0); + } + for (int scenario = 0; scenario < 2; scenario++) { + struct hk_device dev = {0}; fail_bo = scenario == 0; fail_map = scenario == 1; + state.base = 99; state.size = 101; releases = 0; + hk_init_heap(&dev); + assert(!dev.heap && state.base == 99 && state.size == 101); + assert(releases == scenario); + } + puts("PASS real hk_init_heap: u32 layout, 12 XML sizes clamped, BO/map failure and cleanup"); +} +''' +with tempfile.TemporaryDirectory() as t: + binary = Path(t) / "heap" + subprocess.run(shlex.split(os.environ.get("CC", "cc")) + ["-I", str(repo / "src"), "-std=c11", "-Wall", "-Wextra", "-Werror", "-Wno-unused-parameter", "-fsanitize=address,undefined", "-x", "c", "-", "-o", str(binary)], input=prefix+callback+suffix, text=True, check=True) + subprocess.run([str(binary)], check=True) diff --git a/tools/siliconforest/vulkan-smoke-vert.h b/tools/siliconforest/vulkan-smoke-vert.h new file mode 100644 index 000000000000..d08ffc71d7d7 --- /dev/null +++ b/tools/siliconforest/vulkan-smoke-vert.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT + * Generated from vulkan-smoke.vert with glslangValidator -V. + */ +static const uint32_t sf_smoke_vert_spv[] = { + 0x07230203u, 0x00010000u, 0x0008000bu, 0x00000015u, 0x00000000u, 0x00020011u, 0x00000001u, 0x00020011u, + 0x00000035u, 0x0006000bu, 0x00000001u, 0x4c534c47u, 0x6474732eu, 0x3035342eu, 0x00000000u, 0x0003000eu, + 0x00000000u, 0x00000001u, 0x0007000fu, 0x00000000u, 0x00000004u, 0x6e69616du, 0x00000000u, 0x0000000du, + 0x00000014u, 0x00030010u, 0x00000004u, 0x0000000bu, 0x00030003u, 0x00000002u, 0x000001c2u, 0x00040005u, + 0x00000004u, 0x6e69616du, 0x00000000u, 0x00060005u, 0x0000000bu, 0x505f6c67u, 0x65567265u, 0x78657472u, + 0x00000000u, 0x00060006u, 0x0000000bu, 0x00000000u, 0x505f6c67u, 0x7469736fu, 0x006e6f69u, 0x00070006u, + 0x0000000bu, 0x00000001u, 0x505f6c67u, 0x746e696fu, 0x657a6953u, 0x00000000u, 0x00070006u, 0x0000000bu, + 0x00000002u, 0x435f6c67u, 0x4470696cu, 0x61747369u, 0x0065636eu, 0x00070006u, 0x0000000bu, 0x00000003u, + 0x435f6c67u, 0x446c6c75u, 0x61747369u, 0x0065636eu, 0x00030005u, 0x0000000du, 0x00000000u, 0x00050005u, + 0x00000014u, 0x74706163u, 0x64657275u, 0x00000000u, 0x00030047u, 0x0000000bu, 0x00000002u, 0x00050048u, + 0x0000000bu, 0x00000000u, 0x0000000bu, 0x00000000u, 0x00050048u, 0x0000000bu, 0x00000001u, 0x0000000bu, + 0x00000001u, 0x00050048u, 0x0000000bu, 0x00000002u, 0x0000000bu, 0x00000003u, 0x00050048u, 0x0000000bu, + 0x00000003u, 0x0000000bu, 0x00000004u, 0x00040047u, 0x0000000du, 0x00000024u, 0x00000000u, 0x00040047u, + 0x0000000du, 0x00000025u, 0x00000010u, 0x00040047u, 0x00000014u, 0x0000001eu, 0x00000000u, 0x00040047u, + 0x00000014u, 0x00000023u, 0x00000000u, 0x00040047u, 0x00000014u, 0x00000024u, 0x00000000u, 0x00040047u, + 0x00000014u, 0x00000025u, 0x00000010u, 0x00020013u, 0x00000002u, 0x00030021u, 0x00000003u, 0x00000002u, + 0x00030016u, 0x00000006u, 0x00000020u, 0x00040017u, 0x00000007u, 0x00000006u, 0x00000004u, 0x00040015u, + 0x00000008u, 0x00000020u, 0x00000000u, 0x0004002bu, 0x00000008u, 0x00000009u, 0x00000001u, 0x0004001cu, + 0x0000000au, 0x00000006u, 0x00000009u, 0x0006001eu, 0x0000000bu, 0x00000007u, 0x00000006u, 0x0000000au, + 0x0000000au, 0x00040020u, 0x0000000cu, 0x00000003u, 0x0000000bu, 0x0004003bu, 0x0000000cu, 0x0000000du, + 0x00000003u, 0x00040015u, 0x0000000eu, 0x00000020u, 0x00000001u, 0x0004002bu, 0x0000000eu, 0x0000000fu, + 0x00000000u, 0x0004002bu, 0x00000006u, 0x00000010u, 0x00000000u, 0x0007002cu, 0x00000007u, 0x00000011u, + 0x00000010u, 0x00000010u, 0x00000010u, 0x00000010u, 0x00040020u, 0x00000012u, 0x00000003u, 0x00000007u, + 0x0004003bu, 0x00000012u, 0x00000014u, 0x00000003u, 0x00050036u, 0x00000002u, 0x00000004u, 0x00000000u, + 0x00000003u, 0x000200f8u, 0x00000005u, 0x00050041u, 0x00000012u, 0x00000013u, 0x0000000du, 0x0000000fu, + 0x0003003eu, 0x00000013u, 0x00000011u, 0x0003003eu, 0x00000014u, 0x00000011u, 0x000100fdu, 0x00010038u, +}; diff --git a/tools/siliconforest/vulkan-smoke.c b/tools/siliconforest/vulkan-smoke.c new file mode 100644 index 000000000000..29515817e0e9 --- /dev/null +++ b/tools/siliconforest/vulkan-smoke.c @@ -0,0 +1,235 @@ +/* SPDX-License-Identifier: MIT + * CPU-side loader/device/mapping regression checks for drm-shim. + * No command buffers are submitted and no GPU execution is tested. + */ +#define _GNU_SOURCE +#include +#include +#include +#include +#include +#include +#include +#include +#include "vulkan-smoke-vert.h" + +#define REQUIRE(x) do { if (!(x)) { \ + fprintf(stderr, "line %u: %s\n", __LINE__, #x); exit(1); } } while (0) +#define OK(x) REQUIRE((x) == VK_SUCCESS) + +int main(int argc, char **argv) +{ + REQUIRE(dlsym(RTLD_DEFAULT, "asahi_noop_is_registered_fd") != NULL); + VkApplicationInfo app = {.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO, + .pApplicationName = "siliconforest-host-smoke", + .apiVersion = VK_API_VERSION_1_3}; + VkInstanceCreateInfo ici = {.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO, + .pApplicationInfo = &app}; + VkInstance instance; + OK(vkCreateInstance(&ici, NULL, &instance)); + uint32_t n = 0; + const VkResult enumeration = vkEnumeratePhysicalDevices(instance, &n, NULL); + if (enumeration != VK_SUCCESS) + fprintf(stderr, "physical-device enumeration: %d\n", enumeration); + if (argc == 2 && strcmp(argv[1], "--expect-no-device") == 0) { + REQUIRE(n == 0); + REQUIRE(enumeration == VK_SUCCESS || + enumeration == VK_ERROR_INITIALIZATION_FAILED); + vkDestroyInstance(instance, NULL); + puts("device admission refused as expected"); + return 0; + } + OK(enumeration); + REQUIRE(n == 1); + VkPhysicalDevice physical; + OK(vkEnumeratePhysicalDevices(instance, &n, &physical)); + VkPhysicalDeviceProperties props; + vkGetPhysicalDeviceProperties(physical, &props); + REQUIRE(strstr(props.deviceName, "Apple") != NULL); + printf("device: %s\n", props.deviceName); + + VkPhysicalDeviceVulkan13Features f13 = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_FEATURES, + }; + VkPhysicalDeviceTransformFeedbackFeaturesEXT xfb = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT, + .pNext = &f13, + }; + VkPhysicalDeviceMapMemoryPlacedFeaturesEXT placed = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAP_MEMORY_PLACED_FEATURES_EXT, + .pNext = &xfb, + }; + VkPhysicalDeviceFeatures2 features = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FEATURES_2, .pNext = &placed, + }; + vkGetPhysicalDeviceFeatures2(physical, &features); + REQUIRE(placed.memoryMapPlaced && placed.memoryUnmapReserve && xfb.transformFeedback); + REQUIRE(f13.dynamicRendering); + f13 = (VkPhysicalDeviceVulkan13Features){ + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_FEATURES, + .dynamicRendering = VK_TRUE, + }; + placed.memoryMapRangePlaced = VK_FALSE; + xfb.geometryStreams = VK_FALSE; + + uint32_t queue_count = 0; + vkGetPhysicalDeviceQueueFamilyProperties(physical, &queue_count, NULL); + REQUIRE(queue_count > 0); + VkQueueFamilyProperties *families = calloc(queue_count, sizeof(*families)); + REQUIRE(families); + vkGetPhysicalDeviceQueueFamilyProperties(physical, &queue_count, families); + uint32_t family = 0; + while (family < queue_count && !(families[family].queueFlags & VK_QUEUE_GRAPHICS_BIT)) + ++family; + REQUIRE(family < queue_count); + free(families); + float priority = 1; + VkDeviceQueueCreateInfo qci = { + .sType = VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO, + .queueFamilyIndex = family, .queueCount = 1, .pQueuePriorities = &priority, + }; + const char *extensions[] = {VK_EXT_MAP_MEMORY_PLACED_EXTENSION_NAME, + VK_KHR_MAP_MEMORY_2_EXTENSION_NAME, + VK_EXT_TRANSFORM_FEEDBACK_EXTENSION_NAME}; + VkDeviceCreateInfo dci = {.sType = VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO, + .pNext = &placed, .queueCreateInfoCount = 1, + .pQueueCreateInfos = &qci, + .enabledExtensionCount = 3, + .ppEnabledExtensionNames = extensions}; + VkDevice device; + OK(vkCreateDevice(physical, &dci, NULL, &device)); + PFN_vkMapMemory2KHR map2 = (PFN_vkMapMemory2KHR)vkGetDeviceProcAddr(device, "vkMapMemory2KHR"); + PFN_vkUnmapMemory2KHR unmap2 = (PFN_vkUnmapMemory2KHR)vkGetDeviceProcAddr(device, "vkUnmapMemory2KHR"); + REQUIRE(map2 && unmap2); + + VkPhysicalDeviceMemoryProperties memory; + vkGetPhysicalDeviceMemoryProperties(physical, &memory); + uint32_t type = 0; + while (type < memory.memoryTypeCount && + !(memory.memoryTypes[type].propertyFlags & VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT)) ++type; + REQUIRE(type < memory.memoryTypeCount); + VkMemoryAllocateInfo ai = {.sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, + .allocationSize = 0x104000, .memoryTypeIndex = type}; + VkDeviceMemory mem; + OK(vkAllocateMemory(device, &ai, NULL, &mem)); + vkFreeMemory(device, mem, NULL); /* prime the oversized BO cache */ + ai.allocationSize = 0x100000; + OK(vkAllocateMemory(device, &ai, NULL, &mem)); + const size_t alignment = 0x10000, total = ai.allocationSize + 3 * alignment; + unsigned char *reservation = mmap(NULL, total, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + REQUIRE(reservation != MAP_FAILED); + unsigned char *address = (void *)(((uintptr_t)reservation + alignment - 1) & ~(alignment - 1)); + unsigned char *guard = address + ai.allocationSize; + memset(guard, 0x5a, 4096); + VkMemoryMapPlacedInfoEXT pi = {.sType = VK_STRUCTURE_TYPE_MEMORY_MAP_PLACED_INFO_EXT, + .pPlacedAddress = address}; + VkMemoryMapInfoKHR mi = {.sType = VK_STRUCTURE_TYPE_MEMORY_MAP_INFO_KHR, + .pNext = &pi, .flags = VK_MEMORY_MAP_PLACED_BIT_EXT, + .memory = mem, .size = VK_WHOLE_SIZE}; + void *mapped = NULL; + OK(map2(device, &mi, &mapped)); + REQUIRE(mapped == address); + memset(mapped, 0x3c, ai.allocationSize); + for (unsigned i = 0; i < 4096; ++i) REQUIRE(guard[i] == 0x5a); + VkMemoryUnmapInfoKHR ui = {.sType = VK_STRUCTURE_TYPE_MEMORY_UNMAP_INFO_KHR, + .flags = VK_MEMORY_UNMAP_RESERVE_BIT_EXT, .memory = mem}; + OK(unmap2(device, &ui)); + for (unsigned i = 0; i < 4096; ++i) REQUIRE(guard[i] == 0x5a); + OK(map2(device, &mi, &mapped)); + REQUIRE(mapped == address); + vkFreeMemory(device, mem, NULL); /* freeing mapped placed memory must unmap */ + void *again = mmap(address, ai.allocationSize, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED_NOREPLACE, -1, 0); + REQUIRE(again == address); + for (unsigned i = 0; i < 4096; ++i) REQUIRE(guard[i] == 0x5a); + REQUIRE(munmap(reservation, total) == 0); + + PFN_vkCmdBeginTransformFeedbackEXT begin = (PFN_vkCmdBeginTransformFeedbackEXT) + vkGetDeviceProcAddr(device, "vkCmdBeginTransformFeedbackEXT"); + PFN_vkCmdEndTransformFeedbackEXT end = (PFN_vkCmdEndTransformFeedbackEXT) + vkGetDeviceProcAddr(device, "vkCmdEndTransformFeedbackEXT"); + REQUIRE(begin && end); + VkShaderModuleCreateInfo sci = {.sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO, + .codeSize = sizeof(sf_smoke_vert_spv), + .pCode = sf_smoke_vert_spv}; + VkShaderModule shader; + OK(vkCreateShaderModule(device, &sci, NULL, &shader)); + VkPipelineLayoutCreateInfo lci = {.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO}; + VkPipelineLayout layout; + OK(vkCreatePipelineLayout(device, &lci, NULL, &layout)); + VkPipelineShaderStageCreateInfo stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, .module = shader, .pName = "main", + }; + VkPipelineVertexInputStateCreateInfo vi = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO}; + VkPipelineInputAssemblyStateCreateInfo ia = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST}; + VkPipelineRasterizationStateCreateInfo raster = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = VK_TRUE, .polygonMode = VK_POLYGON_MODE_FILL, + .lineWidth = 1}; + VkPipelineMultisampleStateCreateInfo ms = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = VK_SAMPLE_COUNT_1_BIT}; + VkPipelineRenderingCreateInfo render_pipeline = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO}; + VkGraphicsPipelineCreateInfo pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .pNext = &render_pipeline, .stageCount = 1, .pStages = &stage, + .pVertexInputState = &vi, .pInputAssemblyState = &ia, + .pRasterizationState = &raster, .pMultisampleState = &ms, .layout = layout, + }; + VkPipeline pipeline; + OK(vkCreateGraphicsPipelines(device, VK_NULL_HANDLE, 1, &pipeline_info, NULL, &pipeline)); + VkBufferCreateInfo bci = {.sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO, + .size = 64, .usage = VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT}; + VkBuffer xfb_buffer; + OK(vkCreateBuffer(device, &bci, NULL, &xfb_buffer)); + VkMemoryRequirements req; + vkGetBufferMemoryRequirements(device, xfb_buffer, &req); + uint32_t xfb_type = 0; + while (xfb_type < memory.memoryTypeCount && !(req.memoryTypeBits & (1u << xfb_type))) ++xfb_type; + REQUIRE(xfb_type < memory.memoryTypeCount); + VkMemoryAllocateInfo xai = {.sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, + .allocationSize = req.size, .memoryTypeIndex = xfb_type}; + VkDeviceMemory xfb_memory; + OK(vkAllocateMemory(device, &xai, NULL, &xfb_memory)); + OK(vkBindBufferMemory(device, xfb_buffer, xfb_memory, 0)); + PFN_vkCmdBindTransformFeedbackBuffersEXT bind_xfb = (PFN_vkCmdBindTransformFeedbackBuffersEXT) + vkGetDeviceProcAddr(device, "vkCmdBindTransformFeedbackBuffersEXT"); + REQUIRE(bind_xfb); + VkCommandPoolCreateInfo pci = {.sType = VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO, + .queueFamilyIndex = family}; + VkCommandPool pool; + OK(vkCreateCommandPool(device, &pci, NULL, &pool)); + VkCommandBufferAllocateInfo cai = {.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO, + .commandPool = pool, .level = VK_COMMAND_BUFFER_LEVEL_PRIMARY, + .commandBufferCount = 1}; + VkCommandBuffer cmd; + OK(vkAllocateCommandBuffers(device, &cai, &cmd)); + VkCommandBufferBeginInfo cbi = {.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO}; + OK(vkBeginCommandBuffer(cmd, &cbi)); + VkRenderingInfo rendering = {.sType = VK_STRUCTURE_TYPE_RENDERING_INFO, + .renderArea = {.extent = {1, 1}}, .layerCount = 1}; + vkCmdBeginRendering(cmd, &rendering); + vkCmdBindPipeline(cmd, VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); + const VkDeviceSize xfb_offset = 0; + bind_xfb(cmd, 0, 1, &xfb_buffer, &xfb_offset, NULL); + begin(cmd, 0, 1, NULL, NULL); + end(cmd, 0, 1, NULL, NULL); + vkCmdEndRendering(cmd); + OK(vkEndCommandBuffer(cmd)); + vkDestroyCommandPool(device, pool, NULL); + vkDestroyPipeline(device, pipeline, NULL); + vkDestroyPipelineLayout(device, layout, NULL); + vkDestroyShaderModule(device, shader, NULL); + vkDestroyBuffer(device, xfb_buffer, NULL); + vkFreeMemory(device, xfb_memory, NULL); + vkDestroyDevice(device, NULL); + vkDestroyInstance(instance, NULL); + puts("PASS host device setup, placed mapping guards/free and NULL XFB counters (no submissions)"); + return 0; +} diff --git a/tools/siliconforest/vulkan-smoke.vert b/tools/siliconforest/vulkan-smoke.vert new file mode 100644 index 000000000000..497300c3cb94 --- /dev/null +++ b/tools/siliconforest/vulkan-smoke.vert @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: MIT +#version 450 +layout(location = 0, xfb_buffer = 0, xfb_offset = 0, xfb_stride = 16) out vec4 captured; +void main() { + gl_Position = vec4(0.0); + captured = vec4(0.0); +}