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Commit 01237a0

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add BKP and RCC changes needed for previous RTClock commit for F4
1 parent d68220b commit 01237a0

7 files changed

Lines changed: 41 additions & 297 deletions

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STM32F4/cores/maple/libmaple/bkp.c

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bkp.c.xxx

STM32F4/cores/maple/libmaple/bkp.c.xxx

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STM32F4/cores/maple/libmaple/bkp.h

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bkp.h.xxx

STM32F4/cores/maple/libmaple/bkp.h.xxx

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STM32F4/cores/maple/libmaple/rccF2.c

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@@ -74,7 +74,7 @@ static const struct rcc_dev_info rcc_dev_table[] = {
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[RCC_SPI2] = { .clk_domain = APB1, .line_num = 14 }, //unchanged
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[RCC_DMA1] = { .clk_domain = AHB1, .line_num = 21 }, //*
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[RCC_PWR] = { .clk_domain = APB1, .line_num = 28}, //unchanged
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// [RCC_BKP] = { .clk_domain = AHB1, .line_num = 18}, //*
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[RCC_BKP] = { .clk_domain = AHB1, .line_num = 18}, //*
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[RCC_I2C1] = { .clk_domain = APB1, .line_num = 21 }, //unchanged
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[RCC_I2C2] = { .clk_domain = APB1, .line_num = 22 }, //unchanged
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[RCC_CRC] = { .clk_domain = AHB1, .line_num = 12}, //*

STM32F4/cores/maple/libmaple/rccF2.h

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@@ -30,6 +30,7 @@
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*/
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#include "libmaple_types.h"
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#include "bitband.h"
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#ifndef _RCC_H_
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#define _RCC_H_
@@ -385,6 +386,7 @@ typedef struct
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#define RCC_BDCR_RTCSEL (0x3 << 8)
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#define RCC_BDCR_RTCSEL_NONE (0x0 << 8)
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#define RCC_BDCR_RTCSEL_LSE (0x1 << 8)
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#define RCC_BDCR_RTCSEL_LSI (0x2 << 8)
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#define RCC_BDCR_RTCSEL_HSE (0x3 << 8)
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#define RCC_BDCR_LSEBYP BIT(RCC_BDCR_LSEBYP_BIT)
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#define RCC_BDCR_LSERDY BIT(RCC_BDCR_LSERDY_BIT)
@@ -483,7 +485,7 @@ typedef enum rcc_clk_id {
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RCC_SPI2,
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RCC_DMA1,
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RCC_PWR,
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// RCC_BKP,
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RCC_BKP,
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RCC_I2C1,
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RCC_I2C2,
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RCC_CRC,
@@ -604,6 +606,35 @@ typedef enum rcc_ahb_divider {
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void rcc_set_prescaler(rcc_prescaler prescaler, uint32 divider);
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/**
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* @brief Start the low speed internal oscillatior
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*/
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static inline void rcc_start_lsi(void) {
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*bb_perip(&RCC_BASE->CSR, RCC_CSR_LSION_BIT) = 1;
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while (*bb_perip(&RCC_BASE->CSR, RCC_CSR_LSIRDY_BIT) == 0);
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}
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/* FIXME [0.0.13] Just have data point to an rcc_pll_multiplier! */
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/**
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* @brief Start the low speed external oscillatior
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*/
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static inline void rcc_start_lse(void) {
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bb_peri_set_bit(&RCC_BASE->BDCR, RCC_BDCR_LSEBYP_BIT, 0);
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bb_peri_set_bit(&RCC_BASE->BDCR, RCC_BDCR_LSEON_BIT, 1);
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while (bb_peri_get_bit(&RCC_BASE->BDCR, RCC_BDCR_LSERDY_BIT ) == 0);
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}
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/*
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* Deprecated bits.
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*/
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static inline void rcc_start_hse(void) { // Added to support RTClock
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// *bb_perip(&RCC_BASE->CR, RCC_CR_HSEON_BIT) = 1;
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while (bb_peri_get_bit(&RCC_BASE->CR, RCC_CR_HSERDY_BIT) == 0);
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}
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#ifdef __cplusplus
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} // extern "C"
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#endif
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// API compatibility
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#include "variant.h"

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