2525 *****************************************************************************/
2626
2727/* *
28- * @file wirish/boards/nucleo/ board.cpp
29- * @author Grégoire Passault <g.passault@gmail.com>
28+ * @file board.cpp for STM32 Nucleo-F103RB
29+ * @original author Grégoire Passault <g.passault@gmail.com>
3030 * @brief Nucleo board file
31- *
32- * This mapping was done using the NUCLEO documentation and may be incomplete
33- * or contains error
34- *
35- * If you want to use the PWM outputs, consider understanding all the remapping
36- * process that can be involved. You may have to tweak this file regarding your goals.
31+ * edited and tested by Matthias Diro, Release Date: 27.01.2015
32+ * there are some solderings neccessary for complete compatibility
33+ * consider the Nucleo User manual for:
34+ * OSC clock: clock must be driven either from "MCO from ST-Link" or Oscillator from external PF0/PD0/PH0. Soldering is neccessary if board number is MB1136 C-01, see -> 5.7 OSC clock
35+ * USART: If PA2/PA3 needed, solder bridges must be changed. see -> 5.8 USART communication
3736 */
3837
3938// #include <board/board.h> // For this board's header file
4039
4140// #include <wirish_types.h> // For stm32_pin_info and its contents
4241 // (these go into PIN_MAP).
4342
44- #include " boards_private.h" // For PMAP_ROW(), which makes
43+ // #include "boards_private.h" // For PMAP_ROW(), which makes
4544 // PIN_MAP easier to read.
4645#include < board/board.h>
4746
5251#include < wirish_types.h>
5352// boardInit(): NUCLEO rely on some remapping
5453void boardInit (void ) {
55- afio_remap (AFIO_REMAP_TIM2_FULL);
56- afio_remap (AFIO_REMAP_TIM3_PARTIAL);
54+ afio_cfg_debug_ports (AFIO_DEBUG_SW_ONLY); // relase PC3 and PC5 on nucleo
55+ afio_remap (AFIO_REMAP_USART3_PARTIAL); // remap Serial2(USART3)PB10/PB11
56+ // to PC10/PC11 -> don't forget to insert into gpio.h:
57+ // AFIO_REMAP_USART3_PARTIAL = AFIO_MAPR_USART3_REMAP_PARTIAL
58+ afio_remap (AFIO_REMAP_TIM2_FULL); // better PWM compatibility
59+ afio_remap (AFIO_REMAP_TIM3_PARTIAL);// better PWM compatibility
5760}
5861/*
5962namespace wirish {
@@ -78,79 +81,153 @@ rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSI_DIV_2, &pll_data};
7881// - Timer channel (1 to 4, for PWM), or 0 if none
7982// - ADC device, or NULL if none
8083// - ADC channel, or ADCx if none
84+ // gpioX, PINbit, TIMER/NULL, timerch/0, ADC1/NULL, adcsub/0
85+ // gpioX, TIMER/NULL, ADC1/NULL, PINbit, timerch/0, adcsub/0
86+ // 0 1 2 3 4 5
87+ // 0 3 1 4 2 5
88+
89+ // 0 1 3 4 2 5
90+ // 0 1 2 4 2 5
8191extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
8292
8393 /* Arduino-like header, right connectors */
84-
85- PMAP_ROW (GPIOA, 3 , NULL , 0 , ADC1, 3 ), /* D0/PA3 */
86- PMAP_ROW (GPIOA, 2 , NULL , 0 , ADC1, 2 ), /* D1/PA2 */
87- PMAP_ROW (GPIOA, 10 , NULL , 0 , NULL , ADCx), /* D2/PA10 */
88- PMAP_ROW (GPIOB, 3 , TIMER2, 2 , NULL , ADCx), /* D3/PB3 REMAPPED */
89- PMAP_ROW (GPIOB, 5 , NULL , 0 , NULL , ADCx), /* D4/PB5 */
90- PMAP_ROW (GPIOB, 4 , TIMER3, 1 , NULL , ADCx), /* D5/PB4 REMAPPED */
91- PMAP_ROW (GPIOB, 10 , TIMER2, 3 , NULL , ADCx), /* D6/PB10 REMAPPED */
92- PMAP_ROW (GPIOA, 8 , NULL , 0 , NULL , ADCx), /* D7/PA8 */
93-
94- PMAP_ROW (GPIOA, 9 , NULL , 0 , NULL , ADCx), /* D8/PA9 */
95- PMAP_ROW (GPIOC, 7 , NULL , 0 , NULL , ADCx), /* D9/PC7 */
96- PMAP_ROW (GPIOB, 6 , TIMER4, 1 , NULL , ADCx), /* D10/PB6 */
97- PMAP_ROW (GPIOA, 7 , TIMER3, 2 , ADC1, 7 ), /* D11/PA7 */
98- PMAP_ROW (GPIOA, 6 , NULL , 0 , ADC1, 6 ), /* D12/PA6 */
99- PMAP_ROW (GPIOA, 5 , NULL , 0 , ADC1, 5 ), /* D13/PA5 LED*/
100- PMAP_ROW (GPIOB, 9 , NULL , 0 , NULL , ADCx), /* D14/PB9 */
101- PMAP_ROW (GPIOB, 8 , NULL , 0 , NULL , ADCx), /* D15/PB8 */
102-
103- /* Arduino-like header, left connectors */
104-
105- PMAP_ROW (GPIOA, 0 , TIMER2, 1 , ADC1, 0 ), /* D16/A0/PA0 */
106- PMAP_ROW (GPIOA, 1 , TIMER2, 2 , ADC1, 1 ), /* D17/A1/PA1 */
107- PMAP_ROW (GPIOA, 4 , NULL , 0 , ADC1, 4 ), /* D18/A2/PA4 */
108- PMAP_ROW (GPIOB, 0 , TIMER3, 3 , ADC1, 8 ), /* D19/A3/PB0 */
109- PMAP_ROW (GPIOC, 1 , NULL , 0 , ADC1, 11 ), /* D20/A4/PC1 */
110- PMAP_ROW (GPIOC, 0 , NULL , 0 , ADC1, 10 ), /* D21/A5/PC0 */
111-
112- /* Other pins */
113-
114- PMAP_ROW (GPIOB, 7 , NULL , 0 , NULL , ADCx), /* D22/PB7 */
115- PMAP_ROW (GPIOC, 2 , NULL , 0 , ADC1, 12 ), /* D23/PC2 */
116- PMAP_ROW (GPIOC, 3 , NULL , 0 , ADC1, 13 ), /* D24/PC3 */
117- PMAP_ROW (GPIOC, 4 , NULL , 0 , ADC1, 14 ), /* D25/PC4 */
118- PMAP_ROW (GPIOC, 5 , NULL , 0 , ADC1, 15 ), /* D26/PC5 */
119-
120- PMAP_ROW (GPIOC, 13 , NULL , 0 , NULL , ADCx), /* D27/PC13 USER BLUE BUTTON */
121- PMAP_ROW (GPIOC, 14 , NULL , 0 , NULL , ADCx), /* D28/PC14 */
122- PMAP_ROW (GPIOC, 15 , NULL , 0 , NULL , ADCx), /* D29/PC15 */
123- PMAP_ROW (GPIOD, 2 , NULL , 0 , NULL , ADCx), /* D30/PD2 */
124- PMAP_ROW (GPIOC, 10 , NULL , 0 , NULL , ADCx), /* D31/PC10 */
125- PMAP_ROW (GPIOB, 1 , NULL , 0 , ADC1, 9 ), /* D32/PB1 */
126- PMAP_ROW (GPIOB, 11 , NULL , 0 , NULL , ADCx), /* D33/PB11 */
127- PMAP_ROW (GPIOB, 12 , NULL , 0 , NULL , ADCx), /* D34/PB12 */
128- PMAP_ROW (GPIOB, 13 , NULL , 0 , NULL , ADCx), /* D35/PB13 */
129- PMAP_ROW (GPIOB, 14 , NULL , 0 , NULL , ADCx), /* D36/PB14 */
130- PMAP_ROW (GPIOB, 15 , NULL , 0 , NULL , ADCx), /* D37/PB15 */
131- PMAP_ROW (GPIOC, 6 , NULL , 0 , NULL , ADCx), /* D38/PC6 */
132- PMAP_ROW (GPIOC, 8 , NULL , 0 , NULL , ADCx), /* D39/PC8 */
133- PMAP_ROW (GPIOC, 9 , NULL , 0 , NULL , ADCx), /* D40/PC9 */
134-
135- PMAP_ROW (GPIOA, 13 , NULL , 0 , NULL , ADCx), /* D41/PA13 */
136- PMAP_ROW (GPIOA, 14 , NULL , 0 , NULL , ADCx), /* D42/PA14 */
137- PMAP_ROW (GPIOA, 15 , NULL , 0 , NULL , ADCx), /* D43/PA15 */
94+ {GPIOA, NULL , ADC1, 3 , 0 , 3 }, /* D0/PA3 */
95+ {GPIOA, NULL , ADC1, 2 , 0 , 2 }, /* D1/PA2 */
96+ {GPIOA, TIMER1, NULL , 10 , 3 , ADCx}, /* D2/PA10 */
97+ {GPIOB, TIMER2, NULL , 3 , 2 , ADCx}, /* D3/PB3 */
98+ {GPIOB, TIMER3, NULL , 5 , 2 , ADCx}, /* D4/PB5 */
99+ {GPIOB, TIMER3, NULL , 4 , 1 , ADCx}, /* D5/PB4 */
100+ {GPIOB, TIMER2, NULL , 10 , 3 , ADCx}, /* D6/PB10 */
101+ {GPIOA, TIMER1, NULL , 8 , 1 , ADCx}, /* D7/PA8 */
102+
103+ {GPIOA, TIMER1, NULL , 9 , 2 , ADCx}, /* D8/PA9 */
104+ {GPIOC, NULL , NULL , 7 , 0 , ADCx}, /* D9/PC7 */
105+ {GPIOB, TIMER4, NULL , 6 , 1 , ADCx}, /* D10/PB6 */
106+ {GPIOA, NULL , ADC1, 7 , 0 , 7 }, /* D11/PA7 */
107+ {GPIOA, NULL , ADC1, 6 , 0 , 6 }, /* D12/PA6 */
108+ {GPIOA, NULL , NULL , 5 , 0 , ADCx}, /* D13/PA5 LED - no ADC12_IN5 !*/
109+ {GPIOB, TIMER4, NULL , 9 , 4 , ADCx}, /* D14/PB9 */
110+ {GPIOB, TIMER4, NULL , 8 , 3 , ADCx}, /* D15/PB8 */
111+
112+ {GPIOA, NULL , ADC1, 0 , 0 , 0 }, /* D16/A0/PA0 */
113+ {GPIOA, NULL , ADC1, 1 , 0 , 1 }, /* D17/A1/PA1 */
114+ {GPIOA, NULL , ADC1, 4 , 0 , 4 }, /* D18/A2/PA4 */
115+ {GPIOB, TIMER3, ADC1, 0 , 3 , 8 }, /* D19/A3/PB0 */
116+ {GPIOC, NULL , ADC1, 1 , 0 , 11 }, /* D20/A4/PC1 */
117+ {GPIOC, NULL , ADC1, 0 , 0 , 10 }, /* D21/A5/PC0 */
118+
119+ {GPIOC, NULL , NULL , 10 , 0 , ADCx}, /* D22/PC10 */
120+ {GPIOC, NULL , NULL , 12 , 0 , ADCx}, /* D23/PC12 */
121+ {GPIOB, TIMER4, NULL , 7 , 2 , ADCx}, /* D24/PB7 */
122+ {GPIOC, NULL , NULL , 13 , 0 , ADCx}, /* D25/PC13 USER BLUE BUTTON */
123+ {GPIOC, NULL , NULL , 14 , 0 , ADCx}, /* D26/PC14 */
124+ {GPIOC, NULL , NULL , 15 , 0 , ADCx}, /* D27/PC15 */
125+ {GPIOC, NULL , ADC1, 2 , 0 , 12 }, /* D28/PC2 */
126+ {GPIOC, NULL , ADC1, 3 , 0 , 13 }, /* D29/PC3 */
127+ {GPIOC, NULL , NULL , 11 , 0 , ADCx}, /* D30/PC11 */
128+ {GPIOD, NULL , NULL , 2 , 0 , ADCx}, /* D31/PD2 */
129+ {GPIOC, NULL , NULL , 9 , 0 , ADCx}, /* D32/PC9 */
130+ {GPIOC, NULL , NULL , 8 , 0 , ADCx}, /* D33/PC8 */
131+ {GPIOC, NULL , NULL , 6 , 0 , ADCx}, /* D34/PC6 */
132+ {GPIOC, NULL , ADC1, 5 , 0 , 15 }, /* D35/PC5 */
133+ {GPIOA, NULL , NULL , 12 , 0 , ADCx}, /* D36/PA12 */
134+ {GPIOA, TIMER1, NULL , 11 , 4 , ADCx}, /* D37/PA11 */
135+ {GPIOB, NULL , NULL , 12 , 0 , ADCx}, /* D38/PB12 */
136+ {GPIOB, TIMER2, NULL , 11 , 4 , ADCx}, /* D39/PB11 PWM-not working?*/
137+ {GPIOB, NULL , NULL , 2 , 0 , ADCx}, /* D40/PB2 BOOT1 !!*/
138+ {GPIOB, TIMER3, ADC1, 1 , 4 , 9 }, /* D41/PB1 */
139+ {GPIOB, NULL , NULL , 15 , 0 , ADCx}, /* D42/PB15 */
140+ {GPIOB, NULL , NULL , 14 , 0 , ADCx}, /* D43/PB14 */
141+ {GPIOB, NULL , NULL , 13 , 0 , ADCx}, /* D44/PB13 */
142+ {GPIOC, NULL , ADC1, 4 , 0 , 14 }, /* D45/PC4 */
143+ // PMAP_ROW(GPIOA, 13, NULL, 0, NULL, ADCx), /* D41/PA13 do not use*/
144+ // PMAP_ROW(GPIOA, 14, NULL, 0, NULL, ADCx), /* D42/PA14 do not use*/
145+ // PMAP_ROW(GPIOA, 15, TIMER2, 1, NULL, ADCx), /* D43/PA15 do not use*/
138146};
139147
140148// Array of pins you can use for pwmWrite(). Keep it in Flash because
141149// it doesn't change, and so we don't waste RAM.
142150extern const uint8 boardPWMPins[] __FLASH__ = {
143- 3 , 5 , 6 , 10 , 11 , 16 , 17 , 19
151+ 2 , 3 , 5 , 6 , 7 , 8 , 10 , 14 , 15 , 19 , 24 , 37 , 39 , 41
144152};
145153
146154// Array of pins you can use for analogRead().
147155extern const uint8 boardADCPins[] __FLASH__ = {
148- 16 , 17 , 18 , 19 , 20 , 21
156+ 0 , 1 , 11 , 12 , 16 ,17 ,18 ,19 ,20 ,21 , 28 , 29 , 35 , 41 , 45
149157};
150158
151159// Array of pins that the board uses for something special. Other than
152160// the button and the LED, it's usually best to leave these pins alone
153161// unless you know what you're doing.
154- extern const uint8 boardUsedPins[] __FLASH__ = {
155- 13 , 27
156- };
162+
163+
164+ /* remappings Infos
165+ *************************************
166+ Bit 12 TIM4_REMAP: TIM4 remapping
167+ This bit is set and cleared by software. It controls the mapping of TIM4 channels 1 to 4 onto
168+ the GPIO ports.
169+ 0: No remap (TIM4_CH1/PB6, TIM4_CH2/PB7, TIM4_CH3/PB8, TIM4_CH4/PB9)
170+ 1: Full remap (TIM4_CH1/PD12, TIM4_CH2/
171+ *************************************
172+ Bits 11:10 TIM3_REMAP[1:0]: TIM3 remapping
173+ These bits are set and cleared by software. They control the mapping of TIM3 channels 1 to
174+ 4 on the GPIO ports.
175+ 00: No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1)
176+ 01: Not used
177+ 10: Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1)
178+ 11: Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
179+ Note: TIM3_ETR on PE0 is not re-mapped.
180+ *************************************
181+ Bits 9:8 TIM2_REMAP[1:0]: TIM2 remapping
182+ These bits are set and cleared by software. They control the mapping of TIM2 channels 1 to
183+ 4 and external trigger (ETR) on the GPIO ports.
184+ 00: No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3)
185+ 01: Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3)
186+ 10: Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11)
187+ 11: Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11)
188+ *************************************
189+ Bits 7:6 TIM1_REMAP[1:0]: TIM1 remapping
190+ These bits are set and cleared by software. They control the mapping of TIM1 channels 1 to
191+ 4, 1N to 3N, external trigger (ETR) and Break input (BKIN) on the GPIO ports.
192+ 00: No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12,
193+ CH1N/PB13, CH2N/PB14, CH3N/PB15)
194+ 01: Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6,
195+ CH1N/PA7, CH2N/PB0, CH3N/PB1)
196+ 10: not used
197+ 11: Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15,
198+ CH1N/PE8, CH2N/PE10, CH3N/PE12)
199+ *************************************
200+ Bits 5:4 USART3_REMAP[1:0]: USART3 remapping
201+ These bits are set and cleared by software. They control the mapping of USART3 CTS,
202+ RTS,CK,TX and RX alternate functions on the GPIO ports.
203+ 00: No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14)
204+ 01: Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14)
205+ 10: not used
206+ 11: Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12)
207+ *************************************
208+ Bit 3 USART2_REMAP: USART2 remapping
209+ This bit is set and cleared by software. It controls the mapping of USART2 CTS, RTS,CK,TX
210+ and RX alternate functions on the GPIO ports.
211+ 0: No remap (CTS/PA0, RTS/PA1, TX/PA2, RX/PA3, CK/PA4)
212+ 1: Remap (CTS/PD3, RTS/PD4, TX/PD5, RX/PD6, CK/PD7)
213+ *************************************
214+ Bit 2 USART1_REMAP: USART1 remapping
215+ This bit is set and cleared by software. It controls the mapping of USART1 TX and RX
216+ alternate functions on the GPIO ports.
217+ 0: No remap (TX/PA9, RX/PA10)
218+ 1: Remap (TX/PB6, RX/PB7)
219+ *************************************
220+ Bit 1 I2C1_REMAP: I2C1 remapping
221+ This bit is set and cleared by software. It controls the mapping of I2C1 SCL and SDA
222+ alternate functions on the GPIO ports.
223+ 0: No remap (SCL/PB6, SDA/PB7)
224+ 1: Remap (SCL/PB8, SDA/PB9)
225+ *************************************
226+ Bit 0 SPI1_REMAP: SPI1 remapping
227+ This bit is set and cleared by software. It controls the mapping of SPI1 NSS, SCK, MISO,
228+ MOSI alternate functions on the GPIO ports.
229+ 0: No remap (NSS/PA4, SCK/PA5, MISO/PA6, MOSI/PA7)
230+ 1: Remap (NSS/PA15, SCK/PB3, MISO/PB4, MOSI/PB5)
231+
232+
233+ */
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