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stevstrongstevstrong
committed
Revert "improve SPI low level functions"
This reverts commit 5db2523.
1 parent 5521a35 commit 3469ef2

3 files changed

Lines changed: 135 additions & 74 deletions

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‎STM32F1/cores/maple/libmaple/spi.c‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ void spi_slave_enable(spi_dev *dev, spi_mode mode, uint32 flags) {
8484
}
8585

8686
/**
87-
* @brief Blocking SPI transmit.
87+
* @brief Nonblocking SPI transmit.
8888
* @param dev SPI port to use for transmission
8989
* @param buf Buffer to transmit. The sizeof buf's elements are
9090
* inferred from dev's data frame format (i.e., are
@@ -95,8 +95,7 @@ void spi_slave_enable(spi_dev *dev, spi_mode mode, uint32 flags) {
9595
uint32 spi_tx(spi_dev *dev, const void *buf, uint32 len) {
9696
uint32 txed = 0;
9797
uint8 byte_frame = spi_dff(dev) == SPI_DFF_8_BIT;
98-
while ( txed < len ) {
99-
while ( spi_is_tx_empty(dev)==0 ); // wait Tx to be empty
98+
while (spi_is_tx_empty(dev) && (txed < len)) {
10099
if (byte_frame) {
101100
dev->regs->DR = ((const uint8*)buf)[txed++];
102101
} else {
@@ -163,6 +162,5 @@ static void spi_reconfigure(spi_dev *dev, uint32 cr1_config) {
163162
spi_irq_disable(dev, SPI_INTERRUPTS_ALL);
164163
if ( (dev->regs->CR1&MASK)!=(cr1_config&MASK) ) spi_peripheral_disable(dev);
165164
dev->regs->CR1 = cr1_config;
166-
//spi_rx_dma_enable(dev);
167165
spi_peripheral_enable(dev);
168166
}

‎STM32F1/libraries/SPI/src/SPI.cpp‎

Lines changed: 115 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,6 @@
4141
#include "boards.h"
4242

4343
//#include "HardwareSerial.h"
44-
/** Time in ms for DMA receive timeout */
45-
#define DMA_TIMEOUT 100
4644

4745
#if CYCLES_PER_MICROSECOND != 72
4846
/* TODO [0.2.0?] something smarter than this */
@@ -306,151 +304,205 @@ void SPIClass::endTransaction(void)
306304
* I/O
307305
*/
308306

309-
uint8 SPIClass::read(void)
310-
{
311-
while ( spi_is_rx_nonempty(_currentSetting->spi_d)==0 ) ;
312-
return (uint8)spi_rx_reg(_currentSetting->spi_d);
307+
uint8 SPIClass::read(void) {
308+
uint8 buf[1];
309+
this->read(buf, 1);
310+
return buf[0];
313311
}
314312

315-
void SPIClass::read(uint8 *buf, uint32 len)
316-
{
317-
spi_reg_map * regs = _currentSetting->spi_d->regs;
318-
uint8 b = (regs->DR); // clear the RX buffer in case a byte is waiting on it.
313+
void SPIClass::read(uint8 *buf, uint32 len) {
319314
uint32 rxed = 0;
320-
// start sequence
321-
while ( rxed < len) {
322-
regs->DR = 0x00FF; // " write the data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
323-
while ( (regs->SR & SPI_SR_RXNE)==0 ) ; // wait till data is available in the Rx register
324-
buf[rxed++] = (uint8)(regs->DR); // read and store the received byte
315+
while (rxed < len) {
316+
while (!spi_is_rx_nonempty(_currentSetting->spi_d))
317+
;
318+
buf[rxed++] = (uint8)spi_rx_reg(_currentSetting->spi_d);
325319
}
326320
}
327321

328-
void SPIClass::write(uint16 data)
329-
{
322+
void SPIClass::write(uint16 data) {
323+
// this->write(&data, 1);
324+
330325
/* Added for 16bit data Victor Perez. Roger Clark
331-
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion,
332-
* by taking the Tx code from transfer(byte)
326+
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, * by taking the Tx code from transfer(byte)
327+
* The original method, of calling write(*data, length) .
333328
* This almost doubles the speed of this function.
334329
*/
330+
335331
spi_tx_reg(_currentSetting->spi_d, data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
336332
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
337333
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
338334
}
339335

340-
void SPIClass::write(const void *data, uint32 length)
341-
{
342-
spi_tx(_currentSetting->spi_d, data, length); // data can be array of bytes or words
343-
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
344-
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
336+
//void SPIClass::write(uint8 byte) {
337+
// this->write(&byte, 1);
338+
339+
/* Roger Clark
340+
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, * by taking the Tx code from transfer(byte)
341+
* The original method, of calling write(*data, length) .
342+
* This almost doubles the speed of this function.
343+
*/
344+
345+
// spi_tx_reg(_currentSetting->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
346+
// while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
347+
// while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
348+
//}
349+
350+
void SPIClass::write(const uint8 *data, uint32 length) {
351+
uint32 txed = 0;
352+
while (txed < length) {
353+
txed += spi_tx(_currentSetting->spi_d, data + txed, length - txed);
354+
}
355+
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "4. After writing the last data item into the SPI_DR register, wait until TXE=1 ..."
356+
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... then wait until BSY=0, this indicates that the transmission of the last data is complete."
345357
// taken from SdSpiSTM32F1.cpp - Victor's lib, and adapted to support device selection
346-
uint16 b = spi_rx_reg(_currentSetting->spi_d); // dummy read, needed, don't remove!
358+
if (spi_is_rx_nonempty(_currentSetting->spi_d)) {
359+
uint8_t b = spi_rx_reg(_currentSetting->spi_d);
360+
}
347361
}
348362

349363
uint16_t SPIClass::transfer16(uint16_t wr_data) const {
350364
spi_tx_reg(_currentSetting->spi_d, wr_data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
351-
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
352-
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
353-
return (uint16)spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
365+
while (spi_is_rx_nonempty(_currentSetting->spi_d) == 0); // "4. Wait until RXNE=1 ..."
366+
uint16_t rd_data = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
367+
// while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
368+
// while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
369+
return rd_data;
354370
}
355371

356372
uint8 SPIClass::transfer(uint8 byte) const {
357373
spi_tx_reg(_currentSetting->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
358-
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
359-
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
360-
return (uint8)spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
374+
while (spi_is_rx_nonempty(_currentSetting->spi_d) == 0); // "4. Wait until RXNE=1 ..."
375+
uint8 b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
376+
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
377+
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
378+
return b;
361379
}
362-
363380
/* Roger Clark and Victor Perez, 2015
364381
* Performs a DMA SPI transfer with at least a receive buffer.
365-
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
366-
* On exit TX buffer is not modified, and RX buffer contains the received data.
382+
* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
383+
* On exit TX buffer is not modified, and RX buffer cotains the received data.
367384
* Still in progress.
368385
*/
369-
uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length)
370-
{
386+
uint8 SPIClass::dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length) {
371387
if (length == 0) return 0;
372388
uint8 b = 0;
373-
spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it.
389+
if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) b = spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it.
374390
// dma1_ch3_Active=true;
375391
dma_init(_currentSetting->spiDmaDev);
376392
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
377-
393+
378394
// RX
379395
spi_rx_dma_enable(_currentSetting->spi_d);
380-
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_8BIT) ? DMA_SIZE_8BITS : DMA_SIZE_16BITS;
381-
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
382-
receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT));// receive buffer DMA
396+
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
397+
receiveBuf, DMA_SIZE_8BITS, (DMA_MINC_MODE | DMA_TRNS_CMPLT));// receive buffer DMA
383398
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
384-
399+
385400
// TX
386-
uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM | DMA_TRNS_CMPLT);
387401
spi_tx_dma_enable(_currentSetting->spi_d);
388-
if ( transmitBuf==0 ) {
389-
static uint8_t ff = 0XFF;
390-
transmitBuf = &ff;
391-
flags ^= DMA_MINC_MODE; // remove increment mode
402+
if (!transmitBuf) {
403+
static uint8_t ff = 0XFF;
404+
transmitBuf = &ff;
405+
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
406+
transmitBuf, DMA_SIZE_8BITS, (DMA_FROM_MEM | DMA_TRNS_CMPLT));// Transmit FF repeatedly
407+
}
408+
else {
409+
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
410+
transmitBuf, DMA_SIZE_8BITS, (DMA_MINC_MODE | DMA_FROM_MEM | DMA_TRNS_CMPLT));// Transmit buffer DMA
392411
}
393-
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
394-
transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
395412
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
396413

397414
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
398415
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
399416

417+
// while (dma1_ch3_Active);
418+
// if (receiveBuf) {
400419
uint32_t m = millis();
401420
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
402-
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
421+
if ((millis() - m) > 100) {
422+
// dma1_ch3_Active = 0;
423+
b = 2;
424+
break;
425+
}
403426
}
404427
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
405428

429+
// }
406430
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
407431
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
408432
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
409433
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
410434
spi_rx_dma_disable(_currentSetting->spi_d); // And disable generation of DMA request from the SPI port so other peripherals can use the channels
411435
spi_tx_dma_disable(_currentSetting->spi_d);
412-
uint16 x = spi_rx_reg(_currentSetting->spi_d); // dummy read, needed, don't remove!
436+
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
437+
uint8 x = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
438+
}
413439
return b;
414440
}
415441

416442
/* Roger Clark and Victor Perez, 2015
417443
* Performs a DMA SPI send using a TX buffer.
418444
* On exit TX buffer is not modified.
419445
* Still in progress.
420-
* 2016 - stevstrong - reworked to automatically detect bit size from SPI setting
421446
*/
422-
uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length)
423-
{
447+
uint8 SPIClass::dmaSend(uint8 *transmitBuf, uint16 length, bool minc) {
424448
if (length == 0) return 0;
425-
uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM | DMA_TRNS_CMPLT);
449+
uint32 flags = ((DMA_MINC_MODE * minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
426450
uint8 b = 0;
427451
// dma1_ch3_Active=true;
428452
dma_init(_currentSetting->spiDmaDev);
429453
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
430454

431455
// TX
432456
spi_tx_dma_enable(_currentSetting->spi_d);
433-
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_8BIT) ? DMA_SIZE_8BITS : DMA_SIZE_16BITS;
434-
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
435-
transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
457+
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
458+
transmitBuf, DMA_SIZE_8BITS, flags);// Transmit buffer DMA
436459
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
437460
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
461+
462+
// while (dma1_ch3_Active);
463+
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0); //Avoid interrupts and just loop waiting for the flag to be set.
464+
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
438465

466+
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
467+
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
468+
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
469+
spi_tx_dma_disable(_currentSetting->spi_d);
470+
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
471+
uint8 x = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
472+
}
473+
return b;
474+
}
475+
476+
uint8 SPIClass::dmaSend(uint16 *transmitBuf, uint16 length, bool minc) {
477+
if (length == 0) return 0;
478+
uint32 flags = ((DMA_MINC_MODE * minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
479+
uint8 b;
480+
dma1_ch3_Active=true;
481+
dma_init(_currentSetting->spiDmaDev);
482+
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
483+
484+
// TX
485+
spi_tx_dma_enable(_currentSetting->spi_d);
486+
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_16BITS,
487+
transmitBuf, DMA_SIZE_16BITS, flags);// Transmit buffer DMA
488+
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
489+
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
490+
439491
// while (dma1_ch3_Active);
440-
uint32_t m = millis();
441-
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
442-
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
443-
}
492+
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0); //Avoid interrupts and just loop waiting for the flag to be set.
444493
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
445494

446495
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
447496
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
448497
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
449498
spi_tx_dma_disable(_currentSetting->spi_d);
450-
uint16 x = spi_rx_reg(_currentSetting->spi_d); // dummy read, needed, don't remove!
499+
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
500+
b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
501+
}
451502
return b;
452503
}
453504

505+
454506
void SPIClass::attachInterrupt(void) {
455507
// Should be enableInterrupt()
456508
}

‎STM32F1/libraries/SPI/src/SPI.h‎

Lines changed: 18 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -249,7 +249,7 @@ class SPIClass {
249249
* @param buffer Bytes to transmit.
250250
* @param length Number of bytes in buffer to transmit.
251251
*/
252-
void write(const void * buffer, uint32 length);
252+
void write(const uint8 *buffer, uint32 length);
253253

254254
/**
255255
* @brief Transmit a byte, then return the next unread byte.
@@ -264,26 +264,37 @@ class SPIClass {
264264

265265
/**
266266
* @brief Sets up a DMA Transfer for "length" bytes.
267-
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting.
268267
*
269268
* This function transmits and receives to buffers.
270269
*
271270
* @param transmitBuf buffer Bytes to transmit. If passed as 0, it sends FF repeatedly for "length" bytes
272271
* @param receiveBuf buffer Bytes to save received data.
273272
* @param length Number of bytes in buffer to transmit.
274273
*/
275-
uint8 dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length);
274+
uint8 dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length);
276275

277276
/**
278-
* @brief Sets up a DMA Transmit for SPI 8 or 16 bit transfer mode.
279-
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting.
277+
* @brief Sets up a DMA Transmit for bytes.
280278
*
281-
* This function only transmits and does not care about the RX fifo.
279+
* This function transmits and does not care about the RX fifo.
280+
*
281+
* @param transmitBuf buffer Bytes to transmit,
282+
* @param length Number of bytes in buffer to transmit.
283+
* @param minc Set to use Memory Increment mode, clear to use Circular mode.
284+
*/
285+
uint8 dmaSend(uint8 *transmitBuf, uint16 length, bool minc = 1);
286+
287+
/**
288+
* @brief Sets up a DMA Transmit for half words.
289+
* SPI PERFIPHERAL MUST BE SET TO 16 BIT MODE BEFORE
290+
*
291+
* This function transmits and does not care about the RX fifo.
282292
*
283293
* @param data buffer half words to transmit,
284294
* @param length Number of bytes in buffer to transmit.
295+
* @param minc Set to use Memory Increment mode (default if blank), clear to use Circular mode.
285296
*/
286-
uint8 dmaSend(void * transmitBuf, uint16 length);
297+
uint8 dmaSend(uint16 *transmitBuf, uint16 length, bool minc = 1);
287298

288299
/*
289300
* Pin accessors

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