Skip to content

Commit 4948c20

Browse files
Merge pull request #68 from victorpv/SPI_changes
Merged change from Victor_PV, Removed SPI write() for 8 bit, as 8 bit is now handled by the new 16 bit write code
2 parents 0a9b0a8 + d165e4d commit 4948c20

2 files changed

Lines changed: 6 additions & 6 deletions

File tree

STM32F1/libraries/SPI/src/SPI.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -324,7 +324,7 @@ void SPIClass::write(uint16 data) {
324324
while (spi_is_busy(this->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
325325
}
326326

327-
void SPIClass::write(uint8 byte) {
327+
//void SPIClass::write(uint8 byte) {
328328
// this->write(&byte, 1);
329329

330330
/* Roger Clark
@@ -333,10 +333,10 @@ void SPIClass::write(uint8 byte) {
333333
* This almost doubles the speed of this function.
334334
*/
335335

336-
spi_tx_reg(this->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
337-
while (spi_is_tx_empty(this->spi_d) == 0); // "5. Wait until TXE=1 ..."
338-
while (spi_is_busy(this->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
339-
}
336+
// spi_tx_reg(this->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
337+
// while (spi_is_tx_empty(this->spi_d) == 0); // "5. Wait until TXE=1 ..."
338+
// while (spi_is_busy(this->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
339+
//}
340340

341341
void SPIClass::write(const uint8 *data, uint32 length) {
342342
uint32 txed = 0;

STM32F1/libraries/SPI/src/SPI.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -215,7 +215,7 @@ class SPIClass {
215215
* @brief Transmit a byte.
216216
* @param data Byte to transmit.
217217
*/
218-
void write(uint8 data);
218+
// void write(uint8 data);
219219

220220
/**
221221
* @brief Transmit a half word.

0 commit comments

Comments
 (0)