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stevstrongstevstrong
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reworked gpio pin handling functions
1 parent 5c9dc5e commit 83c8340

28 files changed

Lines changed: 275 additions & 228 deletions

‎STM32F4/boards.txt‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
11
#
22

3+
menu.usb_cfg=USB configuration
4+
35
##############################################################
46
discovery_f407.name=STM32 Discovery F407
57

@@ -57,6 +59,15 @@ generic_f407v.build.error_led_port=GPIOA
5759
generic_f407v.build.error_led_pin=7
5860
generic_f407v.build.board=STM32GenericF407VET6
5961

62+
generic_f407v.menu.usb_cfg.usb_nc=USB inactive
63+
generic_f407v.menu.usb_cfg.usb_nc.build.cpu_flags=-DUSB_NC
64+
65+
generic_f407v.menu.usb_cfg.usb_serial=USB serial (CDC)
66+
generic_f407v.menu.usb_cfg.usb_serial.build.cpu_flags=-DSERIAL_USB
67+
68+
generic_f407v.menu.usb_cfg.usb_msc=USB Mass Storage (MSC)
69+
generic_f407v.menu.usb_cfg.usb_msc.build.cpu_flags=-DUSB_MSC
70+
6071
##############################################################
6172
stm32f4stamp.name=STM32F4Stamp F405
6273

‎STM32F4/cores/maple/boards.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141
#include "adc.h"
4242
#include "timer.h"
4343
#include "usb.h"
44+
#include "usb_serial.h"
4445

4546

4647
static void setupFlash(void);
@@ -67,7 +68,10 @@ void init(void) {
6768
setupADC();
6869
setupTimers();
6970

71+
#ifdef SERIAL_USB
7072
setupUSB();
73+
SerialUSB.begin();
74+
#endif
7175
}
7276

7377
/* You could farm this out to the files in boards/ if e.g. it takes

‎STM32F4/cores/maple/boards.h‎

Lines changed: 6 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,6 @@
4040
#define _BOARDS_H_
4141

4242
#include "libmaple.h"
43-
#include "gpio.h"
4443
#include "timer.h"
4544

4645
#include "wirish_types.h"
@@ -55,9 +54,12 @@ enum {
5554
D32, D33, D34, D35, D36, D37, D38, D39, D40, D41, D42, D43, D44, D45, D46,
5655
D47, D48, D49, D50, D51, D52, D53, D54, D55, D56, D57, D58, D59, D60, D61,
5756
D62, D63, D64, D65, D66, D67, D68, D69, D70, D71, D72, D73, D74, D75, D76,
57+
#if 0 // not available on LQFP100 package
5858
D77, D78, D79, D80, D81, D82, D83, D84, D85, D86, D87, D88, D89, D90, D91,
5959
D92, D93, D94, D95, D96, D97, D98, D99, D100, D101, D102, D103, D104, D105,
60-
D106, D107, D108, D109, D110, D111, };
60+
D106, D107, D108, D109, D110, D111,
61+
#endif // not available on LQFP100 package
62+
};
6163

6264
/**
6365
* @brief Maps each Maple pin to a corresponding stm32_pin_info.
@@ -115,26 +117,13 @@ extern void boardInit(void);
115117
* @return true if the given pin is in boardUsedPins, and false otherwise.
116118
* @see boardUsedPins
117119
*/
118-
bool boardUsesPin(uint8 pin);
120+
extern bool boardUsesPin(uint8 pin);
119121

120122
/* Include the appropriate private header from boards/: */
121123

122124
/* FIXME HACK put boards/ before these paths once IDE uses make. */
123125

124-
#ifdef BOARD_maple
125-
#include "maple.h"
126-
#elif defined(BOARD_maple_native)
127-
#include "maple_native.h"
128-
#elif defined(BOARD_maple_mini)
129-
#include "maple_mini.h"
130-
#elif defined(BOARD_maple_RET6)
131-
/*
132-
* **NOT** MAPLE REV6. This the **Maple RET6 EDITION**, which is a
133-
* Maple with an STM32F103RET6 (...RET6) instead of an STM32F103RBT6
134-
* (...RBT6) on it. Maple Rev6 (as of March 2011) DOES NOT EXIST.
135-
*/
136-
#include "maple_RET6.h"
137-
#elif defined(BOARD_aeroquad32) || defined(BOARD_aeroquad32f1)
126+
#if defined(BOARD_aeroquad32) || defined(BOARD_aeroquad32f1)
138127
#include "aeroquad32.h"
139128
#elif defined(BOARD_aeroquad32mini)
140129
#include "aeroquad32mini.h"

‎STM32F4/cores/maple/libmaple/HardwareSerial.cpp‎

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -56,19 +56,19 @@
5656
#define RX5 BOARD_UART5_RX_PIN
5757
#endif
5858

59-
HardwareSerial Serial(USART1, TX1, RX1);
59+
HardwareSerial Serial1(USART1, TX1, RX1);
6060

6161
#ifdef TX2
62-
HardwareSerial Serial1(USART2, TX2, RX2);
62+
HardwareSerial Serial2(USART2, TX2, RX2);
6363
#endif
6464

6565
#ifdef TX3
66-
HardwareSerial Serial2(USART3, TX3, RX3);
66+
HardwareSerial Serial3(USART3, TX3, RX3);
6767
#endif
6868

6969
#if defined(STM32_HIGH_DENSITY) && !defined(BOARD_maple_RET6)
70-
HardwareSerial Serial3(UART4, TX4, RX4);
71-
HardwareSerial Serial4(UART5, TX5, RX5);
70+
HardwareSerial Serial4(UART4, TX4, RX4);
71+
HardwareSerial Serial5(UART5, TX5, RX5);
7272
#endif
7373

7474
HardwareSerial::HardwareSerial(usart_dev *usart_device,
@@ -90,25 +90,23 @@ void HardwareSerial::begin(uint32 baud) {
9090
return;
9191
}
9292

93-
const stm32_pin_info *txi = &PIN_MAP[tx_pin];
94-
const stm32_pin_info *rxi = &PIN_MAP[rx_pin];
9593
#ifdef STM32F4
9694
// int af = 7<<8;
9795
if (usart_device == UART4 || usart_device == UART5) {
98-
gpio_set_af_mode(txi->gpio_device, txi->gpio_bit, 8);
99-
gpio_set_af_mode(rxi->gpio_device, rxi->gpio_bit, 8);
96+
gpio_set_af_mode(tx_pin, 8);
97+
gpio_set_af_mode(rx_pin, 8);
10098
}
10199
else {
102-
gpio_set_af_mode(txi->gpio_device, txi->gpio_bit, 7);
103-
gpio_set_af_mode(rxi->gpio_device, rxi->gpio_bit, 7);
100+
gpio_set_af_mode(tx_pin, 7);
101+
gpio_set_af_mode(rx_pin, 7);
104102
}
105-
gpio_set_mode(txi->gpio_device, txi->gpio_bit, (gpio_pin_mode)(GPIO_AF_OUTPUT_PP | GPIO_PUPD_INPUT_PU | 0x700));
106-
gpio_set_mode(rxi->gpio_device, rxi->gpio_bit, (gpio_pin_mode)(GPIO_MODE_AF | GPIO_PUPD_INPUT_PU | 0x700));
103+
gpio_set_mode(tx_pin, (gpio_pin_mode)(GPIO_AF_OUTPUT_PP | GPIO_PUPD_INPUT_PU | 0x700));
104+
gpio_set_mode(rx_pin, (gpio_pin_mode)(GPIO_MODE_AF | GPIO_PUPD_INPUT_PU | 0x700));
107105
//gpio_set_mode(txi->gpio_device, txi->gpio_bit, (gpio_pin_mode)(GPIO_PUPD_INPUT_PU));
108106
//gpio_set_mode(rxi->gpio_device, rxi->gpio_bit, (gpio_pin_mode)(GPIO_PUPD_INPUT_PU));
109107
#else
110-
gpio_set_mode(txi->gpio_device, txi->gpio_bit, GPIO_AF_OUTPUT_PP);
111-
gpio_set_mode(rxi->gpio_device, rxi->gpio_bit, GPIO_INPUT_FLOATING);
108+
gpio_set_mode(tx_pin, GPIO_AF_OUTPUT_PP);
109+
gpio_set_mode(rx_pin, GPIO_INPUT_FLOATING);
112110
#endif
113111
#if 0
114112
if (txi->timer_device != NULL) {

‎STM32F4/cores/maple/libmaple/HardwareSerial.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,12 +75,12 @@ class HardwareSerial : public Stream {
7575
uint8 rx_pin;
7676
};
7777

78-
extern HardwareSerial Serial;
7978
extern HardwareSerial Serial1;
8079
extern HardwareSerial Serial2;
8180
#if defined(STM32_HIGH_DENSITY) && !defined(BOARD_maple_RET6)
8281
extern HardwareSerial Serial3;
8382
extern HardwareSerial Serial4;
83+
extern HardwareSerial Serial5;
8484
#endif
8585
extern HardwareSerial &SerialDebug;
8686
#endif

‎STM32F4/cores/maple/libmaple/dac.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,11 +126,11 @@ void dac_enable_channel(const dac_dev *dev, uint8 channel) {
126126
*/
127127
switch (channel) {
128128
case 1:
129-
gpio_set_mode(GPIOA, 4, GPIO_INPUT_ANALOG);
129+
gpio_set_mode((uint8_t)PA4, GPIO_INPUT_ANALOG);
130130
dev->regs->CR |= DAC_CR_EN1;
131131
break;
132132
case 2:
133-
gpio_set_mode(GPIOA, 5, GPIO_INPUT_ANALOG);
133+
gpio_set_mode((uint8_t)PA5, GPIO_INPUT_ANALOG);
134134
dev->regs->CR |= DAC_CR_EN2;
135135
break;
136136
}

‎STM32F4/cores/maple/libmaple/fsmc.c‎

Lines changed: 28 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -39,27 +39,28 @@
3939
*/
4040
void fsmc_sram_init_gpios(void) {
4141
/* Data lines... */
42-
gpio_set_mode(GPIOD, 0, GPIO_AF_OUTPUT_PP);
43-
gpio_set_mode(GPIOD, 1, GPIO_AF_OUTPUT_PP);
44-
gpio_set_mode(GPIOD, 8, GPIO_AF_OUTPUT_PP);
45-
gpio_set_mode(GPIOD, 9, GPIO_AF_OUTPUT_PP);
46-
gpio_set_mode(GPIOD, 10, GPIO_AF_OUTPUT_PP);
47-
gpio_set_mode(GPIOD, 14, GPIO_AF_OUTPUT_PP);
48-
gpio_set_mode(GPIOD, 15, GPIO_AF_OUTPUT_PP);
49-
gpio_set_mode(GPIOE, 7, GPIO_AF_OUTPUT_PP);
50-
gpio_set_mode(GPIOE, 8, GPIO_AF_OUTPUT_PP);
51-
gpio_set_mode(GPIOE, 9, GPIO_AF_OUTPUT_PP);
52-
gpio_set_mode(GPIOE, 10, GPIO_AF_OUTPUT_PP);
53-
gpio_set_mode(GPIOE, 11, GPIO_AF_OUTPUT_PP);
54-
gpio_set_mode(GPIOE, 12, GPIO_AF_OUTPUT_PP);
55-
gpio_set_mode(GPIOE, 13, GPIO_AF_OUTPUT_PP);
56-
gpio_set_mode(GPIOE, 14, GPIO_AF_OUTPUT_PP);
57-
gpio_set_mode(GPIOE, 15, GPIO_AF_OUTPUT_PP);
42+
gpio_set_mode(PD0, GPIO_AF_OUTPUT_PP);
43+
gpio_set_mode(PD1, GPIO_AF_OUTPUT_PP);
44+
gpio_set_mode(PD8, GPIO_AF_OUTPUT_PP);
45+
gpio_set_mode(PD9, GPIO_AF_OUTPUT_PP);
46+
gpio_set_mode(PD10, GPIO_AF_OUTPUT_PP);
47+
gpio_set_mode(PD14, GPIO_AF_OUTPUT_PP);
48+
gpio_set_mode(PD15, GPIO_AF_OUTPUT_PP);
49+
gpio_set_mode(PE7, GPIO_AF_OUTPUT_PP);
50+
gpio_set_mode(PE8, GPIO_AF_OUTPUT_PP);
51+
gpio_set_mode(PE9, GPIO_AF_OUTPUT_PP);
52+
gpio_set_mode(PE10, GPIO_AF_OUTPUT_PP);
53+
gpio_set_mode(PE11, GPIO_AF_OUTPUT_PP);
54+
gpio_set_mode(PE12, GPIO_AF_OUTPUT_PP);
55+
gpio_set_mode(PE13, GPIO_AF_OUTPUT_PP);
56+
gpio_set_mode(PE14, GPIO_AF_OUTPUT_PP);
57+
gpio_set_mode(PE15, GPIO_AF_OUTPUT_PP);
5858

5959
/* Address lines... */
60-
gpio_set_mode(GPIOD, 11, GPIO_AF_OUTPUT_PP);
61-
gpio_set_mode(GPIOD, 12, GPIO_AF_OUTPUT_PP);
62-
gpio_set_mode(GPIOD, 13, GPIO_AF_OUTPUT_PP);
60+
gpio_set_mode(PD11, GPIO_AF_OUTPUT_PP);
61+
gpio_set_mode(PD12, GPIO_AF_OUTPUT_PP);
62+
gpio_set_mode(PD13, GPIO_AF_OUTPUT_PP);
63+
#if 0 // not available on LQFP package
6364
gpio_set_mode(GPIOF, 0, GPIO_AF_OUTPUT_PP);
6465
gpio_set_mode(GPIOF, 1, GPIO_AF_OUTPUT_PP);
6566
gpio_set_mode(GPIOF, 2, GPIO_AF_OUTPUT_PP);
@@ -76,18 +77,20 @@ void fsmc_sram_init_gpios(void) {
7677
gpio_set_mode(GPIOG, 3, GPIO_AF_OUTPUT_PP);
7778
gpio_set_mode(GPIOG, 4, GPIO_AF_OUTPUT_PP);
7879
gpio_set_mode(GPIOG, 5, GPIO_AF_OUTPUT_PP);
79-
80+
#endif // not available on LQFP package
8081
/* And control lines... */
81-
gpio_set_mode(GPIOD, 4, GPIO_AF_OUTPUT_PP); // NOE
82-
gpio_set_mode(GPIOD, 5, GPIO_AF_OUTPUT_PP); // NWE
82+
gpio_set_mode(PD4, GPIO_AF_OUTPUT_PP); // NOE
83+
gpio_set_mode(PD5, GPIO_AF_OUTPUT_PP); // NWE
8384

84-
gpio_set_mode(GPIOD, 7, GPIO_AF_OUTPUT_PP); // NE1
85+
gpio_set_mode(PD7, GPIO_AF_OUTPUT_PP); // NE1
86+
#if 0 // not available on LQFP package
8587
gpio_set_mode(GPIOG, 9, GPIO_AF_OUTPUT_PP); // NE2
8688
gpio_set_mode(GPIOG, 10, GPIO_AF_OUTPUT_PP); // NE3
8789
gpio_set_mode(GPIOG, 12, GPIO_AF_OUTPUT_PP); // NE4
90+
#endif // not available on LQFP package
8891

89-
gpio_set_mode(GPIOE, 0, GPIO_AF_OUTPUT_PP); // NBL0
90-
gpio_set_mode(GPIOE, 1, GPIO_AF_OUTPUT_PP); // NBL1
92+
gpio_set_mode(PE0, GPIO_AF_OUTPUT_PP); // NBL0
93+
gpio_set_mode(PE1, GPIO_AF_OUTPUT_PP); // NBL1
9194
}
9295

9396
#endif /* STM32_HIGH_DENSITY */

‎STM32F4/cores/maple/libmaple/gpio.h‎

Lines changed: 98 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,5 +31,102 @@
3131
* (AFIO) prototypes, defines, and inlined access functions.
3232
*/
3333

34+
#ifndef _GPIO_H_
35+
#define _GPIO_H_
36+
37+
#include "libmaple.h"
38+
#include "boards.h"
39+
40+
#ifdef __cplusplus
41+
extern "C"{
42+
#endif
43+
44+
45+
/**
46+
* @brief Get a GPIO port's corresponding afio_exti_port.
47+
* @param dev GPIO device whose afio_exti_port to return.
48+
*/
49+
static inline afio_exti_port gpio_exti_port(gpio_dev *dev) {
50+
return dev->exti_port;
51+
}
52+
53+
/**
54+
* Set or reset a GPIO pin.
55+
*
56+
* Pin must have previously been configured to output mode.
57+
*
58+
* @param dev GPIO device whose pin to set.
59+
* @param pin Pin on to set or reset
60+
* @param val If true, set the pin. If false, reset the pin.
61+
*/
62+
static inline void gpio_write_pin(uint8_t pin, uint8 val) {
63+
if (val) {
64+
(PIN_MAP[pin].gpio_device)->regs->BSRRL = BIT(PIN_MAP[pin].gpio_bit);
65+
} else {
66+
(PIN_MAP[pin].gpio_device)->regs->BSRRH = BIT(PIN_MAP[pin].gpio_bit);
67+
}
68+
}
69+
70+
static inline void gpio_set_pin(uint8_t pin) {
71+
(PIN_MAP[pin].gpio_device)->regs->BSRRL = BIT(PIN_MAP[pin].gpio_bit);
72+
}
73+
74+
static inline void gpio_clear_pin(uint8_t pin) {
75+
(PIN_MAP[pin].gpio_device)->regs->BSRRH = BIT(PIN_MAP[pin].gpio_bit);
76+
}
77+
78+
/**
79+
* Determine whether or not a GPIO pin is set.
80+
*
81+
* Pin must have previously been configured to input mode.
82+
*
83+
* @param dev GPIO device whose pin to test.
84+
* @param pin Pin on dev to test.
85+
* @return True if the pin is set, false otherwise.
86+
*/
87+
static inline uint32 gpio_read_pin(uint8_t pin) {
88+
return (PIN_MAP[pin].gpio_device)->regs->IDR & BIT(PIN_MAP[pin].gpio_bit);
89+
}
90+
91+
/**
92+
* Toggle a pin configured as output push-pull.
93+
* @param dev GPIO device.
94+
* @param pin Pin on dev to toggle.
95+
*/
96+
static inline void gpio_toggle_pin(uint8_t pin) {
97+
(PIN_MAP[pin].gpio_device)->regs->ODR = (PIN_MAP[pin].gpio_device)->regs->ODR ^ BIT(PIN_MAP[pin].gpio_bit);
98+
}
99+
100+
/*
101+
* GPIO Convenience routines
102+
*/
103+
104+
extern void gpio_init(gpio_dev *dev);
105+
extern void gpio_init_all(void);
106+
extern void gpio_set_mode(uint8_t pin, gpio_pin_mode mode);
107+
extern void gpio_set_af_mode(uint8_t pin, int mode);
108+
109+
/*
110+
* AFIO convenience routines
111+
*/
112+
113+
extern void afio_init(void);
114+
extern void afio_exti_select(afio_exti_num exti, afio_exti_port gpio_port);
115+
extern void afio_remap(afio_remap_peripheral p);
116+
117+
/**
118+
* @brief Enable or disable the JTAG and SW debug ports.
119+
* @param config Desired debug port configuration
120+
* @see afio_debug_cfg
121+
*/
122+
static inline void afio_cfg_debug_ports(afio_debug_cfg config) {
123+
//__io uint32 *mapr = &AFIO_BASE->MAPR;
124+
//*mapr = (*mapr & ~AFIO_MAPR_SWJ_CFG) | config;
125+
}
126+
127+
#ifdef __cplusplus
128+
}
129+
#endif
130+
131+
#endif
34132

35-
#include "gpioF4.h"

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