Merge pull request #9 from rogerclarkmelbourne/master

victorpv · victorpv · commit 8b663b67bb33 · 2015-09-14T22:08:26.000-05:00
Resync
diff --git a/GD32F1/cores/maple/libmaple/rcc_f1.c b/GD32F1/cores/maple/libmaple/rcc_f1.c
@@ -162,3 +162,12 @@ void rcc_set_prescaler(rcc_prescaler prescaler, uint32 divider) {
     };
     rcc_do_set_prescaler(masks, prescaler, divider);
 }
+
+void rcc_clk_disable(rcc_clk_id id) {
+    static __io uint32* enable_regs[] = {
+        [APB1] = &RCC_BASE->APB1ENR,
+        [APB2] = &RCC_BASE->APB2ENR,
+        [AHB] = &RCC_BASE->AHBENR,
+    };
+    rcc_do_clk_disable(enable_regs, id);
+}
diff --git a/GD32F1/system/libmaple/include/libmaple/rcc.h b/GD32F1/system/libmaple/include/libmaple/rcc.h
@@ -169,6 +169,12 @@ static inline void rcc_disable_css() {
     RCC_BASE->CR &= ~RCC_CR_CSSON;
 }
 
+/**
+ * @brief Turn off the clock line on a peripheral
+ * @param id Clock ID of the peripheral to turn on.
+ */
+extern void rcc_clk_disable(rcc_clk_id id);
+
 #ifdef __cplusplus
 } // extern "C"
 #endif
diff --git a/GD32F1/system/libmaple/rcc_private.h b/GD32F1/system/libmaple/rcc_private.h
@@ -64,4 +64,11 @@ static inline void rcc_do_set_prescaler(const uint32 *masks,
     RCC_BASE->CFGR = cfgr;
 }
 
+static inline void rcc_do_clk_disable(__io uint32** enable_regs,
+                                     rcc_clk_id id) {
+    __io uint32 *enable_reg = enable_regs[rcc_dev_clk(id)];
+    uint8 line_num = rcc_dev_table[id].line_num;
+    bb_peri_set_bit(enable_reg, line_num, 0);
+}
+
 #endif
diff --git a/GD32F1/system/libmaple/stm32f1/include/series/stm32.h b/GD32F1/system/libmaple/stm32f1/include/series/stm32.h
@@ -227,27 +227,8 @@ extern "C" {
 #    define STM32_PCLK2                     F_CPU
 #    endif
 #    ifndef STM32_DELAY_US_MULT
-#if F_CPU == 120000000
-	#define STM32_DELAY_US_MULT             40 /* FIXME: value is incorrect. */
-#elif F_CPU == 96000000
-	#define STM32_DELAY_US_MULT             32 /* FIXME: value is incorrect. */
-#elif F_CPU == 72000000
-	#define STM32_DELAY_US_MULT             24 /* FIXME: value is incorrect. */
-#endif
-#    endif
-#elif STM32_F1_LINE == STM32_F1_LINE_VALUE        /* TODO */
-#    ifndef STM32_PCLK1
-#    define STM32_PCLK1                     12000000U
-#    endif
-#    ifndef STM32_PCLK2
-#    define STM32_PCLK2                     24000000U
-#    endif
-#    ifndef STM32_DELAY_US_MULT
-#    define STM32_DELAY_US_MULT             8 /* FIXME: value is incorrect. */
+#		define STM32_DELAY_US_MULT 				(F_CPU / 3000000L)
 #    endif
-#elif STM32_F1_LINE == STM32_F1_LINE_ACCESS       /* TODO */
-#elif STM32_F1_LINE == STM32_F1_LINE_USB_ACCESS   /* TODO */
-#elif STM32_F1_LINE == STM32_F1_LINE_CONNECTIVITY /* TODO */
 #endif
 
 /*
diff --git a/GD32F1/variants/generic_gd32f103c/wirish/boards_setup.cpp b/GD32F1/variants/generic_gd32f103c/wirish/boards_setup.cpp
@@ -79,12 +79,15 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
 			#if F_CPU == 120000000
 			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_2_5);
 			#elif F_CPU == 96000000
 			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_2);
 			#elif F_CPU == 72000000
 			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
 			#endif
         }
 
diff --git a/STM32F1/cores/maple/libmaple/rcc_f1.c b/STM32F1/cores/maple/libmaple/rcc_f1.c
@@ -104,7 +104,7 @@ void rcc_clk_init(rcc_sysclk_src sysclk_src,
     ASSERT(sysclk_src == RCC_CLKSRC_PLL &&
            pll_src    == RCC_PLLSRC_HSE);
 
-    RCC_BASE->CFGR = pll_src | pll_mul;
+    RCC_BASE->CFGR = pll_src | pll_mul | (0x3<<22);
 
     /* Turn on, and wait for, HSE. */
     rcc_turn_on_clk(RCC_CLK_HSE);
@@ -125,13 +125,13 @@ void rcc_configure_pll(rcc_pll_cfg *pll_cfg) {
     stm32f1_rcc_pll_data *data = pll_cfg->data;
     rcc_pll_multiplier pll_mul = data->pll_mul;
     uint32 cfgr;
-
     /* Check that the PLL is disabled. */
     ASSERT_FAULT(!rcc_is_clk_on(RCC_CLK_PLL));
 
     cfgr = RCC_BASE->CFGR;
     cfgr &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL);
     cfgr |= pll_cfg->pllsrc | pll_mul;
+
     RCC_BASE->CFGR = cfgr;
 }
 
@@ -162,3 +162,12 @@ void rcc_set_prescaler(rcc_prescaler prescaler, uint32 divider) {
     };
     rcc_do_set_prescaler(masks, prescaler, divider);
 }
+
+void rcc_clk_disable(rcc_clk_id id) {
+    static __io uint32* enable_regs[] = {
+        [APB1] = &RCC_BASE->APB1ENR,
+        [APB2] = &RCC_BASE->APB2ENR,
+        [AHB] = &RCC_BASE->AHBENR,
+    };
+    rcc_do_clk_disable(enable_regs, id);
+}
diff --git a/STM32F1/libraries/FreeRTOS/utility/FreeRTOSConfig.h b/STM32F1/libraries/FreeRTOS/utility/FreeRTOSConfig.h
@@ -69,7 +69,7 @@
 #define configUSE_PREEMPTION		1
 #define configUSE_IDLE_HOOK			0
 #define configUSE_TICK_HOOK			0
-#define configCPU_CLOCK_HZ			( ( unsigned long ) 72000000 )
+#define configCPU_CLOCK_HZ			( ( unsigned long ) F_CPU )
 #define configTICK_RATE_HZ			( ( portTickType ) 1000 )
 #define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 5 )
 #define configMINIMAL_STACK_SIZE	( ( unsigned short ) 120 )
diff --git a/STM32F1/libraries/FreeRTOS821/utility/FreeRTOSConfig.h b/STM32F1/libraries/FreeRTOS821/utility/FreeRTOSConfig.h
@@ -85,7 +85,7 @@
 #define configUSE_PREEMPTION		1
 #define configUSE_IDLE_HOOK			0
 #define configUSE_TICK_HOOK			0
-#define configCPU_CLOCK_HZ			( ( unsigned long ) 72000000 )
+#define configCPU_CLOCK_HZ			( ( unsigned long ) F_CPU )
 #define configTICK_RATE_HZ			( ( TickType_t ) 1000 )
 #define configMAX_PRIORITIES		( 5 )
 #define configMINIMAL_STACK_SIZE	( ( unsigned short ) 120 )
diff --git a/STM32F1/libraries/MapleCoOS/utility/OsConfig.h b/STM32F1/libraries/MapleCoOS/utility/OsConfig.h
@@ -42,7 +42,7 @@ Idle task stack size(word).
 /*!< 
 System frequency (Hz).	                 	         
 */    
-#define CFG_CPU_FREQ            (72000000)  
+#define CFG_CPU_FREQ            (F_CPU)  
 
 /*!< 
 systick frequency (Hz).	                         
diff --git a/STM32F1/libraries/MapleCoOS116/utility/OsConfig.h b/STM32F1/libraries/MapleCoOS116/utility/OsConfig.h
@@ -70,7 +70,7 @@ Idle task stack size(word).
 /*!< 
 System frequency (Hz).	                 	         
 */    
-#define CFG_CPU_FREQ            (72000000)  
+#define CFG_CPU_FREQ            (F_CPU)  
 
 /*!< 
 systick frequency (Hz).	                         
diff --git a/STM32F1/libraries/Serasidis_VS1003B_STM/examples/MIDI_Classic_Mode/MIDI_Classic_Mode.ino b/STM32F1/libraries/Serasidis_VS1003B_STM/examples/MIDI_Classic_Mode/MIDI_Classic_Mode.ino
@@ -1414,15 +1414,13 @@ static const unsigned char Bubble_Bobble_MIDI[] = {
   0x1F, 0x00, 0x00, 0x20, 0x64, 0x81, 0x40, 0x20, 0x00, 0x01, 0xFF, 0x2F
 };
 
-VS1003 player(PC14, PB10, PA8, PA9); // cs_pin, dcs_pin, dreq_pin, reset_pin, SPI channel - defaults to SPI
+//Un-comment the line with the SPI port you want to use. Default is SPI1 port.
+SPIClass spiVS(1); //Create an SPI instance on SPI1 port.
+//SPIClass spi(2); //Create an SPI instance on SPI2 port.
+//SPIClass spi(3); //Create an SPI instance on SPI3 port.
 
-//* Example of how to use the VS21003 attached to SPI 2 
-//VS1003 player(PC14, PB10, PA8, PA9,SPIClass(2)); // cs_pin, dcs_pin, dreq_pin, reset_pin, use SPI 2
+VS1003 player(PC14, PB10, PA8, PA9, spiVS); // cs_pin, dcs_pin, dreq_pin, reset_pin, SPI channel - defaults to SPI
 
-
-/* Example of how to use the VS21003 attached to SPI 2 
-VS1003 player(PC14, PB10, PA8, PA9,SPIClass(3)); // cs_pin, dcs_pin, dreq_pin, reset_pin, use SPI 3
-*/
 void setup () {
     SPI.begin();            // initiate SPI
     Serial.begin(9600);     // initiate a serial port at 9600
diff --git a/STM32F1/libraries/Serasidis_VS1003B_STM/examples/hello_STM/hello_STM.ino b/STM32F1/libraries/Serasidis_VS1003B_STM/examples/hello_STM/hello_STM.ino
@@ -190,15 +190,13 @@ static const unsigned char HelloMP3[] = {
   0x00
 };
 
-VS1003 player(PC14, PB10, PA8, PA9); // cs_pin, dcs_pin, dreq_pin, reset_pin, SPI channel - defaults to SPI
+//Un-comment the line with the SPI port you want to use. Default is SPI1 port.
+SPIClass spiVS(1); //Create an SPI instance on SPI1 port.
+//SPIClass spi(2); //Create an SPI instance on SPI2 port.
+//SPIClass spi(3); //Create an SPI instance on SPI3 port.
 
-/* Example of how to use the VS21003 attached to SPI 2 
-VS1003 player(PC14, PB10, PA8, PA9,SPIClass(2)); // cs_pin, dcs_pin, dreq_pin, reset_pin, use SPI 2
-*/
+VS1003 player(PC14, PB10, PA8, PA9, spiVS); // cs_pin, dcs_pin, dreq_pin, reset_pin, SPI channel - defaults to SPI
 
-/* Example of how to use the VS21003 attached to SPI 2 
-VS1003 player(PC14, PB10, PA8, PA9,SPIClass(3)); // cs_pin, dcs_pin, dreq_pin, reset_pin, use SPI 3
-*/
 void setup () 
 {
   Serial.begin(9600);
@@ -212,4 +210,4 @@ void setup ()
 void loop() {
    player.playChunk(HelloMP3, sizeof(HelloMP3));  // play hellomp3 - this blocks until the player is ready to receive more data
    delay(1000);
-}
+}
diff --git a/STM32F1/system/libmaple/include/libmaple/rcc.h b/STM32F1/system/libmaple/include/libmaple/rcc.h
@@ -169,6 +169,12 @@ static inline void rcc_disable_css() {
     RCC_BASE->CR &= ~RCC_CR_CSSON;
 }
 
+/**
+ * @brief Turn off the clock line on a peripheral
+ * @param id Clock ID of the peripheral to turn on.
+ */
+extern void rcc_clk_disable(rcc_clk_id id);
+
 #ifdef __cplusplus
 } // extern "C"
 #endif
diff --git a/STM32F1/system/libmaple/rcc_private.h b/STM32F1/system/libmaple/rcc_private.h
@@ -64,4 +64,11 @@ static inline void rcc_do_set_prescaler(const uint32 *masks,
     RCC_BASE->CFGR = cfgr;
 }
 
+static inline void rcc_do_clk_disable(__io uint32** enable_regs,
+                                     rcc_clk_id id) {
+    __io uint32 *enable_reg = enable_regs[rcc_dev_clk(id)];
+    uint8 line_num = rcc_dev_table[id].line_num;
+    bb_peri_set_bit(enable_reg, line_num, 0);
+}
+
 #endif
diff --git a/STM32F1/system/libmaple/stm32f1/include/series/rcc.h b/STM32F1/system/libmaple/stm32f1/include/series/rcc.h
@@ -93,7 +93,7 @@ typedef struct rcc_reg_map {
 #define RCC_CFGR_PLLSRC_BIT             16
 
 #define RCC_CFGR_MCO                    (0x3 << 24)
-#define RCC_CFGR_USBPRE                 (1U << RCC_CFGR_USBPRE_BIT)
+#define RCC_CFGR_USBPRE                 (0x3 << RCC_CFGR_USBPRE_BIT)
 #define RCC_CFGR_PLLMUL                 (0xF << 18)
 #define RCC_CFGR_PLLXTPRE               (1U << RCC_CFGR_PLLXTPRE_BIT)
 #define RCC_CFGR_PLLSRC                 (1U << RCC_CFGR_PLLSRC_BIT)
@@ -525,7 +525,26 @@ typedef enum rcc_ahb_divider {
 } rcc_ahb_divider;
 
 /**
- * @brief Start the low speed internal oscillatior
+ * @brief STM32F1 USB prescaler dividers
+ * @see rcc_set_prescaler()
+ */
+ /*
+ Set and reset by software to control the USB clock prescaler value. The USB clock
+must be 48MHz. These bits can’t be reset if the USB clock is enabled.
+00: (CK_PLL / 1.5) selected
+01: CK_PLL selected
+ */
+ 
+typedef enum rcc_usb_divider {
+    RCC_USB_SYSCLK_DIV_1 = 0x1 << 22,
+    RCC_USB_SYSCLK_DIV_1_5 = 0x0 << 22,
+//GD32 only    RCC_USB_SYSCLK_DIV_2 = 0x3 << 22,
+//GD32 only    RCC_USB_SYSCLK_DIV_2_5 = 0x2 << 22,
+} rcc_usb_divider;
+
+
+/**
+ * @brief Start the low speed internal oscillator
  */
 static inline void rcc_start_lsi(void) {
 	*bb_perip(&RCC_BASE->CSR, RCC_CSR_LSION_BIT) = 1;
diff --git a/STM32F1/system/libmaple/stm32f1/include/series/stm32.h b/STM32F1/system/libmaple/stm32f1/include/series/stm32.h
@@ -221,13 +221,13 @@ extern "C" {
 
 #if STM32_F1_LINE == STM32_F1_LINE_PERFORMANCE
 #    ifndef STM32_PCLK1
-#    define STM32_PCLK1                     36000000U
+#    define STM32_PCLK1                     F_CPU/2
 #    endif
 #    ifndef STM32_PCLK2
-#    define STM32_PCLK2                     72000000U
+#    define STM32_PCLK2                     F_CPU
 #    endif
 #    ifndef STM32_DELAY_US_MULT
-#    define STM32_DELAY_US_MULT             12 /* FIXME: value is incorrect. */
+#		define STM32_DELAY_US_MULT 				(F_CPU / 6000000L)
 #    endif
 #elif STM32_F1_LINE == STM32_F1_LINE_VALUE        /* TODO */
 #    ifndef STM32_PCLK1
diff --git a/STM32F1/variants/generic_stm32f103c/board/board.h b/STM32F1/variants/generic_stm32f103c/board/board.h
@@ -37,7 +37,7 @@
 #define _BOARD_GENERIC_STM32F103C_H_
 
 #define CYCLES_PER_MICROSECOND    72
-#define SYSTICK_RELOAD_VAL     71999 /* takes a cycle to reload */
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
 
 #define BOARD_NR_USARTS           3
 #define BOARD_USART1_TX_PIN       PA9
diff --git a/STM32F1/variants/generic_stm32f103c/wirish/boards_setup.cpp b/STM32F1/variants/generic_stm32f103c/wirish/boards_setup.cpp
@@ -67,6 +67,12 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
+			#if F_CPU == 72000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
+			#endif			
         }
 
         __weak void board_setup_gpio(void) {
diff --git a/STM32F1/variants/generic_stm32f103r/board/board.h b/STM32F1/variants/generic_stm32f103r/board/board.h
@@ -39,7 +39,7 @@
  * high-density board. */
 
 #define CYCLES_PER_MICROSECOND  72
-#define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
 
 // USARTS
 #define BOARD_NR_USARTS         5
diff --git a/STM32F1/variants/generic_stm32f103r/wirish/boards_setup.cpp b/STM32F1/variants/generic_stm32f103r/wirish/boards_setup.cpp
@@ -67,6 +67,12 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
+			#if F_CPU == 72000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
+			#endif	
         }
 
         __weak void board_setup_gpio(void) {
diff --git a/STM32F1/variants/generic_stm32f103r8/board/board.h b/STM32F1/variants/generic_stm32f103r8/board/board.h
@@ -37,7 +37,7 @@
 #define _BOARD_GENERIC_STM32F103R8_H_
 
 #define CYCLES_PER_MICROSECOND    72
-#define SYSTICK_RELOAD_VAL     71999 /* takes a cycle to reload */
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
 
 #define BOARD_NR_USARTS           3
 #define BOARD_USART1_TX_PIN       PA9
diff --git a/STM32F1/variants/generic_stm32f103r8/wirish/boards_setup.cpp b/STM32F1/variants/generic_stm32f103r8/wirish/boards_setup.cpp
@@ -67,6 +67,12 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
+			#if F_CPU == 72000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
+			#endif	
         }
 
         __weak void board_setup_gpio(void) {
diff --git a/STM32F1/variants/generic_stm32f103v/board/board.h b/STM32F1/variants/generic_stm32f103v/board/board.h
@@ -39,7 +39,7 @@
  * high-density board. */
 
 #define CYCLES_PER_MICROSECOND  72
-#define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
 
 #define BOARD_BUTTON_PIN        PC0
 #define BOARD_BUTTON_PIN2       PD12
diff --git a/STM32F1/variants/generic_stm32f103v/wirish/boards_setup.cpp b/STM32F1/variants/generic_stm32f103v/wirish/boards_setup.cpp
@@ -67,6 +67,12 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
+			#if F_CPU == 72000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
+			#endif	
         }
 
         __weak void board_setup_gpio(void) {
diff --git a/STM32F1/variants/generic_stm32f103z/board/board.h b/STM32F1/variants/generic_stm32f103z/board/board.h
@@ -39,7 +39,7 @@
  * high-density board. */
 
 #define CYCLES_PER_MICROSECOND  72
-#define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
 
 // USARTS
 #define BOARD_NR_USARTS         5
diff --git a/STM32F1/variants/generic_stm32f103z/wirish/boards_setup.cpp b/STM32F1/variants/generic_stm32f103z/wirish/boards_setup.cpp
@@ -67,6 +67,12 @@ namespace wirish {
             rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
             rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
             rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+			rcc_clk_disable(RCC_USB);
+			#if F_CPU == 72000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
+			#elif F_CPU == 48000000
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);			
+			#endif	
         }
 
         __weak void board_setup_gpio(void) {
diff --git a/STM32F1/variants/maple/wirish/boards_setup.cpp b/STM32F1/variants/maple/wirish/boards_setup.cpp
diff --git a/STM32F1/variants/maple_mini/board/board.h b/STM32F1/variants/maple_mini/board/board.h
diff --git a/STM32F1/variants/maple_mini/wirish/boards_setup.cpp b/STM32F1/variants/maple_mini/wirish/boards_setup.cpp
diff --git a/STM32F1/variants/maple_ret6/board/board.h b/STM32F1/variants/maple_ret6/board/board.h
diff --git a/STM32F1/variants/maple_ret6/wirish/boards_setup.cpp b/STM32F1/variants/maple_ret6/wirish/boards_setup.cpp
diff --git a/STM32F1/variants/microduino/board/board.h b/STM32F1/variants/microduino/board/board.h
diff --git a/STM32F1/variants/microduino/wirish/boards_setup.cpp b/STM32F1/variants/microduino/wirish/boards_setup.cpp
diff --git a/STM32F1/variants/nucleo_f103rb/board/board.h b/STM32F1/variants/nucleo_f103rb/board/board.h
diff --git a/STM32F1/variants/nucleo_f103rb/wirish/boards_setup.cpp b/STM32F1/variants/nucleo_f103rb/wirish/boards_setup.cpp
diff --git a/STM32F4/cores/maple/IPAddress.cpp b/STM32F4/cores/maple/IPAddress.cpp
diff --git a/STM32F4/cores/maple/IPAddress.h b/STM32F4/cores/maple/IPAddress.h
diff --git a/STM32F4/variants/discovery_f407/discovery_f4.cpp b/STM32F4/variants/discovery_f407/discovery_f4.cpp
diff --git a/STM32F4/variants/discovery_f407/discovery_f4.h b/STM32F4/variants/discovery_f407/discovery_f4.h
