@@ -156,13 +156,9 @@ void SPIClass::begin(void) {
156156}
157157
158158void SPIClass::beginSlave (void ) {
159- if (_currentSetting->dataMode >= 4 ) {
160- ASSERT (0 );
161- return ;
162- }
163- uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE);
164159 spi_init (_currentSetting->spi_d );
165160 configure_gpios (_currentSetting->spi_d , 0 );
161+ uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE);
166162 #ifdef SPI_DEBUG
167163 Serial.print (" spi_slave_enable(" ); Serial.print (_currentSetting->dataMode ); Serial.print (" ," ); Serial.print (flags); Serial.println (" )" );
168164 #endif
@@ -236,13 +232,11 @@ SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge
236232On the STM32 it appears to be
237233
238234bit 1 - CPOL : Clock polarity
239-
240235 (This bit should not be changed when communication is ongoing)
241236 0 : CLK to 0 when idle
242237 1 : CLK to 1 when idle
243238
244239bit 0 - CPHA : Clock phase
245-
246240 (This bit should not be changed when communication is ongoing)
247241 0 : The first clock transition is the first data capture edge
248242 1 : The second clock transition is the first data capture edge
@@ -257,7 +251,6 @@ If someone finds this is not the case or sees a logic error with this let me kno
257251 _currentSetting->spi_d ->regs ->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA));
258252}
259253
260-
261254void SPIClass::beginTransaction (uint8_t pin, SPISettings settings)
262255{
263256 #ifdef SPI_DEBUG
@@ -273,6 +266,17 @@ void SPIClass::beginTransaction(uint8_t pin, SPISettings settings)
273266 begin ();
274267}
275268
269+ void SPIClass::beginTransactionSlave (SPISettings settings)
270+ {
271+ #ifdef SPI_DEBUG
272+ Serial.println (F (" SPIClass::beginTransactionSlave" ));
273+ #endif
274+ setBitOrder (settings.bitOrder );
275+ setDataMode (settings.dataMode );
276+ setDataSize (settings.dataSize );
277+ beginSlave ();
278+ }
279+
276280void SPIClass::endTransaction (void )
277281{
278282 #ifdef SPI_DEBUG
@@ -356,6 +360,15 @@ void SPIClass::write(const uint8 *data, uint32 length) {
356360 }
357361}
358362
363+ uint16_t SPIClass::transfer (uint16_t wr_data) const {
364+ spi_tx_reg (_currentSetting->spi_d , wr_data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
365+ while (spi_is_rx_nonempty (_currentSetting->spi_d ) == 0 ); // "4. Wait until RXNE=1 ..."
366+ uint16_t rd_data = spi_rx_reg (_currentSetting->spi_d ); // "... and read the last received data."
367+ // while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
368+ // while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
369+ return rd_data;
370+ }
371+
359372uint8 SPIClass::transfer (uint8 byte) const {
360373 spi_tx_reg (_currentSetting->spi_d , byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
361374 while (spi_is_rx_nonempty (_currentSetting->spi_d ) == 0 ); // "4. Wait until RXNE=1 ..."
0 commit comments