@@ -428,14 +428,13 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
428428 );
429429 dma_set_num_transfers (_currentSetting->spiDmaDev , _currentSetting->spiRxDmaStream , length);
430430 dma_set_fifo_flags (_currentSetting->spiDmaDev , _currentSetting->spiRxDmaStream , 0 );
431- dma_clear_isr_bits (_currentSetting->spiDmaDev , _currentSetting->spiRxDmaStream );
432431
433432 // TX
434- uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM); // | DMA_TRNS_CMPLT);
433+ uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM);
435434 if ( transmitBuf==0 ) {
436- static uint8_t ff = 0XFF ;
435+ static uint16_t ff = 0XFFFF ;
437436 transmitBuf = &ff;
438- flags &= ~((uint32) DMA_MINC_MODE) ; // remove increment mode
437+ flags ^= DMA_MINC_MODE; // remove increment mode
439438 }
440439 dma_setup_transfer ( _currentSetting->spiDmaDev ,
441440 _currentSetting->spiTxDmaStream ,
@@ -457,19 +456,18 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
457456 spi_tx_dma_enable (_currentSetting->spi_d ); // must be the last enable to avoid DMA error flag
458457
459458 uint32_t m = millis ();
460- while ((b = dma_get_isr_bits (_currentSetting->spiDmaDev , _currentSetting->spiTxDmaStream ) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
461- if ( b&(DMA_ISR_TEIF|DMA_ISR_DMEIF|DMA_ISR_FEIF) ) { b = 1 ; break ; } // break on any error flag
459+ while ((dma_get_isr_bits (_currentSetting->spiDmaDev , _currentSetting->spiTxDmaStream ) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
462460 if ((millis () - m) > DMA_TIMEOUT) { b = 2 ; break ; }
463461 }
464- if (b & DMA_ISR_TCIF) b = 0 ;
465462
466463 while (spi_is_tx_empty (_currentSetting->spi_d ) == 0 ); // "5. Wait until TXE=1 ..."
467464 while (spi_is_busy (_currentSetting->spi_d ) != 0 ); // "... and then wait until BSY=0 before disabling the SPI."
468465 // software disable sequence, see AN4031, chapter 4.1
469466 spi_tx_dma_disable (_currentSetting->spi_d );
470467 spi_rx_dma_disable (_currentSetting->spi_d );
468+ dma_disable (_currentSetting->spiDmaDev , _currentSetting->spiTxDmaStream );
471469 dma_disable (_currentSetting->spiDmaDev , _currentSetting->spiRxDmaStream );
472- dma_disable (_currentSetting-> spiDmaDev , _currentSetting-> spiTxDmaStream );
470+
473471 return b;
474472}
475473
@@ -502,11 +500,9 @@ uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc)
502500 spi_tx_dma_enable (_currentSetting->spi_d );
503501
504502 uint32_t m = millis ();
505- while ((b = dma_get_isr_bits (_currentSetting->spiDmaDev , _currentSetting->spiTxDmaStream ) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
506- if ( b&(DMA_ISR_TEIF|DMA_ISR_DMEIF|DMA_ISR_FEIF) ) { b = 1 ; break ; } // break on any error flag
503+ while ((dma_get_isr_bits (_currentSetting->spiDmaDev , _currentSetting->spiTxDmaStream ) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
507504 if ((millis () - m) > DMA_TIMEOUT) { b = 2 ; break ; }
508505 }
509- if (b & DMA_ISR_TCIF) b = 0 ;
510506
511507 while (spi_is_tx_empty (_currentSetting->spi_d ) == 0 ); // "5. Wait until TXE=1 ..."
512508 while (spi_is_busy (_currentSetting->spi_d ) != 0 ); // "... and then wait until BSY=0 before disabling the SPI."
0 commit comments