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Commit fb823b6

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remove unused code & bugfixes
- setDataSize shall first disable the SPI before writing new value - dmaTransfer adapted for TFT library usage
1 parent 22fad75 commit fb823b6

2 files changed

Lines changed: 12 additions & 11 deletions

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.gitignore

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,3 +7,5 @@ other/maple-bootloader/build
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other/maple-bootloader/*~
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*.o
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tools/src/stm32flash_serial/src/parsers/parsers.a
10+
*.bak
11+
*.1

STM32F1/libraries/SPI/src/SPI.cpp

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -214,8 +214,10 @@ void SPIClass::setBitOrder(BitOrder bitOrder)
214214
void SPIClass::setDataSize(uint32 datasize)
215215
{
216216
_currentSetting->dataSize = datasize;
217-
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF);
218-
_currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF);
217+
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF);
218+
uint8 en = spi_is_enabled(_currentSetting->spi_d);
219+
spi_peripheral_disable(_currentSetting->spi_d);
220+
_currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en;
219221
}
220222

221223
void SPIClass::setDataMode(uint8_t dataMode)
@@ -316,12 +318,11 @@ void SPIClass::read(uint8 *buf, uint32 len)
316318
{
317319
spi_reg_map * regs = _currentSetting->spi_d->regs;
318320
uint8 b = (regs->DR); // clear the RX buffer in case a byte is waiting on it.
319-
uint32 rxed = 0;
320321
// start sequence
321-
while ( rxed < len) {
322+
while ( (len--)>0) {
322323
regs->DR = 0x00FF; // " write the data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
323324
while ( (regs->SR & SPI_SR_RXNE)==0 ) ; // wait till data is available in the Rx register
324-
*buf++ = (regs->DR); // read and store the received byte
325+
*buf++ = (uint8)(regs->DR); // read and store the received byte
325326
}
326327
}
327328

@@ -333,6 +334,7 @@ void SPIClass::write(uint16 data)
333334
* This almost doubles the speed of this function.
334335
*/
335336
spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
337+
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
336338
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
337339
}
338340

@@ -387,7 +389,7 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
387389

388390
// RX
389391
spi_rx_dma_enable(_currentSetting->spi_d);
390-
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_8BIT) ? DMA_SIZE_8BITS : DMA_SIZE_16BITS;
392+
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
391393
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
392394
receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT));// receive buffer DMA
393395
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
@@ -408,7 +410,7 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
408410
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
409411

410412
uint32_t m = millis();
411-
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
413+
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
412414
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
413415
}
414416
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
@@ -434,13 +436,10 @@ uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc)
434436
if (length == 0) return 0;
435437
uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
436438
uint8 b = 0;
437-
// dma1_ch3_Active=true;
438439
dma_init(_currentSetting->spiDmaDev);
439-
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
440-
441440
// TX
442441
spi_tx_dma_enable(_currentSetting->spi_d);
443-
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_8BIT) ? DMA_SIZE_8BITS : DMA_SIZE_16BITS;
442+
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
444443
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
445444
transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
446445
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);

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