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B850 support part5#883

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miczyg1 wants to merge 56 commits into
dasharo-25.12from
b850_support_part5
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B850 support part5#883
miczyg1 wants to merge 56 commits into
dasharo-25.12from
b850_support_part5

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@miczyg1 miczyg1 commented May 4, 2026

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@miczyg1 miczyg1 force-pushed the dasharo-25.12 branch 2 times, most recently from a6701c9 to 6477ee1 Compare May 7, 2026 07:40
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch from f6bf95f to 185839e Compare May 8, 2026 07:47
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch 3 times, most recently from f51efb8 to 01c9c8a Compare May 19, 2026 15:19
miczyg1 added 13 commits May 20, 2026 09:19
Set parameters for GFX IP block intialization. Some of them are
duplicated with NBIO, so we want to keep them in sync.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Pass AMD GOP EFI driver and VBIOS file to EDK2 build system to
be integrated in the DXE FV. The PciPlatformDriver will fetch
the VBIOS from FV for given PCI device ID and vendor ID passed
in the VGA_BIOS_ID Konfig option as PCDs.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
DDI ports, as MPIO ports, are board specific. Add chip configuration
to allow boards to specify DDI links via devicetree and pass the DDI
link list to openSIL.

TEST=HDMI display works on MSI PRO B850-P WIFI with PiKVM.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Update APCB blobs to include the display parameters used by HDMI
port.

Describe the HDMI port as DDI link in devicetree, so that it will
be passed to openSIL to prepare integrated graphics for GOP driver.

TEST=HDMI display works on MSI PRO B850-P WIFI with PiKVM with AMD GOP
in EDK2.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Inappropriate [custom config]
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add Promontory firmware variants to the PSP directories. Also add a
pointer to the Promontory firmware inside EFS. It will be used by
coreboot to easily locate the firmware, load it to RAM and pass it
to silicon initialization module.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Allocate early memory for Promontory FW in the memory layout. The
Promontory initialization should run with the FW in RAM.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add API for searching promontory FW in EFS and loading it to RAM
at desired address.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Initialize Promontory chipset with newly added support for Promontory
in openSIL.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I83aa2363678c0c5a70cde4c34b65f87c87bb68ae
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I0ab522f0ee613781b3bbec1d79804f7364ec6891
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: Ifa9edbcf59c23d240af4f057552c0868e10b1a77
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch 3 times, most recently from 4d682c8 to 0a35905 Compare May 20, 2026 11:51
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch from 63295c6 to ffdbadf Compare June 1, 2026 12:07
miczyg1 added 7 commits June 2, 2026 11:28
Add Promontory 21 chip driver that will serve as openSIL
configuration setter based on devicetree config values.

Change-Id: Ice1ae8cd882c13d5fa1186dded53326430db9621
Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Assing ops for each device of Promontory chipset, so that proper
ACPI code is generated on boot.

Upstream-Status: Pending
Change-Id: I018eb0ea45a386ae718b3a38716cfbe2043da55a
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Based on output from amdtool.

Change-Id: I31f5601f5e9721764c74bea8a78f614af53f7eb6
Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Assign device operations to Promontory devices and set subsystem IDs.

Upstream-Status: Pending
Change-Id: I032201989c977a01ad76845312a4ee74f361e208
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add codec verbs with pin configs as seen by Linux in sysfs.

Upstream-Status: Pending
Change-Id: I438292f2af90364d6ebecb9c056cfd8976e9f582
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Based on https://blog.3mdeb.com/2026/2026-02-09-msi_pro_b850p_part1/

Upstream-Status: Pending
Change-Id: Iacb2af8ab8daceceed406a411a795c9ab6553eee
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Based on https://blog.3mdeb.com/2026/2026-02-09-msi_pro_b850p_part1/
and MSI POR B850-P WIFI manual.

Upstream-Status: Pending
Change-Id: I864ea0745bd89f05c32726ce8ffe4edaab608d18
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
miczyg1 added 18 commits June 2, 2026 11:28
Fix Linux unable to init sleep button and non existent PROM21 USB3
port 6 with wrong ACPI path.

Upstream-Status: Pending
Change-Id: Iae99021dbda3243073ed0e31678eac346d00c469
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Print the GPIO number when dumping its configuration to map it easily
with PPR.

Upstream-Status: Pending
Change-Id: If94ada421f71983401e0b2c946d7200b3bf810dd
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Mimic default setting of vendor BIOSes.

Upstream-Status: Pending
Change-Id: Ib3dd82786226c1e60798a275f80942bb0a60db2a
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Set eSPI IRQ mask based on the devicetree settings, if provided.

Upstream-Status: Pending
Change-Id: I2329fbb515deeaa48189126ad50af630a560683d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I156da2279bc7839cdb7420401e25cc70fb9802f1
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I54dfc1b80a0946c8fb01d1a220f3463b1ddd71d2
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Mimic vendor BIOS settings.

Upstream-Status: Pending
Change-Id: I5b180ed8f067919ec42017f49845b6749490ac06
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Update GPIO configuration to match vendor BIOS.

Upstream-Status: Pending
Change-Id: I72ba373a268febd41288ddfb744fcdea80346bb4
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Program clocks, eSPI IRQ masking and I2C devices enabling as vendor
BIOS does.

Upsream-Status: Pending
Change-Id: I7727764611e7e6916ea288b7eb2ab198f0bd9648
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I2b551413691d6a8be4db470a190697b20ee1183e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
MS-7E56 board, aka MSI PRO B850-P WIFI has small differences in the
romhole structure. Use preprocessor defines in a Kconfig option to
override the romhole structure and construct the romhole binary
that matches the format of the board. Changes are made in a way that
previous boards are not affected.

Upstream-Status: Pending
Change-Id: I21f0de69957d3610761a8ab32d999fc6fd9d463f
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add necessary regions, options and structures to the resutling image
to make FlashBIOS work. Use the freshly added ROMHOLE as a source
for the SMBIOS type 2 values.

Upstream-Status: Pending
Change-Id: If4fe27fc0701c4458d3a10bae68da4adfe8602fa
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
On modern platforms the state of APOB NV copy is stored in CMOS.

Upstream-Status: Pending
Change-Id: I6b5c5745fb9d0a30dc61542c5ca266eb70611e6e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I3f23c95e5a1d30c26c06c48f77f4a99881511c04
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Sometimes the LPC configuration space may be locked from host access.
Use SMN to retrieve the LPC CFG space values as a backup.

Upstream-Status: Pending
Change-Id: I26f8bca135aec3589401ccb84dd5f668efa67311
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Before accessign IRQ type and IRQ polarity registers, register 0x1d
bit 3 must be set in global LDN.

Upstream-Status: Pending
Change-Id: I5847651342922b78f1956dc8af3460f5f29023de
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
…resource

The root bridge resources should also include the RAM for VGA
if VGA is available on given root bridge.

Upstream-Status: Pending
Change-Id: I9a1da3651d09ec5634de398617dbc2aeda33e734
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
… GPP

Use PCI Express bridge scan function for internal GPP bridges, because
openSIL does not program the PCIe capabilities yet. Let coreboot
set ASPM, Max Payload, Clock PM and others so that the devices work
properly.

Upstream-Status: Pending
Change-Id: I35ab7a31cbb40879a35a491e43742f816216973e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch from c5c3dfc to 2e03f1b Compare June 2, 2026 09:29
miczyg1 added 10 commits June 2, 2026 14:57
Switch to IOAPIC interrupt routing when _PIC function is evaluated
by the OS and interrupt routing is enabled. The change reflects
what turin_poc does.

Additionally there is a function added to disable all PIC IRQ
routing once the IOAPIC routing is enabled.

Upstream-Status: Pending
Change-Id: I444a1380d6d84d5bb2d5e93bd0a2cb7b93cfc21e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Initialize eSPI interrupts and watchdog.

Upstream-Status: Pending
Change-Id: I1e1de121ecca3457f32ea607d6bc70d318cace59
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I60fb42f835fbe0cfdec25a8b8bf044a1390ab8a7
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Fill missing parameters for NBIO IOMMU and APIC, because some of them
were no set per devicetree or were duplicated in CCX class input block.
They have to be in sync.

Upstream-Status: Pending
Change-Id: I695bcccf0d549748862efd4017d50aabf658d37b
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Set the MMIO limit to 1TB minus the reserved space for IOMMU and
ROM3 to reflect vendor BIOS settings.

Upstream-Status: Pending
Change-Id: Id43cb3aeff491facfb48546ff89cbc2eb50b7a5c
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Report min and max frequency in CPPC structures so that AMD P-state
driver probes correctly on Linux.

Upstream-Status: Pending
Change-Id: I5f28db05bad9a2016dd203818e199a9dd5c8511a
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Change-Id: I7cd1fca2060c1da09df01c069d57d0365eafd5b1
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add IRQs that are reference in reference code or ACPI on PHX AM5
devices.

Upstream-Status: Pending
Change-Id: Ice4de51b3aa702dd8ee0442a74660d6e3f39e1db
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Program interrupts only for used devices.

Upstream-Status: Pending
Change-Id: I3c4560e9d5aaee2144182c11e1bdd9c4717528b2
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Generate missing devices in SSDT. Add GPE and ACPI events as in vendor
BIOS.

Upstream-Status: Pending
Change-Id: I11097dc269c7b44e241ae32d0947ebde712f8011
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1 miczyg1 force-pushed the b850_support_part5 branch from 2e03f1b to ee9d570 Compare June 2, 2026 12:58
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