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Dingqiang Linrkhuangtao
Dingqiang Lin
authored and
rkhuangtao
committed
drivers: rkflash: fix rkflash ftl error
1.Modify the incompatibility of FTL in kernel 4.4; 2.Add arm v7 sftl lib and arm v8 sftl lib 3.Unified naming format and variable with code in u-boot Change-Id: I43ec418bb278fc3590fcb73d50ae6f6c9281ecfa Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
1 parent 47e4722 commit 01faef7

20 files changed

Lines changed: 83495 additions & 264 deletions

‎drivers/rkflash/Kconfig‎

Lines changed: 29 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -6,10 +6,10 @@ menuconfig RK_FLASH
66
tristate "Rockchip Flash Devices Support"
77
default n
88
help
9-
Enable rockchip flash devices support.
9+
This enables support for Rockchip Flash Devices including Nandc Slc
10+
Nand, SFC Spi Nand and SFC Spi Nor.
1011

11-
rkflash driver support 3-type flash devices: NANDC NAND, SFC_NOR
12-
and SFC_NAND.
12+
They're block interface.
1313

1414
Say Y when you have a board with one of them.
1515

@@ -18,45 +18,48 @@ if RK_FLASH
1818
comment "Rockchip Flash Devices"
1919

2020
config RK_NANDC_NAND
21-
tristate "RK NANDC NAND Device Support"
21+
tristate "Rockchip NANDC Slc Nand Devices support"
2222
default n
23-
depends on (BLOCK_RKNAND != y && RK_NAND != y)
23+
depends on RK_NAND != y
2424
help
25-
Enable NANDC_NAND device support.
25+
This enables support for NANDC Slc Nand Devices.
2626

27-
It's block interface. only effective for some kinds of slc nand
28-
flash, and it's compatible with spi nand flash drivers.
27+
It's block interface, 512Kb/sector.
2928

30-
Say Y when you have a board with nand flash supported by rockchip.
31-
nandc controller.
29+
Say Y when you have a board with Slc Nand Flash supported by Rockchip
30+
Nandc controller.
3231

33-
config RK_SFC_NOR
34-
tristate "RK SFC NOR Device Support"
32+
config RK_SFC_NAND
33+
tristate "Rockchip SFC Spi Nand Devices support"
3534
default n
35+
depends on RK_NAND != y
3636
help
37-
Enable SFC_NOR device support.
38-
It's block interface.
39-
Say Y when you have a board with nor flash supported by rockchip
40-
sfc controller.
37+
This enables support for Rockchip SFC Spi Nand Devices.
4138

42-
config RK_SFC_NAND
43-
tristate "RK SFC NAND Device Support"
39+
It's block interface, 512Kb/sector.
40+
41+
Say Y when you have a board with Spi Nand Flash supported by Rockchip
42+
Serial Flash Controller(SFC).
43+
44+
config RK_SFC_NOR
45+
tristate "Rockchip SFC Spi Nor Devices Support"
4446
default n
4547
help
46-
Enable SFC_NAND device support.
47-
It's block interface
48-
Say Y when you have a board with nand flash supported by rockchip
49-
sfc controller.
48+
This enables support for Rockchip SFC Spi Nor Devices.
49+
50+
It's block interface,512Kb/sector.
51+
52+
Say Y when you have a board with Spi Nor Flash supported by Rockchip
53+
Serial Flash Controller(SFC).
5054

5155
config RK_SFC_NOR_MTD
5256
bool "RK SFC NOR mtd Interface Support"
53-
depends on RK_SFC_NOR
5457
default n
58+
depends on RK_SFC_NOR
5559
help
5660
Enable mtd interface for SFC_NOR device.
57-
It's mtd block interface.
58-
Say Y when you have a board with mtd interface nor flash supported
59-
by rockchip sfc controller.
61+
62+
Say Y when you wanna use mtd interface for SFC_NOR flash.
6063

6164
endif # RK_FLASH
6265

‎drivers/rkflash/Makefile‎

Lines changed: 13 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,16 @@
11
# SPDX-License-Identifier: GPL-2.0
22

3-
obj-$(CONFIG_RK_NANDC_NAND) += rkflash_blk.o rkflash_debug.o rknandc_base.o nand_boot.o flash.o nandc.o ftl_flash_plat.o rk_sftl.o
4-
obj-$(CONFIG_RK_SFC_NOR) += rkflash_blk.o rkflash_debug.o rksfc_base.o sfc_nor_boot.o sfc_nor.o sfc.o
3+
obj-$(CONFIG_RK_NANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_debug.o nand_boot.o flash.o nandc.o ftl_flash_plat.o
4+
obj-$(CONFIG_RK_SFC_NAND) += rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nand_boot.o sfc_nand.o sfc.o ftl_flash_plat.o
5+
obj-$(CONFIG_RK_SFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_debug.o sfc_nor_boot.o sfc_nor.o sfc.o
56
obj-$(CONFIG_RK_SFC_NOR_MTD) += sfc_nor_mtd.o
6-
obj-$(CONFIG_RK_SFC_NAND) += rkflash_blk.o rkflash_debug.o rksfc_base.o sfc_nand_boot.o sfc_nand.o sfc.o ftl_flash_plat.o rk_sftl.o
7+
8+
ifneq (, $(CONFIG_RK_NANDC_NAND)$(CONFIG_RK_SFC_NAND))
9+
10+
ifdef CONFIG_ARM64
11+
obj-y += rk_sftl_arm_v8.o
12+
else
13+
obj-y += rk_sftl_arm_v7.o
14+
endif
15+
16+
endif

‎drivers/rkflash/flash.c‎

Lines changed: 92 additions & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include "flash.h"
99
#include "flash_com.h"
1010
#include "nandc.h"
11+
#include "rkflash_debug.h"
1112

1213
#define FLASH_STRESS_TEST_EN 0
1314

@@ -69,9 +70,9 @@ static void flash_read_id_raw(u8 cs, u8 *buf)
6970

7071
nandc_flash_de_cs(cs);
7172
if (ptr[0] != 0xFF && ptr[0] && ptr[1] != 0xFF)
72-
PRINT_E("No.%d FLASH ID:%x %x %x %x %x %x\n",
73-
cs + 1, ptr[0], ptr[1], ptr[2],
74-
ptr[3], ptr[4], ptr[5]);
73+
PRINT_NANDC_E("No.%d FLASH ID:%x %x %x %x %x %x\n",
74+
cs + 1, ptr[0], ptr[1], ptr[2],
75+
ptr[3], ptr[4], ptr[5]);
7576
}
7677

7778
static void flash_bch_sel(u8 bits)
@@ -152,12 +153,12 @@ static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
152153
error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
153154
p_data, p_spare);
154155
if (error_ecc_bits > 2) {
155-
PRINT_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
156-
cs, page_addr, error_ecc_bits);
156+
PRINT_NANDC_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
157+
cs, page_addr, error_ecc_bits);
157158
if (p_data)
158-
rknand_print_hex("data:", p_data, 4, 8);
159+
PRINT_NANDC_HEX("data:", p_data, 4, 8);
159160
if (p_spare)
160-
rknand_print_hex("spare:", p_spare, 4, 2);
161+
PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
161162
}
162163
nandc_flash_de_cs(cs);
163164

@@ -196,10 +197,10 @@ static u32 flash_prog_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
196197
status = flash_read_status(cs, page_addr);
197198
nandc_flash_de_cs(cs);
198199
status &= 0x01;
199-
if (status)
200-
PRINT_I("%s addr=%x status=%x\n", __func__,
201-
page_addr, status);
202-
200+
if (status) {
201+
PRINT_NANDC_I("%s addr=%x status=%x\n",
202+
__func__, page_addr, status);
203+
}
203204
return status;
204205
}
205206

@@ -214,10 +215,10 @@ static u32 flash_erase_block(u8 cs, u32 page_addr)
214215
status = flash_read_status(cs, page_addr);
215216
nandc_flash_de_cs(cs);
216217
status &= 0x01;
217-
if (status)
218-
PRINT_I("%s addr=%x status=%x\n", __func__,
219-
page_addr, status);
220-
218+
if (status) {
219+
PRINT_NANDC_I("%s pageadd=%x status=%x\n",
220+
__func__, page_addr, status);
221+
}
221222
return status;
222223
}
223224

@@ -266,7 +267,7 @@ static s32 get_bad_blk_list(u16 *table, u32 die)
266267
bad_flag1 != 0xFF ||
267268
bad_flag2 != 0xFF) {
268269
table[bad_cnt++] = blk;
269-
PRINT_E("die[%d], bad_blk[%d]\n", die, blk);
270+
PRINT_NANDC_E("die[%d], bad_blk[%d]\n", die, blk);
270271
}
271272
}
272273
return bad_cnt;
@@ -293,8 +294,7 @@ static void flash_test(void)
293294
u32 blk_addr = 64;
294295
u32 is_bad_blk = 0;
295296

296-
PRINT_E("%s\n", __func__);
297-
297+
PRINT_NANDC_E("%s\n", __func__);
298298
bad_blk_num = 0;
299299
bad_page_num = 0;
300300
bad_cnt = get_bad_blk_list(bad_blk_list, 0);
@@ -307,7 +307,7 @@ static void flash_test(void)
307307
if (i < bad_cnt)
308308
continue;
309309
is_bad_blk = 0;
310-
PRINT_E("Flash prog block: %x\n", blk);
310+
PRINT_NANDC_E("Flash prog block: %x\n", blk);
311311
flash_erase_block(0, blk * blk_addr);
312312
for (page = 0; page < pages_num; page++) {
313313
page_addr = blk * blk_addr + page;
@@ -336,19 +336,21 @@ static void flash_test(void)
336336
}
337337
if (is_bad_blk) {
338338
bad_page_num++;
339-
PRINT_E("ERR:page%x, ret=%x\n", page_addr, ret);
340-
rknand_print_hex("data:", pread, 4, 8);
341-
rknand_print_hex("spare:", pspare_read, 4, 2);
339+
PRINT_NANDC_E("ERR:page %x, ret= %x\n",
340+
page_addr,
341+
ret);
342+
PRINT_NANDC_HEX("data:", pread, 4, 8);
343+
PRINT_NANDC_HEX("spare:", pspare_read, 4, 2);
342344
}
343345
}
344346
flash_erase_block(0, blk * blk_addr);
345347
if (is_bad_blk)
346348
bad_blk_num++;
347349
}
348-
PRINT_E("bad_blk_num = %d, bad_page_num = %d\n",
349-
bad_blk_num, bad_page_num);
350+
PRINT_NANDC_E("bad_blk_num = %d, bad_page_num = %d\n",
351+
bad_blk_num, bad_page_num);
350352

351-
PRINT_E("Flash Test Finish!!!\n");
353+
PRINT_NANDC_E("Flash Test Finish!!!\n");
352354
while (1)
353355
;
354356
}
@@ -369,57 +371,58 @@ static void flash_die_info_init(void)
369371
nand_para.blk_per_plane;
370372
}
371373

372-
static void flash_print_info(void)
374+
static void nandc_flash_print_info(void)
373375
{
374-
PRINT_I("No.0 FLASH ID: %x %x %x %x %x %x\n",
375-
nand_para.nand_id[0],
376-
nand_para.nand_id[1],
377-
nand_para.nand_id[2],
378-
nand_para.nand_id[3],
379-
nand_para.nand_id[4],
380-
nand_para.nand_id[5]);
381-
PRINT_I("die_per_chip: %x\n", nand_para.die_per_chip);
382-
PRINT_I("sec_per_page: %x\n", nand_para.sec_per_page);
383-
PRINT_I("page_per_blk: %x\n", nand_para.page_per_blk);
384-
PRINT_I("cell: %x\n", nand_para.cell);
385-
PRINT_I("plane_per_die: %x\n", nand_para.plane_per_die);
386-
PRINT_I("blk_per_plane: %x\n", nand_para.blk_per_plane);
387-
PRINT_I("TotleBlock: %x\n", g_totle_block);
388-
PRINT_I("die gap: %x\n", nand_para.die_gap);
389-
PRINT_I("lsb_mode: %x\n", nand_para.lsb_mode);
390-
PRINT_I("read_retry_mode: %x\n", nand_para.read_retry_mode);
391-
PRINT_I("ecc_bits: %x\n", nand_para.ecc_bits);
392-
PRINT_I("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
393-
PRINT_I("access_freq: %x\n", nand_para.access_freq);
394-
PRINT_I("opt_mode: %x\n", nand_para.opt_mode);
395-
396-
PRINT_I("Cache read enable: %x\n",
397-
nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
398-
PRINT_I("Cache random read enable: %x\n",
399-
nand_para.operation_opt & NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
400-
PRINT_I("Cache prog enable: %x\n",
401-
nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
402-
PRINT_I("multi read enable: %x\n",
403-
nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
404-
405-
PRINT_I("multi prog enable: %x\n",
406-
nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
407-
PRINT_I("interleave enable: %x\n",
408-
nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
409-
410-
PRINT_I("read retry enable: %x\n",
411-
nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
412-
PRINT_I("randomizer enable: %x\n",
413-
nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
414-
415-
PRINT_I("SDR enable: %x\n",
416-
nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
417-
PRINT_I("ONFI enable: %x\n",
418-
nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
419-
PRINT_I("TOGGLE enable: %x\n",
420-
nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
421-
422-
PRINT_I("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
376+
PRINT_NANDC_I("No.0 FLASH ID: %x %x %x %x %x %x\n",
377+
nand_para.nand_id[0],
378+
nand_para.nand_id[1],
379+
nand_para.nand_id[2],
380+
nand_para.nand_id[3],
381+
nand_para.nand_id[4],
382+
nand_para.nand_id[5]);
383+
PRINT_NANDC_I("die_per_chip: %x\n", nand_para.die_per_chip);
384+
PRINT_NANDC_I("sec_per_page: %x\n", nand_para.sec_per_page);
385+
PRINT_NANDC_I("page_per_blk: %x\n", nand_para.page_per_blk);
386+
PRINT_NANDC_I("cell: %x\n", nand_para.cell);
387+
PRINT_NANDC_I("plane_per_die: %x\n", nand_para.plane_per_die);
388+
PRINT_NANDC_I("blk_per_plane: %x\n", nand_para.blk_per_plane);
389+
PRINT_NANDC_I("TotleBlock: %x\n", g_totle_block);
390+
PRINT_NANDC_I("die gap: %x\n", nand_para.die_gap);
391+
PRINT_NANDC_I("lsb_mode: %x\n", nand_para.lsb_mode);
392+
PRINT_NANDC_I("read_retry_mode: %x\n", nand_para.read_retry_mode);
393+
PRINT_NANDC_I("ecc_bits: %x\n", nand_para.ecc_bits);
394+
PRINT_NANDC_I("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
395+
PRINT_NANDC_I("access_freq: %x\n", nand_para.access_freq);
396+
PRINT_NANDC_I("opt_mode: %x\n", nand_para.opt_mode);
397+
398+
PRINT_NANDC_I("Cache read enable: %x\n",
399+
nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
400+
PRINT_NANDC_I("Cache random read enable: %x\n",
401+
nand_para.operation_opt &
402+
NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
403+
PRINT_NANDC_I("Cache prog enable: %x\n",
404+
nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
405+
PRINT_NANDC_I("multi read enable: %x\n",
406+
nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
407+
408+
PRINT_NANDC_I("multi prog enable: %x\n",
409+
nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
410+
PRINT_NANDC_I("interleave enable: %x\n",
411+
nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
412+
413+
PRINT_NANDC_I("read retry enable: %x\n",
414+
nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
415+
PRINT_NANDC_I("randomizer enable: %x\n",
416+
nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
417+
418+
PRINT_NANDC_I("SDR enable: %x\n",
419+
nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
420+
PRINT_NANDC_I("ONFI enable: %x\n",
421+
nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
422+
PRINT_NANDC_I("TOGGLE enable: %x\n",
423+
nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
424+
425+
PRINT_NANDC_I("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
423426
}
424427

425428
static void ftl_flash_init(void)
@@ -452,7 +455,7 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
452455
{
453456
u32 cs;
454457

455-
/* PRINT_I("...%s enter...\n", __func__); */
458+
PRINT_NANDC_I("...%s enter...\n", __func__);
456459
g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
457460

458461
nandc_init(nandc_addr);
@@ -467,18 +470,29 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
467470
if (id_byte[0][1] != 0xF1 &&
468471
id_byte[0][1] != 0xDA &&
469472
id_byte[0][1] != 0xD1 &&
470-
id_byte[0][1] != 0x95)
473+
id_byte[0][1] != 0x95 &&
474+
id_byte[0][1] != 0xDC)
475+
471476
return FTL_UNSUPPORTED_FLASH;
472477
}
473478
}
474479
nand_para.nand_id[1] = id_byte[0][1];
475480
if (id_byte[0][1] == 0xDA) {
476481
nand_para.plane_per_die = 2;
477482
nand_para.nand_id[1] = 0xDA;
483+
} else if (id_byte[0][1] == 0xDC) {
484+
nand_para.nand_id[1] = 0xDC;
485+
if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
486+
nand_para.plane_per_die = 2;
487+
nand_para.sec_per_page = 8;
488+
} else {
489+
nand_para.plane_per_die = 2;
490+
nand_para.blk_per_plane = 2048;
491+
}
478492
}
479493
flash_die_info_init();
480494
flash_bch_sel(nand_para.ecc_bits);
481-
flash_print_info();
495+
nandc_flash_print_info();
482496
/* flash_print_info(); */
483497
ftl_flash_init();
484498

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