Skip to content

Commit 0813f9a

Browse files
committed
arm64: dts: rockchip: px30: Change clock id for gpu
Change-Id: I04ccacc3f60c7a1e4b0fa854680564963ec110fd Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
1 parent dd6270d commit 0813f9a

2 files changed

Lines changed: 3 additions & 3 deletions

File tree

arch/arm64/boot/dts/rockchip/px30.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@
234234
};
235235
pd_gpu@PX30_PD_GPU {
236236
reg = <PX30_PD_GPU>;
237-
clocks = <&cru ACLK_GPU>;
237+
clocks = <&cru SCLK_GPU>;
238238
pm_qos = <&qos_gpu>;
239239
};
240240
};
@@ -966,7 +966,7 @@
966966
<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
967967
interrupt-names = "GPU", "MMU", "JOB";
968968

969-
clocks = <&cru ACLK_GPU>;
969+
clocks = <&cru SCLK_GPU>;
970970
clock-names = "clk_mali";
971971
power-domains = <&power PX30_PD_GPU>;
972972
operating-points-v2 = <&gpu_opp_table>;

drivers/clk/rockchip/clk-px30.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -341,7 +341,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
341341
COMPOSITE(0, "clk_gpu_src", mux_4plls_p, 0,
342342
PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS,
343343
PX30_CLKGATE_CON(0), 8, GFLAGS),
344-
GATE(ACLK_GPU, "clk_gpu", "clk_gpu_src", 0,
344+
GATE(SCLK_GPU, "clk_gpu", "clk_gpu_src", 0,
345345
PX30_CLKGATE_CON(0), 10, GFLAGS),
346346
COMPOSITE_NOMUX(0, "aclk_gpu", "clk_gpu", CLK_IGNORE_UNUSED,
347347
PX30_CLKSEL_CON(1), 13, 2, DFLAGS,

0 commit comments

Comments
 (0)