@@ -773,23 +773,17 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
773773 struct clk * mclk ;
774774 int ret = 0 ;
775775 unsigned int val = 0 ;
776- unsigned int mclk_rate , bclk_rate , div_bclk , div_lrck ;
776+ unsigned int mclk_rate , bclk_rate , div_bclk = 4 , div_lrck = 64 ;
777777
778- if (i2s_tdm -> mclk_calibrate )
779- rockchip_i2s_tdm_calibrate_mclk (i2s_tdm , substream ,
780- params_rate (params ));
781-
782- ret = rockchip_i2s_tdm_set_mclk (i2s_tdm , substream , & mclk );
783- if (ret )
784- return ret ;
778+ if (i2s_tdm -> is_master_mode ) {
779+ if (i2s_tdm -> mclk_calibrate )
780+ rockchip_i2s_tdm_calibrate_mclk (i2s_tdm , substream ,
781+ params_rate (params ));
785782
786- if (i2s_tdm -> clk_trcm ) {
787- spin_lock (& i2s_tdm -> lock );
788- if (atomic_read (& i2s_tdm -> refcount ))
789- rockchip_i2s_tdm_xfer_pause (substream , i2s_tdm );
790- }
783+ ret = rockchip_i2s_tdm_set_mclk (i2s_tdm , substream , & mclk );
784+ if (ret )
785+ goto err ;
791786
792- if (i2s_tdm -> is_master_mode ) {
793787 mclk_rate = clk_get_rate (mclk );
794788 bclk_rate = i2s_tdm -> bclk_fs * params_rate (params );
795789 if (!bclk_rate ) {
@@ -798,28 +792,6 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
798792 }
799793 div_bclk = DIV_ROUND_CLOSEST (mclk_rate , bclk_rate );
800794 div_lrck = bclk_rate / params_rate (params );
801- if (i2s_tdm -> clk_trcm ) {
802- regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
803- I2S_CLKDIV_TXM_MASK | I2S_CLKDIV_RXM_MASK ,
804- I2S_CLKDIV_TXM (div_bclk ) | I2S_CLKDIV_RXM (div_bclk ));
805- regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
806- I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK ,
807- I2S_CKR_TSD (div_lrck ) | I2S_CKR_RSD (div_lrck ));
808- } else if (substream -> stream == SNDRV_PCM_STREAM_PLAYBACK ) {
809- regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
810- I2S_CLKDIV_TXM_MASK ,
811- I2S_CLKDIV_TXM (div_bclk ));
812- regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
813- I2S_CKR_TSD_MASK ,
814- I2S_CKR_TSD (div_lrck ));
815- } else {
816- regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
817- I2S_CLKDIV_RXM_MASK ,
818- I2S_CLKDIV_RXM (div_bclk ));
819- regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
820- I2S_CKR_RSD_MASK ,
821- I2S_CKR_RSD (div_lrck ));
822- }
823795 }
824796
825797 switch (params_format (params )) {
@@ -863,6 +835,33 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
863835 goto err ;
864836 }
865837
838+ if (i2s_tdm -> clk_trcm ) {
839+ spin_lock (& i2s_tdm -> lock );
840+ if (atomic_read (& i2s_tdm -> refcount ))
841+ rockchip_i2s_tdm_xfer_pause (substream , i2s_tdm );
842+
843+ regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
844+ I2S_CLKDIV_TXM_MASK | I2S_CLKDIV_RXM_MASK ,
845+ I2S_CLKDIV_TXM (div_bclk ) | I2S_CLKDIV_RXM (div_bclk ));
846+ regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
847+ I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK ,
848+ I2S_CKR_TSD (div_lrck ) | I2S_CKR_RSD (div_lrck ));
849+ } else if (substream -> stream == SNDRV_PCM_STREAM_PLAYBACK ) {
850+ regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
851+ I2S_CLKDIV_TXM_MASK ,
852+ I2S_CLKDIV_TXM (div_bclk ));
853+ regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
854+ I2S_CKR_TSD_MASK ,
855+ I2S_CKR_TSD (div_lrck ));
856+ } else {
857+ regmap_update_bits (i2s_tdm -> regmap , I2S_CLKDIV ,
858+ I2S_CLKDIV_RXM_MASK ,
859+ I2S_CLKDIV_RXM (div_bclk ));
860+ regmap_update_bits (i2s_tdm -> regmap , I2S_CKR ,
861+ I2S_CKR_RSD_MASK ,
862+ I2S_CKR_RSD (div_lrck ));
863+ }
864+
866865 if (substream -> stream == SNDRV_PCM_STREAM_CAPTURE )
867866 regmap_update_bits (i2s_tdm -> regmap , I2S_RXCR ,
868867 I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK ,
@@ -966,8 +965,6 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
966965 return 0 ;
967966
968967err :
969- if (i2s_tdm -> clk_trcm )
970- spin_unlock (& i2s_tdm -> lock );
971968 return ret ;
972969}
973970
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