arm64: dts: rockchip: px30-z7-a0-rk618-dsi: include rk618.dtsi

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ifa30e5a170326af099197f407767c924663fa6c6

Author: bivvy

arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts

@@ -9,7 +9,6 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/display/drm_mipi_dsi.h>
 #include <dt-bindings/display/media-bus-format.h>
-#include <dt-bindings/clock/rk618-cru.h>
 #include "px30.dtsi"
 #include "px30-android.dtsi"
 
@@ -500,126 +499,112 @@
 			};
 		};
 	};
+};
 
-	rk618@50 {
-		compatible = "rockchip,rk618";
+&i2c0 {
+	status = "okay";
+
+	rk618: rk618@50 {
 		reg = <0x50>;
 		interrupt-parent = <&gpio2>;
 		interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2s1_2ch_mclk>;
-		clocks = <&cru SCLK_I2S1_OUT>;
-		clock-names = "clkin";
 		assigned-clocks = <&cru SCLK_I2S1_OUT>;
-		assigned-clock-rates = <12000000>;
+		assigned-clock-rates = <11289600>;
 		reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
 		status = "okay";
+	};
+};
 
-		clock: cru {
-			compatible = "rockchip,rk618-cru";
-			clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>;
-			clock-names = "clkin", "lcdc0_dclkp";
-			assigned-clocks = <&clock SCALER_PLLIN_CLK>,
-					  <&clock VIF_PLLIN_CLK>,
-					  <&clock SCALER_CLK>,
-					  <&clock VIF0_PRE_CLK>,
-					  <&clock CODEC_CLK>,
-					  <&clock DITHER_CLK>;
-			assigned-clock-parents = <&cru SCLK_I2S1_OUT>,
-						 <&clock LCDC0_CLK>,
-						 <&clock SCALER_PLL_CLK>,
-						 <&clock VIF_PLL_CLK>,
-						 <&cru SCLK_I2S1_OUT>,
-						 <&clock VIF0_CLK>;
-			#clock-cells = <1>;
-			status = "okay";
-		};
+#include <arm/rk618.dtsi>
 
-		dsi {
-			compatible = "rockchip,rk618-dsi";
-			clocks = <&clock MIPI_CLK>;
-			clock-names = "dsi";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "okay";
+&rk618_clkin {
+	clocks = <&cru SCLK_I2S1_OUT>;
+};
 
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
+&rk618_lcdc0_dclkp {
+	clocks = <&cru DCLK_VOPL>;
+};
 
-				port@0 {
-					reg = <0>;
+&rk618_dsi {
+	status = "okay";
 
-					dsi_in_rgb: endpoint {
-						remote-endpoint = <&rgb_out_dsi>;
-					};
-				};
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi_in_rgb: endpoint {
+				remote-endpoint = <&rgb_out_dsi>;
 			};
+		};
+	};
 
-			panel@0 {
-				compatible = "simple-panel-dsi";
-				reg = <0>;
-				power-supply = <&vcc3v3_lcd>;
-				backlight = <&backlight>;
-				reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
-				prepare-delay-ms = <20>;
-				reset-delay-ms = <20>;
-				init-delay-ms = <20>;
-				enable-delay-ms = <120>;
-				disable-delay-ms = <20>;
-				unprepare-delay-ms = <20>;
-
-				width-mm = <95>;
-				height-mm = <151>;
-
-				dsi,flags = <(MIPI_DSI_MODE_VIDEO |
-					      MIPI_DSI_MODE_VIDEO_BURST |
-					      MIPI_DSI_MODE_LPM |
-					      MIPI_DSI_MODE_EOT_PACKET)>;
-				dsi,format = <MIPI_DSI_FMT_RGB888>;
-				dsi,lanes = <4>;
-
-				panel-init-sequence = [
-					15 00 02 b0 00
-					15 00 02 d6 01
-					39 00 06 b3 14 08 00 22 00
-					15 00 02 b4 0c
-					15 00 02 DE 00
-					39 00 03 b6 3a d3
-					15 00 02 51 E0
-					15 00 02 53 04
-					15 00 02 3a 77
-					15 00 02 35 01
-					39 00 05 2A 00 00 04 AF
-					39 00 05 2B 00 00 07 7F
-					05 96 01 29
-					05 14 01 11
-				];
-
-				panel-exit-sequence = [
-					05 00 01 28
-					05 00 01 10
-				];
-
-				display-timings {
-					native-mode = <&timing1>;
-
-					timing1: timing1 {
-						clock-frequency = <156000000>;
-						hactive = <1200>;
-						vactive = <1920>;
-						hback-porch = <60>;
-						hfront-porch = <80>;
-						vback-porch = <4>;
-						vfront-porch = <4>;
-						hsync-len = <10>;
-						vsync-len = <1>;
-						hsync-active = <0>;
-						vsync-active = <0>;
-						de-active = <0>;
-						pixelclk-active = <0>;
-					};
-				};
+	panel@0 {
+		compatible = "simple-panel-dsi";
+		reg = <0>;
+		power-supply = <&vcc3v3_lcd>;
+		backlight = <&backlight>;
+		reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <95>;
+		height-mm = <151>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO |
+			      MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM |
+			      MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			15 00 02 b0 00
+			15 00 02 d6 01
+			39 00 06 b3 14 08 00 22 00
+			15 00 02 b4 0c
+			15 00 02 DE 00
+			39 00 03 b6 3a d3
+			15 00 02 51 E0
+			15 00 02 53 04
+			15 00 02 3a 77
+			15 00 02 35 01
+			39 00 05 2A 00 00 04 AF
+			39 00 05 2B 00 00 07 7F
+			05 96 01 29
+			05 14 01 11
+		];
+
+		panel-exit-sequence = [
+			05 00 01 28
+			05 00 01 10
+		];
+
+		display-timings {
+			native-mode = <&timing1>;
+
+			timing1: timing1 {
+				clock-frequency = <156000000>;
+				hactive = <1200>;
+				vactive = <1920>;
+				hback-porch = <60>;
+				hfront-porch = <80>;
+				vback-porch = <4>;
+				vfront-porch = <4>;
+				hsync-len = <10>;
+				vsync-len = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
 			};
 		};
 	};