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arm64: dts: rockchip: px30-evb-ext-rk618: include rk618.dtsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I1ec7f83ffd77fb656bbb1da38d54350823c7c0d4
1 parent 3daec88 commit f44baa5

1 file changed

Lines changed: 24 additions & 43 deletions

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arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi

Lines changed: 24 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
*/
55

66
/dts-v1/;
7-
#include <dt-bindings/clock/rk618-cru.h>
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#include <dt-bindings/display/media-bus-format.h>
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#include "px30-evb-ddr3-v10.dtsi"
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@@ -117,59 +116,41 @@
117116
&i2c1 {
118117
status = "okay";
119118

120-
rk618@50 {
121-
compatible = "rockchip,rk618";
119+
rk618: rk618@50 {
122120
reg = <0x50>;
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interrupt-parent = <&gpio2>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
125123
pinctrl-names = "default";
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pinctrl-0 = <&i2s1_2ch_mclk>;
127-
clocks = <&cru SCLK_I2S1_OUT>;
128-
clock-names = "clkin";
129125
assigned-clocks = <&cru SCLK_I2S1_OUT>;
130126
assigned-clock-rates = <11289600>;
131127
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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status = "okay";
129+
};
130+
};
133131

134-
clock: cru {
135-
compatible = "rockchip,rk618-cru";
136-
clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>;
137-
clock-names = "clkin", "lcdc0_dclkp";
138-
assigned-clocks = <&clock SCALER_PLLIN_CLK>,
139-
<&clock VIF_PLLIN_CLK>,
140-
<&clock SCALER_CLK>,
141-
<&clock VIF0_PRE_CLK>,
142-
<&clock CODEC_CLK>,
143-
<&clock DITHER_CLK>;
144-
assigned-clock-parents = <&cru SCLK_I2S1_OUT>,
145-
<&clock LCDC0_CLK>,
146-
<&clock SCALER_PLL_CLK>,
147-
<&clock VIF_PLL_CLK>,
148-
<&cru SCLK_I2S1_OUT>,
149-
<&clock VIF0_CLK>;
150-
#clock-cells = <1>;
151-
status = "okay";
152-
};
132+
#include <arm/rk618.dtsi>
133+
134+
&rk618_clkin {
135+
clocks = <&cru SCLK_I2S1_OUT>;
136+
};
137+
138+
&rk618_lcdc0_dclkp {
139+
clocks = <&cru DCLK_VOPL>;
140+
};
141+
142+
&rk618_hdmi {
143+
status = "okay";
144+
145+
ports {
146+
#address-cells = <1>;
147+
#size-cells = <0>;
148+
149+
port@0 {
150+
reg = <0>;
153151

154-
hdmi {
155-
compatible = "rockchip,rk618-hdmi";
156-
clocks = <&clock HDMI_CLK>;
157-
clock-names = "hdmi";
158-
assigned-clocks = <&clock HDMI_CLK>;
159-
assigned-clock-parents = <&clock VIF0_CLK>;
160-
status = "okay";
161-
162-
ports {
163-
#address-cells = <1>;
164-
#size-cells = <0>;
165-
166-
port@0 {
167-
reg = <0>;
168-
169-
hdmi_in_rgb: endpoint {
170-
remote-endpoint = <&rgb_out_hdmi>;
171-
};
172-
};
152+
hdmi_in_rgb: endpoint {
153+
remote-endpoint = <&rgb_out_hdmi>;
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};
174155
};
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};

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