dispatch: compute pack-load effective address with a carry-save adder#373
Merged
Conversation
Replace the two chained adds (rs1 + idx*rs2) on the operand-to-LSU-buffer path with a 3:2 compressor (VX_csa_32) plus a single carry add, shortening the dispatch write path. Bit-identical result, no latency or IPC change. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Shortens the dispatch write path for pack-load address generation.
What
The pack-load effective address
eff = rs1 + idx*rs2is a 3-input sum (rs1 + t0 + t1). It was computed as two chained adds on the operand-to-LSU-buffer path. This replaces them with a 3:2 carry-save compressor (VX_csa_32) plus a single carry add — one compressor level + one CARRY8 add instead of two ripple adds.Properties
(rs1 + t0 + t1) mod 2^32is associative).Validation
eff=rs1) pass on rtlsim.🤖 Generated with Claude Code